From: Shaohui Xie shaohui@freescale.com
Signed-off-by: Shaohui Xie shaohui@freescale.com
---
boards.cfg | 1 +
1 file changed, 1 insertion(+)
diff --git a/boards.cfg b/boards.cfg
index 2128996..302ac56 100644
--- a/boards.cfg
+++ b/boards.cfg
@@ -966,6 +966,7 @@ Active powerpc
Before this commit, a broken pipe error sometimes happened
when building lcd4_lwmon5 board with Buildman.
This commit re-writes build rules of
u-boot.spr and u-boot-img-spl-at-end.bin
more simply without using a pipe.
Besides fixing a broken pipe error,
this commit gives us other advantages:
Hi Masahiro,
On 18.12.2013 09:32, Masahiro Yamada wrote:
Before this commit, a broken pipe error sometimes happened
when building lcd4_lwmon5 board with Buildman.
This commit re-writes build rules of
u-boot.spr and u-boot-img-spl-at-end.bin
more simply without using a pipe.
Besides
Before this commit, a broken pipe error sometimes happened
when building lcd4_lwmon5 board with Buildman.
This commit re-writes build rules of
u-boot.spr and u-boot-img-spl-at-end.bin
more simply without using a pipe.
Besides fixing a broken pipe error,
this commit gives us other advantages:
Hello Stefan
Besides fixing a broken pipe error,
this commit gives us other advantages:
- Do not generate intermidiate files, spl/u-boot-spl.img
and spl/u-boot-spl-pad.img for creating u-boot.spr
- Do not generate an intermidiate file, u-boot-pad.img
for creating
Hi Roger,
2013/12/4 Tom Rini tr...@ti.com:
On Mon, Nov 11, 2013 at 04:56:36PM +0200, Roger Quadros wrote:
Hi,
This series adds SATA support for OMAP5 uevm and DRA7 evm.
Patches are also availabe at
g...@github.com:rogerq/u-boot.git sata
v3:
- get rid of custom perror() macro, use
On Wednesday 18 December 2013 12:01 PM, Nobuhiro Iwamatsu wrote:
This patch adds a driver for Renesas SoC's Quad SPI bus.
This supports with 8 bits per transfer to use with SPI flash.
Signed-off-by: Kouei Abe kouei.abe...@renesas.com
Signed-off-by: Nobuhiro Iwamatsu
-BEGIN PGP SIGNED MESSAGE-
Hash: SHA1
On 12/18/2013 06:31 AM, Enric Balletbo Serra wrote:
Hi Roger,
2013/12/4 Tom Rini tr...@ti.com:
On Mon, Nov 11, 2013 at 04:56:36PM +0200, Roger Quadros wrote:
Hi,
This series adds SATA support for OMAP5 uevm and DRA7 evm.
Patches are also
On 12/17/2013 04:57 PM, Tom Rini wrote:
-BEGIN PGP SIGNED MESSAGE-
Hash: SHA1
On 12/17/2013 10:47 AM, Andre Przywara wrote:
(CCing Inderpal, Chander and Minkyu)
On 12/17/2013 04:30 PM, Tom Rini wrote:
On 12/17/2013 10:24 AM, Andre Przywara wrote:
Hi,
the Arndale board does not work
This fix is necessary after increased by one the number
of adapters in s3c24x0 driver.
Tested on Trats and Trats2.
Signed-off-by: Piotr Wilczek p.wilc...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
Cc: Minkyu Kang mk7.k...@samsung.com
Cc: Lukasz Majewski
On Wed, Dec 18, 2013 at 04:56:42PM +0900, Nobuhiro Iwamatsu wrote:
Dear Tom Rini.
Please pull u-boot-sh master branch.
Best regards,
Nobuhiro
The following changes since commit fd44194945714a478fab6407c04453caaef0bac9:
Prepare v2014.01-rc2 (2013-12-16 13:07:05 -0500)
are
On Wed, 2013-12-18 at 09:08 -0600, Chin Liang See wrote:
To enhance the SDMMC DesignWare driver to use calloc instead of
malloc. This will avoid the incident that uninitialized members
of mmc structure are later used for NULL comparison.
IMHO pretty sane change.
Actually I had local memset
To enhance the SDMMC DesignWare driver to use calloc instead of
malloc. This will avoid the incident that uninitialized members
of mmc structure are later used for NULL comparison.
Signed-off-by: Chin Liang See cl...@altera.com
Cc: Rajeshwari Shinde rajeshwar...@samsung.com
Cc: Jaehoon Chung
Cleanup on memory configuration options:
- Add comment
- Re-order configs
Signed-off-by: Jagannadha Sutradharudu Teki jaga...@xilinx.com
---
V2: none
include/configs/zynq.h | 27 ++-
1 file changed, 14 insertions(+), 13 deletions(-)
diff --git a/include/configs/zynq.h
Enabled fit_format_{error,warning}()
Signed-off-by: Jagannadha Sutradharudu Teki jaga...@xilinx.com
---
V2: none
include/configs/zynq.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/include/configs/zynq.h b/include/configs/zynq.h
index 82ec826..6019c4a 100644
---
These changes are from u-boot-xlnx.git repo from git.xilinx.com
This repo is well tested on xilinx zynq platform, hence pushing
the same on upstream.
--
Thanks,
Jagan.
Jagannadha Sutradharudu Teki (35):
zynq: Enable CONFIG_FIT_VERBOSE
zynq: Enable Boot FreeBSD/vxWorks
zynq: Cleanup on
Cleanup on miscellaneous configurable options:
- Rename SYS_PROMPT as zynq-uboot
- Add comment
- Re-order configs
Signed-off-by: Jagannadha Sutradharudu Teki jaga...@xilinx.com
---
V2: Removed CONFIG_SYS_PROMPT_HUSH_PS2
include/configs/zynq.h | 19 ++-
1 file changed, 10
Added support to find the bootmodes by reading
slcr bootmode register. this can be helpful to
autoboot the configurations w.r.t a specified bootmode.
Added this functionality on board_late_init as it's not
needed for normal initializtion part.
Signed-off-by: Jagannadha Sutradharudu Teki
Defined TEXT_BASE for u-boot starts from 0x400
w.r.t zynq memory-map.
Signed-off-by: Jagannadha Sutradharudu Teki jaga...@xilinx.com
---
V2: none
include/configs/zynq-common.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/include/configs/zynq-common.h
This enabled Boot FreeBSD/vxWorks from an ELF image support
Signed-off-by: Jagannadha Sutradharudu Teki jaga...@xilinx.com
---
V2: none
include/configs/zynq.h | 7 +++
1 file changed, 7 insertions(+)
diff --git a/include/configs/zynq.h b/include/configs/zynq.h
index 6019c4a..0492818 100644
CONFIG_SYS_SDRAM_SIZE is specific to a board hence moved
to specific pre-config board files.
Signed-off-by: Jagannadha Sutradharudu Teki jaga...@xilinx.com
---
V2: Moved CONFIG_SYS_SDRAM_SIZE pre-board configs
include/configs/zynq-common.h | 1 -
include/configs/zynq_zc70x.h | 2 ++
MicroZed is a low-cost development board based on
the Xilinx Zynq-7000 All Programmable SoC.
APSOC:
- XC7Z010-1CLG400C
Memory:
- 1 GB of DDR3 SDRAM
- 128Mb of QSPI flash(S25FL128SAGBHI200)
- Micro SD card interface
Communication:
- 10/100/1000 Ethernet
- USB 2.0
- USB-UART
User I/O:
- 100 User
Changed Env. Sector size from 0x1 to 128Kb
Signed-off-by: Jagannadha Sutradharudu Teki jaga...@xilinx.com
---
V2: none
include/configs/zynq-common.h | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/include/configs/zynq-common.h b/include/configs/zynq-common.h
index
GPIO dummy routines are required for fdt build, may be removed
these dependencies once the u-boot fdt is fully optimized.
Signed-off-by: Jagannadha Sutradharudu Teki jaga...@xilinx.com
---
V2: none
arch/arm/include/asm/arch-zynq/gpio.h | 25 +
1 file changed, 25
Zynq uart controller support two serial ports like
CONFIG_ZYNQ_SERIAL_UART0 and CONFIG_ZYNQ_SERIAL_UART1
enabled both so-that the respective board will define
these macros based on their usage.
Signed-off-by: Jagannadha Sutradharudu Teki jaga...@xilinx.com
---
V2: none
include/configs/zynq.h |
ZC770 is a complete development board based on the Xilinx Zynq-7000
All Programmable SoC, similar to ZC70x board but which has four
different daughter cards, like XM010, XM011, XM012 and XM013
ZC770 XM011:
- 1GB DDR3
- 8 and 16-bit Micron NAND devices
- USB-UART
Signed-off-by: Jagannadha
ZC770 is a complete development board based on the Xilinx Zynq-7000
All Programmable SoC, similar to ZC70x board but which has four
different daughter cards, like XM010, XM011, XM012 and XM013
ZC770 XM010:
- 1GB DDR3
- 128 Mb Quad-SPI Flash
- 8 Mb SST SI flash
- Full size SD/MMC card cage
-
Cleanups mostly on:
- Add comments
- Re-order configs
- Remove #define CONFIG_ZYNQ_SDHCI
Signed-off-by: Jagannadha Sutradharudu Teki jaga...@xilinx.com
---
V2: none
include/configs/zynq.h | 76 ++
1 file changed, 39 insertions(+), 37 deletions(-)
Added support for Zynq Nand controller driver.
Signed-off-by: Jagannadha Sutradharudu Teki jaga...@xilinx.com
CC: Marek Vasut ma...@denx.de
Cc: Scott Wood scottw...@freescale.com
---
V2: Fixed issues pointed by Scott
arch/arm/include/asm/arch-zynq/hardware.h |2 +
drivers/mtd/nand/Makefile
Zed is a complete development board based on the
Xilinx Zynq-7000 All Programmable SoC.
APSOC:
- XC7Z020-CLG484-1
Memory:
- 512 MB DDR3
- 256 Mb Quad-SPI Flash(
- Full size SD/MMC card cage
Connectivity:
- 10/100/1000 Ethernet
- USB OTG (Device/Host/OTG)
- USB-UART
Expansion:
- FMC (Low Pin
Defined CONFIG_NAND_ZYNQ for enabling zynq nand controller with
onfi detection support.
Signed-off-by: Jagannadha Sutradharudu Teki jaga...@xilinx.com
CC: Marek Vasut ma...@denx.de
Cc: Scott Wood scottw...@freescale.com
---
README| 4
include/configs/zynq-common.h |
Zynq ethernet controller support two GEM's like
CONFIG_ZYNQ_GEM0 and CONFIG_ZYNQ_GEM1 enabled
both so-that the respective board will define
these macros based on their usage.
Signed-off-by: Jagannadha Sutradharudu Teki jaga...@xilinx.com
---
V2: none
include/configs/zynq.h | 16
Enabled bank/extn' addr register support for accessing
16Mbyte flash devices.
Signed-off-by: Jagannadha Sutradharudu Teki jaga...@xilinx.com
---
V2: none
include/configs/zynq-common.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/include/configs/zynq-common.h
Updated doc/README.zynq to current status.
Signed-off-by: Jagannadha Sutradharudu Teki jaga...@xilinx.com
---
V2: none
doc/README.zynq | 29 +++--
1 file changed, 19 insertions(+), 10 deletions(-)
diff --git a/doc/README.zynq b/doc/README.zynq
index 7cb87e3..732ef3f
This patch provides a basic fdt support for zynq u-boot.
zynq-7000.dtsi- initial arch dts file
zynq-zed.dts - initial zed board dts file
more devices should be added in subsequent patches.
u-boot build: once configuring of a board done
for building dtb with zynq-zed.dts as an input
zynq-uboot
- Enable cache command
- Turn-off L2 cache
- Turn-on D-cache
Signed-off-by: Jagannadha Sutradharudu Teki jaga...@xilinx.com
---
V2: none
include/configs/zynq.h | 10 ++
1 file changed, 10 insertions(+)
diff --git a/include/configs/zynq.h b/include/configs/zynq.h
index c8ab06f..6e545e5
CONFIG_FIT_SIGNATURE - signature node support in FIT image
CONFIG_RSA - RSA lib support
Signed-off-by: Jagannadha Sutradharudu Teki jaga...@xilinx.com
---
V2: none
include/configs/zynq-common.h | 4
1 file changed, 4 insertions(+)
diff --git a/include/configs/zynq-common.h
Added support to find the bootmodes by reading
slcr bootmode register. this can be helpful to
autoboot the configurations w.r.t a specified bootmode.
Added this functionality on board_late_init as it's not
needed for normal initializtion part.
Signed-off-by: Jagannadha Sutradharudu Teki
ZC770 is a complete development board based on the Xilinx Zynq-7000
All Programmable SoC, similar to ZC70x board but which has four
different daughter cards, like XM010, XM011, XM012 and XM013
ZC770 XM012:
- 1GB DDR3
- 64MiB Numonyx NOR flash
- USB-UART
Signed-off-by: Jagannadha Sutradharudu
This patch adds initial dts support for supported
zynq boards.
Signed-off-by: Jagannadha Sutradharudu Teki jaga...@xilinx.com
---
V2: none
board/xilinx/dts/zynq-microzed.dts| 14 ++
board/xilinx/dts/zynq-zc702.dts | 14 ++
board/xilinx/dts/zynq-zc706.dts
Adds configurations for Catalyst 24WC08 EEPROM, which
is present on the zynq boards.
Enable EEPROM support for zc70x boards.
Signed-off-by: Jagannadha Sutradharudu Teki jaga...@xilinx.com
---
V2: none
include/configs/zynq-common.h | 10 ++
include/configs/zynq_zc70x.h | 1 +
2 files
zynq.h - zynq-common.h, zynq-common is Common
configuration options for all Zynq boards.
zynq.h is no longer exists hense removed from boards.cfg
Signed-off-by: Jagannadha Sutradharudu Teki jaga...@xilinx.com
---
V2: none
boards.cfg| 2 --
Defined default env. for autoboot FIT image from
respective boot devices.
Default settings:
fit_image=fit.itb
load_addr=0x200
fit_size=0x80
flash_off=0x10
nor_flash_off=0xE210
Signed-off-by: Jagannadha Sutradharudu Teki jaga...@xilinx.com
---
V2: none
The Zynq-7000 APSOC zc702 and zc706 enabled complte embedded
processing includes ASIC and FPGA design.
ZC702-:
APSOC:
- XC7Z020-CLG484-1
Memory:
- DDR3 Component Memory 1GB
- 16MB Quad SPI Flash
- IIC - 1 KB EEPROM
Connectivity:
- Gigabit Ethernet GMII, RGMII and SGMII.
- USB OTG - Host USB
-
Defined CONFIG_ENV_OVERWRITE, which allow to
overwrite serial baudrate and ethaddr.
Signed-off-by: Jagannadha Sutradharudu Teki jaga...@xilinx.com
---
V2: none
include/configs/zynq-common.h | 3 +++
1 file changed, 3 insertions(+)
diff --git a/include/configs/zynq-common.h
ZC770 is a complete development board based on the Xilinx Zynq-7000
All Programmable SoC, similar to ZC70x board but which has four
different daughter cards, like XM010, XM011, XM012 and XM013
ZC770 XM013:
- 1GB DDR3
- 128 Mb Quad-SPI Flash(dual parallel)
- USB-UART
Signed-off-by: Jagannadha
Zynq qspi controller driver supports single bus
with singe chipselect.
Zynq qspi can be operated in below connection modes
- single qspi
- dual qspi, with dual stacked
- dual qspi, with dual parallel
Signed-off-by: Jagannadha Sutradharudu Teki jaga...@xilinx.com
---
V2: Fixed few issues
On Tuesday, December 17, 2013 at 02:03:41 AM, Sergei Ianovich wrote:
USB was broken initially. Power polarity should be direct.
Signed-off-by: Sergei Ianovich ynv...@gmail.com
CC: Marek Vasut ma...@denx.de
I pushed new u-boot-pxa/master, can you please rebase this one patch and repost?
Best
On Tuesday, December 17, 2013 at 02:03:39 AM, Sergei Ianovich wrote:
Linux kernel maintainers require new machnines to support device
tree boot. The config for LP-8x4x needs updating.
In addition, there are a few fixes to board's configuration.
v2 fixes review comments made by Marek Vasut.
On Wednesday, December 18, 2013 at 08:24:48 AM, Kuo-Jung Su wrote:
From: Kuo-Jung Su dant...@faraday-tech.com
Since hardware revision 1.11.0, the following interrupt status registers
are now write-1-clear (w1c):
What did they look like before ?
1. Interrupt Source Group 0 Register (0x144)
On Wednesday, December 18, 2013 at 08:24:49 AM, Kuo-Jung Su wrote:
From: Kuo-Jung Su dant...@faraday-tech.com
Because the EP0 fifo empty indication is non-reliable,
an extra delay is necessary to avoid data corruption while
handling packets with size greater than 64 bytes.
This workaround
On Wednesday, December 18, 2013 at 04:30:08 PM, Jagannadha Sutradharudu Teki
wrote:
Added support for Zynq Nand controller driver.
Signed-off-by: Jagannadha Sutradharudu Teki jaga...@xilinx.com
CC: Marek Vasut ma...@denx.de
Cc: Scott Wood scottw...@freescale.com
---
V2: Fixed issues
Last 128Kb sector of 1Mb flash is defined as u-boot
environment partition.
Signed-off-by: Jagannadha Sutradharudu Teki jaga...@xilinx.com
---
V2: none
include/configs/zynq-common.h | 16 +++-
1 file changed, 15 insertions(+), 1 deletion(-)
diff --git a/include/configs/zynq-common.h
Tested qspi on zynq board with stmicro, spansion and winbond
flashes by enabling CONFIG_ZYNQ_QSPI.
Signed-off-by: Jagannadha Sutradharudu Teki jaga...@xilinx.com
---
V2: none
include/configs/zynq-common.h | 10 ++
1 file changed, 10 insertions(+)
diff --git
To add the DesignWare MMC driver support for Altera SOCFPGA. It
required information such as clocks and bus width from platform
specific files (SOCFPGA handoff files)
Signed-off-by: Chin Liang See cl...@altera.com
Cc: Rajeshwari Shinde rajeshwar...@samsung.com
Cc: Jaehoon Chung
Hi Masahiro,
On 18 December 2013 03:00, Masahiro Yamada yamad...@jp.panasonic.com wrote:
Before this commit, a broken pipe error sometimes happened
when building lcd4_lwmon5 board with Buildman.
This commit re-writes build rules of
u-boot.spr and u-boot-img-spl-at-end.bin
more simply
Signed-off-by: Sergei Ianovich ynv...@gmail.com
CC: Marek Vasut ma...@denx.de
---
Changes v2..v3
* fixed merge conflict
* added checks for index and init type
Changes v1..v2
* new patch
board/icpdas/lp8x4x/lp8x4x.c | 38 --
include/configs/lp8x4x.h |
Hi Masahiro,
On 16 December 2013 02:42, Masahiro Yamada yamad...@jp.panasonic.com wrote:
Hello Simon
Further to this one - here is my full buildman output. There are a few
PPC problems also:
Your close check is highly appreciated.
Thanks!
29: Makefile: move more flags to the top
On Wed, 2013-12-18 at 16:01 +0100, Marek Vasut wrote:
Applied 1,3,4,5 , thanks!
Thanks for lighting speed.
2 doesn't apply so see my comment please.
Reposted v3.
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Hi Andreas,
On Tue, 17 Dec 2013 17:25:55 +0100, Andreas Bießmann
andreas.de...@googlemail.com wrote:
Dear Albert Aribaud,
please pull the following fix ups from u-boot-atmel/master into
u-boot-arm/master.
The following changes since commit d2c7074b9593d822e2359a09c21747248fdf5fac:
To add the DesignWare MMC driver support for Altera SOCFPGA. It
required information such as clocks and bus width from platform
specific files (SOCFPGA handoff files)
Signed-off-by: Chin Liang See cl...@altera.com
Cc: Rajeshwari Shinde rajeshwar...@samsung.com
Cc: Jaehoon Chung
To enhance the SDMMC DesignWare driver to use calloc instead of
malloc. This will avoid the incident that uninitialized members
of mmc structure are later used for NULL comparison.
Signed-off-by: Chin Liang See cl...@altera.com
Cc: Rajeshwari Shinde rajeshwar...@samsung.com
Cc: Jaehoon Chung
On Wednesday, December 18, 2013 at 05:19:20 PM, Sergei Ianovich wrote:
Signed-off-by: Sergei Ianovich ynv...@gmail.com
CC: Marek Vasut ma...@denx.de
Applied, thanks
Best regards,
Marek Vasut
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Hi Albert,
please pull for 2014.01 . Thanks!
The following changes since commit d2c7074b9593d822e2359a09c21747248fdf5fac:
ARM: OMAP5: clocks: Update MPU settings for OPP_NOM (2013-12-12 17:43:39
-0500)
are available in the git repository at:
git://git.denx.de/u-boot-pxa.git master
for
On Tue, Dec 17, 2013 at 4:17 AM, Stephen Warren swar...@wwwdotorg.org wrote:
From: Yen Lin ye...@nvidia.com
The RDY bit indicates that a transfer is complete. This needs to be
cleared by SW before every single HW transaction, rather than only
at the start of each SW transaction (those being
Hi Stefan
On Tue, Dec 17, 2013 at 2:14 PM, Stefan Roese s...@denx.de wrote:
Patch f33b9bd3
[arm: omap3: Enable clocks for peripherals only if they are used]
breaks SPL booting on Beagleboard. Since some gpio input's are
read to detect the board revision. But with this patch above, the
clocks
From: Yen Lin ye...@nvidia.com
The RDY bit indicates that a transfer is complete. This needs to be
cleared by SW before every single HW transaction, rather than only
at the start of each SW transaction (those being made up of n HW
transactions).
It seems that earlier HW may have cleared this bit
Hi Nobuhiro,
On Wed, 18 Dec 2013 16:44:34 +0900, Nobuhiro Iwamatsu
iwama...@nigauri.org wrote:
Dear Albert Aribaud,
Please pull u-boot-sh/rmobile into u-boot-arm/master.
The following changes since commit d2c7074b9593d822e2359a09c21747248fdf5fac:
ARM: OMAP5: clocks: Update MPU
Signed-off-by: Przemyslaw Marczak p.marc...@samsung.com
---
changes v2:
- add definitions for check keys
- cleanup config definitions
---
include/configs/trats2.h | 27 +++
1 file changed, 27 insertions(+)
diff --git a/include/configs/trats2.h
This patch set includes changes required to:
- properly use of all gpios
- introduce common file for Samsung misc code
- keys support (PWR, VOL:UP,DOWN)
- console support on LCD
- 16bpp logo support
- introduce LCD menu on Samsung devices
Changes v2 are described in each patch commit msg.
This change avoids unexpected unaligned access.
more info: README.arm-unaligned-accesses
Signed-off-by: Przemyslaw Marczak p.marc...@samsung.com
cc: Lukasz Majewski l.majew...@samsung.com
---
Changes v2:
- new patch
---
board/samsung/trats/Makefile |2 ++
1 file changed, 2 insertions(+)
This change adds CFLAGS: -mno-unaligned-access
which depends on option: PLATFORM_NO_UNALIGNED
This option avoids unaligned data access exception on armv7, caused
by access to logo data which is mostly unaligned initialized array.
more info: README.arm-unaligned-accesses
Signed-off-by:
Config: CONFIG_MISC_INIT_R enables implementation of misc_init_r()
in common file::
- board/samsung/common/misc.c
Signed-off-by: Przemyslaw Marczak p.marc...@samsung.com
---
Changes v2:
- change CONFIG_SAMSUNG to CONFIG_MISC_INIT_R
---
board/samsung/common/Makefile |1 +
16 bpp mode is required by LCD console mode.
This change updates exynos board files.
Signed-off-by: Przemyslaw Marczak p.marc...@samsung.com
---
Changes v2:
-- new patch
---
board/samsung/trats/trats.c |2 +-
board/samsung/trats2/trats2.c|2 +-
Remove wrong and unused env variables
Trats2 is not as GT-I8800.
Signed-off-by: Przemyslaw Marczak p.marc...@samsung.com
Cc: Piotr Wilczek p.wilc...@samsung.com
---
board/samsung/trats2/trats2.c | 19 ++-
drivers/power/battery/bat_trats2.c |2 +-
Now fimd BPP color mode depends on vl_bpp value in struct panel_info.
There is only 16BPP mode check, default mode is 24BPP.
Other fimd modes are usually unneeded and also needs some fimd driver
modifications and tests.
Signed-off-by: Przemyslaw Marczak p.marc...@samsung.com
---
Changes v2:
-
This is big size patch.
PLease follow the link:
http://www.denx.de/wiki/pub/U-Boot/TooBigPatches/0007-lib-tizen-change-Tizen-logo-with-the-new-one.patch
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Old s5p gpio coding method was not clean and was not working properly
for all parts and banks. New method is clean and easy to extend.
Gpio coding mask:
0x00ff - pin number
0x0000 - bank offset
0xff00 - part number
Signed-off-by: Przemyslaw Marczak p.marc...@samsung.com
---
This simple LCD menu allows run one of download mode on device
without writing on console or for fast and easy upgrade.
This feature check user keys combination at boot:
- power key + volume up - download menu
- power key + volume down - thor mode (without menu)
New configs:
- CONFIG_LCD_MENU
-
Signed-off-by: Przemyslaw Marczak p.marc...@samsung.com
Acked-by: Lukasz Majewski l.majew...@samsung.com
---
changes v2:
- add definitions to check keys
- cleanup config definitions
- add acked-by
---
include/configs/trats.h | 23 +++
1 file changed, 23 insertions(+)
diff
board/samsung/common/misc.c:
- move draw_logo() function from exynos_fb.c
- add get_tizen_logo_info() function call removed from board files
boards:
- update board files
- add CONFIG_MISC_INIT_R to Universal, Trats and Trats2
Signed-off-by: Przemyslaw Marczak p.marc...@samsung.com
Tested-by:
On Wed, Dec 18, 2013 at 11:48 PM, Stephen Warren swar...@wwwdotorg.org wrote:
From: Yen Lin ye...@nvidia.com
The RDY bit indicates that a transfer is complete. This needs to be
cleared by SW before every single HW transaction, rather than only
at the start of each SW transaction (those being
Signed-off-by: Przemyslaw Marczak p.marc...@samsung.com
---
changes v2:
- add definitions for check keys
- cleanup config definitions
---
include/configs/s5pc210_universal.h | 23 +++
1 file changed, 23 insertions(+)
diff --git a/include/configs/s5pc210_universal.h
Hi Marek,
On Wed, 18 Dec 2013 18:17:59 +0100, Marek Vasut ma...@denx.de wrote:
Hi Albert,
please pull for 2014.01 . Thanks!
The following changes since commit d2c7074b9593d822e2359a09c21747248fdf5fac:
ARM: OMAP5: clocks: Update MPU settings for OPP_NOM (2013-12-12 17:43:39
-0500)
On Thu, Nov 14, 2013 at 9:09 PM, Sourav Poddar sourav.pod...@ti.com wrote:
From: Jagannadha Sutradharudu Teki jagannadha.sutradharudu-t...@xilinx.com
Signed-off-by: Jagannadha Sutradharudu Teki jaga...@xilinx.com
Signed-off-by: Sourav Poddar sourav.pod...@ti.com
---
The following changes since commit f3bf212abc4139f12b472e97c1992ab32671b609:
serial_sh: add support for SH7753 (2013-12-18 16:50:00 +0900)
are available in the git repository at:
git://git.denx.de/u-boot-usb.git master
for you to fetch changes up to
On Wednesday, December 18, 2013 at 07:47:38 PM, Albert ARIBAUD wrote:
Hi Marek,
On Wed, 18 Dec 2013 18:17:59 +0100, Marek Vasut ma...@denx.de wrote:
Hi Albert,
please pull for 2014.01 . Thanks!
The following changes since commit d2c7074b9593d822e2359a09c21747248fdf5fac:
ARM:
On Wed, Dec 18, 2013 at 9:07 PM, Marek Vasut ma...@denx.de wrote:
On Wednesday, December 18, 2013 at 04:30:08 PM, Jagannadha Sutradharudu Teki
wrote:
Added support for Zynq Nand controller driver.
Signed-off-by: Jagannadha Sutradharudu Teki jaga...@xilinx.com
CC: Marek Vasut ma...@denx.de
On Thu, Nov 14, 2013 at 9:09 PM, Sourav Poddar sourav.pod...@ti.com wrote:
Without this delay, write/read is failing.
Looks like, the WIP always remain set and hence a timeout
occurs leading to the error.
Signed-off-by: Sourav Poddar sourav.pod...@ti.com
---
Hi Jagan,
This patch seems to
On Wed, Dec 18, 2013 at 07:55:48PM +0100, Marek Vasut wrote:
On Wednesday, December 18, 2013 at 07:47:38 PM, Albert ARIBAUD wrote:
Hi Marek,
On Wed, 18 Dec 2013 18:17:59 +0100, Marek Vasut ma...@denx.de wrote:
Hi Albert,
please pull for 2014.01 . Thanks!
The following
On Wednesday, December 18, 2013 at 08:35:28 PM, Tom Rini wrote:
On Wed, Dec 18, 2013 at 07:55:48PM +0100, Marek Vasut wrote:
On Wednesday, December 18, 2013 at 07:47:38 PM, Albert ARIBAUD wrote:
Hi Marek,
On Wed, 18 Dec 2013 18:17:59 +0100, Marek Vasut ma...@denx.de wrote:
Hi
With the changes to make OOBFREE/ECCPOS configurable but default to
larger, we need to set these config options for the space savings they
provide.
Cc: Scott Wood scottw...@freescale.com
Cc: Heiko Schocher h...@denx.de
Signed-off-by: Tom Rini tr...@ti.com
---
include/configs/cam_enc_4xx.h |2
Hey,
The following changes since commit d2c7074b9593d822e2359a09c21747248fdf5fac:
ARM: OMAP5: clocks: Update MPU settings for OPP_NOM (2013-12-12 17:43:39
-0500)
are available in the git repository at:
git://git.denx.de/u-boot-ti.git master
for you to fetch changes up to
To add the Cadence SPI driver support for Altera SOCFPGA. It
required information such as clocks and timing from platform's
configuration header file within include/configs folder
Signed-off-by: Chin Liang See cl...@altera.com
Cc: Jagannadha Sutradharudu Teki jaga...@xilinx.com
---
On Tue, Dec 10, 2013 at 03:02:10PM +0530, Lokesh Vutla wrote:
This Patch series updates support for AM4372 EPOS and GP EVM boards.
AM4372 is a low cost Cortex-A9 based application processor targeted at
existing
ARM9/ARM11 base of customers that need more processing capabilities.
Currently
On Tue, Dec 17, 2013 at 02:14:06PM +0100, Stefan Roese wrote:
Patch f33b9bd3
[arm: omap3: Enable clocks for peripherals only if they are used]
breaks SPL booting on Beagleboard. Since some gpio input's are
read to detect the board revision. But with this patch above, the
clocks to the GPIO
On Fri, Nov 22, 2013 at 08:44:33AM -0600, Dan Murphy wrote:
Update the CONFIG_BOOTCMD to adopt the common
boot command which parses through USB, MMC and NAND.
This patch is dependent on the series starting with
http://patchwork.ozlabs.org/patch/292986/
Signed-off-by: Dan Murphy
Albert,
Please pull u-boot-tegra/master into ARM/master. Thanks!
./MAKEALL -s tegra AOK, checkpatch.pl is clean, and ./MAKEALL -a arm only
shows failures that were already present in ARM/master.
The following changes since commit d2c7074b9593d822e2359a09c21747248fdf5fac:
ARM: OMAP5: clocks:
Picked the HZ patch
The following changes since commit d2c7074b9593d822e2359a09c21747248fdf5fac:
ARM: OMAP5: clocks: Update MPU settings for OPP_NOM (2013-12-12 17:43:39
-0500)
are available in the git repository at:
git://git.denx.de/u-boot-pxa.git master
for you to fetch changes up to
Hi Tom,
On Wed, 18 Dec 2013 13:06:37 -0700, Tom Warren
twarren.nvi...@gmail.com wrote:
Albert,
Please pull u-boot-tegra/master into ARM/master. Thanks!
./MAKEALL -s tegra AOK, checkpatch.pl is clean, and ./MAKEALL -a arm only
shows failures that were already present in ARM/master.
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