On Sat, Jan 25, 2014 at 11:49 PM, Timur Tabiti...@tabi.org wrote:
-Original Message-
From: Timur Tabi [mailto:ti...@tabi.org]
Sent: Saturday, January 25, 2014 11:49 PM
To: Zhao Qiang-B45475
Cc: U-Boot Mailing List; Xu Jiucheng-B37781; Xie Xiaobo-R63061
Subject: Re: [U-Boot]
Timur Tabi wrote:
-Original Message-
From: Timur Tabi [mailto:ti...@tabi.org]
Sent: Sunday, January 26, 2014 12:37 PM
To: Zhao Qiang-B45475
Cc: U-Boot Mailing List; Xu Jiucheng-B37781; Xie Xiaobo-R63061
Subject: Re: [U-Boot] [PATCH] Powerpc/QE: Add QE support for T1040
From: Tang Yuantian yuantian.t...@freescale.com
The supplement configuration unit (SCFG) provides chip-specific
configuration and status registers for the device. It is the chip
defined module for extending the device configuration unit (DCFG)
module. It provides a set of CCSR registers in
Timur Tabi wrote:
-Original Message-
From: Timur Tabi [mailto:ti...@tabi.org]
Sent: Sunday, January 26, 2014 11:23 AM
To: Zhao Qiang-B45475
Cc: U-Boot Mailing List; Xu Jiucheng-B37781; Xie Xiaobo-R63061
Subject: Re: [U-Boot] [PATCH] Powerpc/QE: Add QE support for T1040
From: Tang Yuantian yuantian.t...@freescale.com
When system wakes up from warm reset, control is passed to the
primary core that starts executing uboot. After re-initialized some
IP blocks, like DDRC, kernel will take responsibility to continue
to restore environment it leaves before.
From: Tang Yuantian yuantian.t...@freescale.com
Add deep sleep support on T1040QDS platforms.
Signed-off-by: Tang Yuantian yuantian.t...@freescale.com
---
board/freescale/t1040qds/t1040qds.c | 12
include/configs/T1040QDS.h | 4
2 files changed, 16 insertions(+)
Hi Marek,
On 14/12/2013 05:55, Marek Vasut wrote:
Make indirect vectors addresses global, so they can be replaced by
various code that needs to do so. For example the MX6 PCI express
driver needs to temporarily replace data abort handler when reading
the config space.
Signed-off-by: Marek
Hi Marek,
On 14/12/2013 06:27, Marek Vasut wrote:
Split the SATA clock enabling function and add PCI express clock
enabling function. The SATA clock enabling function starts up the
100MHz SATA reference PLL in ENET_PLL register, but the code can
be re-used to enable the 125MHz PCIe reference in
Hi Marek,
On 14/12/2013 05:55, Marek Vasut wrote:
Add PCIe driver for the Freescale i.MX6 SoC . This driver operates the
PCIe block in RC mode only, the EP mode is NOT supported. The driver is
tested with the Intel e1000 NIC driver.
Signed-off-by: Marek Vasut ma...@denx.de
Cc: Albert Aribaud
Hi Marek,
On 14/12/2013 05:55, Marek Vasut wrote:
Enable PCI express on MX6 Sabrelite.
Signed-off-by: Marek Vasut ma...@denx.de
Cc: Albert Aribaud albert.u.b...@aribaud.net
Cc: Eric Nelson eric.nel...@boundarydevices.com
Cc: Fabio Estevam fabio.este...@freescale.com
Cc: Stefano Babic
Hi Fabio, hi Otavio,
On 22/01/2014 21:19, Fabio Estevam wrote:
From: Fabio Estevam fabio.este...@freescale.com
Currently when we boot a mx6dual U-boot reports that it is a mx6quad.
Report it as MX6D instead:
CPU: Freescale i.MX6D rev1.2 at 792 MHz
Signed-off-by: Fabio Estevam
Hi Fabio,
On 24/01/2014 12:15, Fabio Estevam wrote:
From: Fabio Estevam fabio.este...@freescale.com
No need to pass 'u-boot.imx' as parameter for 'make' because u-boot.imx is
built by default.
Signed-off-by: Fabio Estevam fabio.este...@freescale.com
---
board/boundary/nitrogen6x/README | 2
Hi Fabio,
On 24/01/2014 12:27, Fabio Estevam wrote:
From: Fabio Estevam fabio.este...@freescale.com
MAINTAINERS file has been removed from the project.
Replace its reference with 'boards.cfg' file instead.
Signed-off-by: Fabio Estevam fabio.este...@freescale.com
---
Applied to u-boot-imx,
On 21/01/2014 22:00, Marek Vasut wrote:
The name the Linux kernel expects is 'mxc_nand' , not 'mxc-nand' .
This patch renames the driver name.
Signed-off-by: Marek Vasut ma...@denx.de
Cc: Stefano Babic sba...@denx.de
---
include/configs/m53evk.h | 4 ++--
1 file changed, 2 insertions(+), 2
On 21/01/2014 22:00, Marek Vasut wrote:
Enable CONFIG_REGEX on M53EVK to allow usage of regular expressions
on environment variables.
Signed-off-by: Marek Vasut ma...@denx.de
Cc: Stefano Babic sba...@denx.de
---
Applied to u-boot-imx, thanks !
Best regards,
Stefano Babic
--
qiang.z...@freescale.com wrote:
T1040QDS has microcode for Fman and another microcode for QE.
The two microcodes is different.
QE microcode is needed.
Then why do you have an #else statement:
+#ifdef CONFIG_PPC_T1040
+ qe_upload_firmware((const void *)CONFIG_SYS_QE_UCODE_FW_ADDR);
On 23 January 2014 12:56, Stephen Warren swar...@wwwdotorg.org wrote:
From: Stephen Warren swar...@nvidia.com
Fix a few issues with the generic save shell command, and fs_write()
function.
1) fstypes[].write wasn't filled in for some file-systems, and isn't
checked when used, which
Hi Stephen,
On 23 January 2014 12:56, Stephen Warren swar...@wwwdotorg.org wrote:
From: Stephen Warren swar...@nvidia.com
This could be used in scripts such as:
if exists mmc 0:1 /boot/boot.scr; then
load mmc 0:1 ${scriptaddr} /boot/boot.scr
source ${scriptaddr}
fi
rather than:
On 23 January 2014 12:56, Stephen Warren swar...@wwwdotorg.org wrote:
From: Stephen Warren swar...@nvidia.com
This hooks into the generic file exists support added in the previous
patch, and provides an implementation for the sandbox test environment.
Signed-off-by: Stephen Warren
On 23 January 2014 12:56, Stephen Warren swar...@wwwdotorg.org wrote:
From: Stephen Warren swar...@nvidia.com
This hooks into the generic file exists support added in an earlier
patch, and provides an implementation for the ext4 filesystem.
Signed-off-by: Stephen Warren swar...@nvidia.com
Hi Stephen,
On 23 January 2014 12:57, Stephen Warren swar...@wwwdotorg.org wrote:
From: Stephen Warren swar...@nvidia.com
This hooks into the generic file exists support added in an earlier
patch, and provides an implementation for the ext4 filesystem.
s/ext4/fat
Signed-off-by: Stephen
Hi Patrice,
On 24 January 2014 14:39, Tom Rini tr...@ti.com wrote:
On Thu, Dec 19, 2013 at 11:10:24AM +0100, Patrice B wrote:
Hi,
I needed to be able to uncompress lzma files. I did this command
based on unzip command and propose it if it could help. Hopping the
patch is correctly
Hi Stephen,
On 24 January 2014 12:46, Stephen Warren swar...@wwwdotorg.org wrote:
From: Stephen Warren swar...@nvidia.com
Tegra124's MMC controller is very similar to earlier SoC generations,
and can be supported by the same driver.
However, there are some non-backwards-compatible HW
From: Fabio Estevam fabio.este...@freescale.com
Instead of duplicating the CPU definitions at mx5 and mx6 sys_proto.h header
files, introduce a common header to centralize such definitions.
Signed-off-by: Fabio Estevam fabio.este...@freescale.com
---
arch/arm/include/asm/arch-imx/cpu.h |
Currently when we boot a mx6dual U-boot reports that it is a mx6quad.
Report it as MX6D instead:
CPU: Freescale i.MX6D rev1.2 at 792 MHz
Signed-off-by: Fabio Estevam fabio.este...@freescale.com
---
arch/arm/cpu/armv7/mx6/soc.c| 14 +++---
arch/arm/imx-common/cpu.c |
Hi Aaron,
On 13 January 2014 23:13, Aaron Williams
aaron.willi...@caviumnetworks.com wrote:
Hi Simon,
Sorry for the long delay.
On 10/17/2013 03:27 PM, Simon Glass wrote:
Hi Aaron,
On Thu, Oct 17, 2013 at 12:24 AM, Aaron Williams
aaron.willi...@caviumnetworks.com wrote:
Hi all,
In
From: Fabio Estevam fabio.este...@freescale.com
Currently when we boot a mx6dual U-boot reports that it is a mx6quad.
Report it as MX6D instead:
CPU: Freescale i.MX6D rev1.2 at 792 MHz
Signed-off-by: Fabio Estevam fabio.este...@freescale.com
---
Changes since v3:
- Fix From field
Changes
From: Fabio Estevam fabio.este...@freescale.com
Instead of duplicating the CPU definitions at mx5 and mx6 sys_proto.h header
files, introduce a common header to centralize such definitions.
Signed-off-by: Fabio Estevam fabio.este...@freescale.com
---
Changes since v3:
- no changes
Changes since
Hi Stefano,
On Sun, Jan 26, 2014 at 10:07 AM, Stefano Babic sba...@denx.de wrote:
Agree generally with the patch, but it seems to me better, instead of fixing
the MX5 here, to move all CPU definitions outside the specific MX5/MX6 files
into imx-common. They can be then defined once else in
Dear Stephen Warren,
In message 1390507020-15766-2-git-send-email-swar...@wwwdotorg.org you wrote:
From: Stephen Warren swar...@nvidia.com
This could be used in scripts such as:
if exists mmc 0:1 /boot/boot.scr; then
load mmc 0:1 ${scriptaddr} /boot/boot.scr
source ${scriptaddr}
Hi Detlev,
On 17 January 2014 08:13, Detlev Zundel d...@denx.de wrote:
Hi Simon,
[...]
I think the Linux code has two big advantages - for one, we increase the
overlap with Linux kernel proper and secondly we keep the 'grep'ability
of the names which I really missed in your proposal.
Hi Heiko,
On 24 January 2014 23:44, Heiko Schocher h...@denx.de wrote:
check if a fdt is correct signed
pass an optional addr value. Contains the addr of the key blob
Signed-off-by: Heiko Schocher h...@denx.de
Cc: Simon Glass s...@chromium.org
---
common/cmd_fdt.c | 38
Hi Heiko,
On 24 January 2014 23:44, Heiko Schocher h...@denx.de wrote:
property sign-images is never found, fix this.
Signed-off-by: Heiko Schocher h...@denx.de
Cc: Simon Glass s...@chromium.org
---
tools/image-host.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git
On 24 January 2014 23:44, Heiko Schocher h...@denx.de wrote:
add sha256 support to fit images
Signed-off-by: Heiko Schocher h...@denx.de
Cc: Simon Glass s...@chromium.org
Acked-by: Simon Glass s...@chromium.org
---
common/image-fit.c | 5 +
include/image.h| 9 +
Hi Heiko,
On 24 January 2014 23:44, Heiko Schocher h...@denx.de wrote:
based on patch from andr...@oetken.name:
http://patchwork.ozlabs.org/patch/294318/
Should probably add the full commit message in here.
- removed checkpatch warnings
- removed compiler warnings
- rebased against
Hi Heiko,
On 24 January 2014 23:44, Heiko Schocher h...@denx.de wrote:
Signed-off-by: Heiko Schocher h...@denx.de
Cc: Simon Glass s...@chromium.org
Missing commit message. Is there no way to integrate this with
common/hash.c? Perhaps the start/finish part of the hashing algorithm
should be
Hi Fabio,
On 26/01/2014 18:06, Fabio Estevam wrote:
From: Fabio Estevam fabio.este...@freescale.com
Currently when we boot a mx6dual U-boot reports that it is a mx6quad.
Report it as MX6D instead:
CPU: Freescale i.MX6D rev1.2 at 792 MHz
Signed-off-by: Fabio Estevam
On Sun, Jan 26, 2014 at 8:39 PM, Stefano Babic sba...@denx.de wrote:
Hi Fabio,
On 26/01/2014 18:06, Fabio Estevam wrote:
From: Fabio Estevam fabio.este...@freescale.com
Currently when we boot a mx6dual U-boot reports that it is a mx6quad.
Report it as MX6D instead:
CPU: Freescale
Use setbits/clrbits macro instead of readl/writel function
Signed-off-by: Inha Song ideal.s...@samsung.com
---
Changes for v2:
- Coding Style cleanup
- add signed-off-by
Changes for v3:
- Modified to use mask value for clear bit
- Use clrsetbits instead of clrbits in exynos5_set_lcd_clk(void)
On Fri, 2014-01-24 at 08:43 +0800, Stephen Warren wrote:
From: Jim Lin ji...@nvidia.com
Fix the timeout issue after running bootp command in U-Boot console.
TXFIFOTHRES bits of TXFILLTUNING register should be set to 0x10 after a
controller reset and before RUN bit is se, (per technical
T4/B4 SoC's have a different version of ISBC. The secure boot
functionality is different with the new version of ISBC
compared to the earlier SoC's. So the version information is added
in file config_mpc85xx.h
Signed-off-by: Ruchika Gupta ruchika.gu...@freescale.com
Signed-off-by: Aneesh
Hello Simon,
Am 26.01.2014 22:04, schrieb Simon Glass:
Hi Heiko,
On 24 January 2014 23:44, Heiko Schocherh...@denx.de wrote:
check if a fdt is correct signed
pass an optional addr value. Contains the addr of the key blob
Signed-off-by: Heiko Schocherh...@denx.de
Cc: Simon
Hi Denx,
Thanks for replying, I have read the document, i have to enable
the POST as well with the macro CONFIG_POST and CONFIG_CMD_DIAG, but i
am getting lot of compilation errors. Am i missing something while
configuring ?? And post.h is also getting generated, which describes the
Hello Simon,
Am 26.01.2014 22:10, schrieb Simon Glass:
Hi Heiko,
On 24 January 2014 23:44, Heiko Schocherh...@denx.de wrote:
based on patch from andr...@oetken.name:
http://patchwork.ozlabs.org/patch/294318/
Should probably add the full commit message in here.
Ok, do this in v2.
-
Hi Denx,
Thanks for replying, I have read the document, i have to enable
the POST as well with the macro CONFIG_POST and CONFIG_CMD_DIAG, but i
am getting lot of compilation errors. Am i missing something while
configuring ?? And post.h is also getting generated, which describes the
Dear Heiko,
In message 52e5fe93.2030...@denx.de you wrote:
+ cfg_noffset = fit_conf_get_node(working_fdt, NULL);
+ if (!cfg_noffset)
+ return CMD_RET_FAILURE;
May need to print an error here, since otherwise it won't be clear
what
Dear aneesh.ban...@freescale.com,
In message
aba33ec5436c40939359f93b6d243...@dm2pr03mb415.namprd03.prod.outlook.com you
wrote:
CONFIG_SYS_FSL_SINGLE_SOURCE_CLK
Single Source Clock is clocking mode present in some of FSL
SoC's.
In this mode, a
Dear Pradeep,
In message 1390803626357-172426.p...@n7.nabble.com you wrote:
Thanks for replying, I have read the document, i have to enable
the POST as well with the macro CONFIG_POST and CONFIG_CMD_DIAG, but i
am getting lot of compilation errors. Am i missing something while
Hi Denx,
Logs for your Reference
---
post/libpost.a(post.o): In function `post_bootmode_get':
/home/raghu/Emerson_BSP/p2020/u-boot/u-boot-2009.11/post/post.c:91:
undefined reference to `post_word_load'
post/libpost.a(post.o): In function `post_bootmode_init':
CONFIG_SYS_FSL_SINGLE_SOURCE_CLK
Single Source Clock is clocking mode present in some of FSL
SoC's.
In this mode, a single differential clock is used to supply
You already have all relevant information present in the current
configuration.
The workaround for IFC errata A003399 was not enabled
in case of secure boot. So, secure boot from NOR was not
working.
Signed-off-by: Aneesh Bansal aneesh.ban...@freescale.com
---
include/configs/P1010RDB.h | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git
diff --git a/arch/powerpc/include/asm/fsl_secure_boot.h
b/arch/powerpc/include/asm/fsl_secure_boot.h
index 4c7f0b1..db124df 100644
--- a/arch/powerpc/include/asm/fsl_secure_boot.h
+++ b/arch/powerpc/include/asm/fsl_secure_boot.h
@@ -15,5 +15,11 @@
#endif
#define
In case of secure boot, boot from NAND is ramboot.
It was removed by some other commit. So defining it again.
In case of not-secure-boot, it's not ramboot.
What user of CONFIG_SYS_RAMBOOT are you concerned about? Many of them
look like this:
#elif !defined(CONFIG_SYS_RAMBOOT)
ISBC creates a LAW 0 entry for non PBL platforms, which is not
disabled before transferring the control to uboot.
The LAW 0 entry has to be disabled.
Signed-off-by: Aneesh Bansal aneesh.ban...@freescale.com
---
arch/powerpc/cpu/mpc85xx/start.S | 58
Hello Simon,
Am 26.01.2014 22:19, schrieb Simon Glass:
Hi Heiko,
On 24 January 2014 23:44, Heiko Schocherh...@denx.de wrote:
Signed-off-by: Heiko Schocherh...@denx.de
Cc: Simon Glasss...@chromium.org
Missing commit message. Is there no way to integrate this with
common/hash.c? Perhaps the
Hello Wolfgang,
Am 27.01.2014 07:50, schrieb Wolfgang Denk:
Dear Heiko,
In message52e5fe93.2030...@denx.de you wrote:
+ cfg_noffset = fit_conf_get_node(working_fdt, NULL);
+ if (!cfg_noffset)
+ return CMD_RET_FAILURE;
May need to print an
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