Hi Marek,
On Thursday, February 06, 2014 at 07:33:07 AM, Lukasz Majewski wrote:
Hi Marek,
On Wednesday, February 05, 2014 at 10:10:41 AM, Lukasz Majewski
wrote:
Calls to malloc() have been replaced by memalign. It now
provides proper buffer alignment.
Signed-off-by:
From: rick r...@andestech.com
can not execute get_ram_size(), because the
text/data will be corrupted by itself
in specific case.
Signed-off-by: rick r...@andestech.com
Cc: Andes ub...@andestech.com
---
board/AndesTech/adp-ag101p/adp-ag101p.c | 18 +++---
1 files changed, 7
Hi Tom,
here are my two pending patches around fpgas.
Please pull them to your tree.
Thanks,
Michal
The following changes since commit e141652b9cd0cb4f899f7a0fd71c8a438300e365:
config: Fix line lengths in include/config_distro_defaults.h (2014-02-05
08:04:38 -0500)
are available in the git
Hi,
I am trying to get u-boot snow (2014.01) running on a chromebook ARM
(chainloaded u-boot).
It seems to be running because if I enter the 'reset' command, then it reboots.
But the problem is I only have a black screen, a white flash and again the
black screen.
Is it expected that LCD stay
On 04.02.2014, at 03:52, Scott Wood scottw...@freescale.com wrote:
On Fri, 2014-01-31 at 12:16 +0100, Alexander Graf wrote:
The only thing we know in our PV machine through device tree is the clock
speed of the CPUs. Take that as CPU speed, system speed and ddr speed so that
we have some
On 04.02.2014, at 02:59, Scott Wood scottw...@freescale.com wrote:
On Fri, 2014-01-31 at 12:16 +0100, Alexander Graf wrote:
With the qemu-ppce500 machine type we can run the same board with
either an e500v2 or an e500mc core plugged in.
This means that the IVOR setup can't be based on
On 02/05/14 19:00, Marek Vasut wrote:
On Wednesday, February 05, 2014 at 01:40:27 PM, Mateusz Zalega wrote:
[...]
Are these two new functions called from multiple places at all? If not,
just inline these ll_foo() calls and be done with it. FYI you can also
make macros for these to avoid
Dear Tim,
In message caj+vnu2udv1yeujh79uznf01jtamde7p8u-g_x1hendg7mk...@mail.gmail.com
you wrote:
+/*
+ * Hardware Monitor
+ */
+#define GSC_HWMON_TEMP 0x00
+#define GSC_HWMON_VIN0x02
+#define GSC_HWMON_VDD_3P30x05
+#define GSC_HWMON_VBATT
Dear Marek Vasut,
In message 1391658352-24754-3-git-send-email-ma...@denx.de you wrote:
Implement support for encrypting/decrypting the environment block
into the tools/env/fw_* tools. The cipher used is AES 128 CBC and
the implementation depends solely on components internal to U-Boot.
...
Dear Marek,
In message 1391658426-24799-1-git-send-email-ma...@denx.de you wrote:
This patch adds support for SHA-256 hash into the FIT image. The usage is
as with the other hashing algorithms:
...
-#define FIT_MAX_HASH_LEN 20 /* max(crc32_len(4), sha1_len(20)) */
+#define
Dear Marek,
In message 1391658426-24799-2-git-send-email-ma...@denx.de you wrote:
Separate out the SHA1 code from the rsa-sign.c and rsa-verify.c .
Each file now has a function which does the correct hashing operation
instead of having the SHA-1 hashing operation hard-coded in the rest
of the
Dear Andes,
In message 1391675928-28370-1-git-send-email-ub...@andestech.com you wrote:
From: rick r...@andestech.com
can not execute get_ram_size(), because the
text/data will be corrupted by itself
in specific case.
You must be doing something wrong then. Of course you have to run
On 04.02.2014, at 03:19, Scott Wood scottw...@freescale.com wrote:
On Fri, 2014-01-31 at 12:16 +0100, Alexander Graf wrote:
+void pci_init_board(void)
+{
+struct fsl_pci_info pci_info;
+const void *fdt = get_fdt();
+int pci_node;
+
+puts(\n);
+
+pci_node =
On 04.02.2014, at 03:24, Scott Wood scottw...@freescale.com wrote:
On Fri, 2014-01-31 at 12:16 +0100, Alexander Graf wrote:
The definition of our ppce500 PV machine is that every address is dynamically
determined through device tree bindings.
So don't hardcode where CCSR is in our physical
Hi ,
I am new to u-boot code. I had a requirement for running memory, cpu and
cache tests as part of diagnostics, on an ARM based platform. After
going through the code, I found that only PPC variants are available for
cpu and cache post tests.
Please help me...
Thanks,
shobin.b
On 04.02.2014, at 03:47, Scott Wood scottw...@freescale.com wrote:
On Fri, 2014-01-31 at 12:16 +0100, Alexander Graf wrote:
The definition of our ppce500 PV machine is that every address is dynamically
determined through device tree bindings.
So don't hardcode where PCI devices are in our
On Thu, Feb 06, 2014 at 01:07:44PM +0100, Wolfgang Denk wrote:
Dear Tim,
In message
caj+vnu2udv1yeujh79uznf01jtamde7p8u-g_x1hendg7mk...@mail.gmail.com you
wrote:
[snip]
This causes a checkpatch error:
ERROR: Macros with complex values should be enclosed in parenthesis
Please
Hello Jyoti,
I think you're confused about the use of un-partitioned space
for booting (which is common on many other boards) and the use
of the filesystem as a path to SPI-NOR used by our boards.
On 02/05/2014 11:59 PM, JYOTI DUBEY wrote:
I followed the following commands to achieve a
With e0059ea switching to using SZ_1K, we need to #include asm/sizes.h
here for everyone to build still.
Signed-off-by: Tom Rini tr...@ti.com
---
include/usb/s3c_udc.h |1 +
1 file changed, 1 insertion(+)
diff --git a/include/usb/s3c_udc.h b/include/usb/s3c_udc.h
index 6dead2f..ce3dd2c
On Thursday, February 06, 2014 at 12:56:58 PM, Mateusz Zalega wrote:
On 02/05/14 19:00, Marek Vasut wrote:
On Wednesday, February 05, 2014 at 01:40:27 PM, Mateusz Zalega wrote:
[...]
Are these two new functions called from multiple places at all? If not,
just inline these ll_foo()
On Thursday, February 06, 2014 at 01:16:31 PM, Wolfgang Denk wrote:
[...]
All input considered, thanks! I have but a quick question -- why does the fw_*
tools source look _so_ bad ? Don't you think it needs quite some cleanup ? What
do you think please?
Best regards,
Marek Vasut
On Thursday, February 06, 2014 at 01:18:31 PM, Wolfgang Denk wrote:
Dear Marek,
In message 1391658426-24799-2-git-send-email-ma...@denx.de you wrote:
Separate out the SHA1 code from the rsa-sign.c and rsa-verify.c .
Each file now has a function which does the correct hashing operation
From: Stephen Warren swar...@nvidia.com
A QH's overlay QTD altnext pointer should be explicitly marked invalid
so that the EHCI controller knows to look at the QTD next pointer. Update
the driver to do this.
Signed-off-by: Stephen Warren swar...@nvidia.com
---
drivers/usb/host/ehci-hcd.c | 2 ++
From: Stephen Warren swar...@nvidia.com
These data structures are passed to cache-flushing routines, and hence
must be conform to both the USB the cache-flusing alignment requirements.
That means aligning to USB_DMA_MINALIGN. This is important on systems
where cache lines are 32 bytes.
Dear Marek,
In message 201402062041.23537.ma...@denx.de you wrote:
[...]
All input considered, thanks! I have but a quick question -- why does the
fw_*
tools source look _so_ bad ? ...
Because it was written more than a decade ago, when rules were not as
strict yet, and personal
On Thu, Feb 06, 2014 at 02:27:19PM -0500, Tom Rini wrote:
With e0059ea switching to using SZ_1K, we need to #include asm/sizes.h
here for everyone to build still.
Signed-off-by: Tom Rini tr...@ti.com
Applied to u-boot/master, thanks!
--
Tom
signature.asc
Description: Digital signature
On Thu, Feb 06, 2014 at 10:11:41AM +0100, Michal Simek wrote:
Hi Tom,
here are my two pending patches around fpgas.
Please pull them to your tree.
Thanks,
Michal
The following changes since commit e141652b9cd0cb4f899f7a0fd71c8a438300e365:
config: Fix line lengths in
On Thu, Feb 06, 2014 at 04:51:33AM +0100, Marek Vasut wrote:
The following changes since commit e141652b9cd0cb4f899f7a0fd71c8a438300e365:
config: Fix line lengths in include/config_distro_defaults.h (2014-02-05
08:04:38 -0500)
are available in the git repository at:
On Mon, Feb 03, 2014 at 12:46:30PM +0900, Masahiro Yamada wrote:
Hello Simon and Tom,
This is my analysis of Kbuild performance.
[snip]
Conclusion:
The main reasons of the slow down with Kbuild are fixdep and arg-check.
Both of them are really important features for Kbuild and Kconfig.
do_bootm_standanlone() calls ntohl(images-ep) which is wrong because
endianess conversion has already been done:
do_bootm()
\-do_bootm_states()
+-bootm_find_os()
| \-images.ep = image_get_ep();
| \-uimage_to_cpu(hdr-ih_ep);
\-boot_selected_os()
\-do_bootm_standanlone()
Without this
On Thu, 2014-02-06 at 14:26 +0100, Alexander Graf wrote:
On 04.02.2014, at 03:47, Scott Wood scottw...@freescale.com wrote:
On Fri, 2014-01-31 at 12:16 +0100, Alexander Graf wrote:
The definition of our ppce500 PV machine is that every address is
dynamically
determined through device
On Thu, 2014-02-06 at 13:48 +0100, Alexander Graf wrote:
On 04.02.2014, at 03:19, Scott Wood scottw...@freescale.com wrote:
On Fri, 2014-01-31 at 12:16 +0100, Alexander Graf wrote:
+void pci_init_board(void)
+{
+ struct fsl_pci_info pci_info;
+ const void *fdt = get_fdt();
+ int
On 06.02.2014, at 23:55, Scott Wood scottw...@freescale.com wrote:
On Thu, 2014-02-06 at 13:48 +0100, Alexander Graf wrote:
On 04.02.2014, at 03:19, Scott Wood scottw...@freescale.com wrote:
On Fri, 2014-01-31 at 12:16 +0100, Alexander Graf wrote:
+void pci_init_board(void)
+{
+ struct
On Fri, 2014-02-07 at 00:28 +0100, Alexander Graf wrote:
On 06.02.2014, at 23:55, Scott Wood scottw...@freescale.com wrote:
On Thu, 2014-02-06 at 13:48 +0100, Alexander Graf wrote:
On 04.02.2014, at 03:19, Scott Wood scottw...@freescale.com wrote:
On Fri, 2014-01-31 at 12:16 +0100,
CONFIG_SYS_GBL_DATA_SIZE is not used any more.
The size of struct global_data is automatically calculated
by asm-offsets. (See lib/asm-offsets.c)
GENERATED_GBL_DATA_SIZE should be used instead of
CONFIG_SYS_GBL_DATA_SIZE.
Signed-off-by: Masahiro Yamada yamad...@jp.panasonic.com
---
On Thu, 2014-02-06 at 12:40 +0100, Alexander Graf wrote:
On 04.02.2014, at 02:59, Scott Wood scottw...@freescale.com wrote:
On Fri, 2014-01-31 at 12:16 +0100, Alexander Graf wrote:
With the qemu-ppce500 machine type we can run the same board with
either an e500v2 or an e500mc core plugged
This patchset introduces the Broadcom bcm281xx family of mobile SoC
chips. Broadcom kona hardware blocks are often found in Broadcom mobile
SoC chips including the bcm281xx family, so support for some of these
kona blocks is also provided here. These patches work on u-boot master
as well as the
Add support for the bcm28155_ap reference board.
Signed-off-by: Darwin Rambo dra...@broadcom.com
Reviewed-by: Steve Rae s...@broadcom.com
Reviewed-by: Tim Kryger tkry...@linaro.org
---
board/broadcom/bcm28155_ap/Makefile |7 ++
board/broadcom/bcm28155_ap/bcm28155_ap.c | 87
The Kona architecture is present on a number of Broadcom mobile SoCs
including the bcm281xx family of chips.
Signed-off-by: Darwin Rambo dra...@broadcom.com
Reviewed-by: Steve Rae s...@broadcom.com
Reviewed-by: Tim Kryger tkry...@linaro.org
---
arch/arm/cpu/armv7/Makefile|
Add support for the Kona I2C controller found on Broadcom mobile SoCs.
Signed-off-by: Darwin Rambo dra...@broadcom.com
Reviewed-by: Steve Rae s...@broadcom.com
Reviewed-by: Tim Kryger tkry...@linaro.org
---
drivers/i2c/Makefile |1 +
drivers/i2c/kona_i2c.c | 730
Add support for the Kona GPIO controller found on Broadcom mobile SoCs.
Signed-off-by: Darwin Rambo dra...@broadcom.com
Reviewed-by: Steve Rae s...@broadcom.com
Reviewed-by: Markus Mayer markus.ma...@linaro.org
Reviewed-by: Tim Kryger tkry...@linaro.org
---
drivers/gpio/Makefile|1 +
Add support for the Kona SDHCI found on Broadcom mobile SoCs.
Signed-off-by: Darwin Rambo dra...@broadcom.com
Reviewed-by: Steve Rae s...@broadcom.com
Reviewed-by: Tim Kryger tkry...@linaro.org
---
drivers/mmc/Makefile |1 +
drivers/mmc/kona_sdhci.c | 134
Add bcm281xx architecture support code including a clock framework and
chip reset. Define register block base addresses for the bcm281xx
architecture and create an empty gpio header file required when
CONFIG_CMD_GPIO is set.
Signed-off-by: Darwin Rambo dra...@broadcom.com
Reviewed-by: Steve Rae
On Thursday, February 06, 2014 at 08:27:19 PM, Tom Rini wrote:
With e0059ea switching to using SZ_1K, we need to #include asm/sizes.h
here for everyone to build still.
Signed-off-by: Tom Rini tr...@ti.com
Acked-by: Marek Vasut ma...@denx.de
---
include/usb/s3c_udc.h |1 +
1 file
Hi Tom,
Please pull the following patches for Blackfin from u-boot-blackfin
into your tree.
Thanks
Sonic Zhang
The following changes since commit dbf3de2dd26cae37d16b00b348828c883b658cc5:
include/usb/s3c_udc.h: Add asm/sizes.h (2014-02-06 14:26:05 -0500)
are available in the git
Hi Pantelis Antoniou,
Please do let me know if any coments on the same.
Regards,
Rajeshwari
On Thu, Feb 6, 2014 at 7:24 AM, Jaehoon Chung jh80.ch...@samsung.com wrote:
Hi.
Right, It's reasonable. Looks good to me.
Acked-by: Jaehoon Chung jh80.ch...@samsung.com
Best Regards,
Jaehoon
On Thu, 2014-02-06 at 12:11 +0100, Alexander Graf wrote:
On 04.02.2014, at 03:52, Scott Wood scottw...@freescale.com wrote:
On Fri, 2014-01-31 at 12:16 +0100, Alexander Graf wrote:
The only thing we know in our PV machine through device tree is the clock
speed of the CPUs. Take that as
On Thursday, February 06, 2014 at 09:13:05 PM, Stephen Warren wrote:
From: Stephen Warren swar...@nvidia.com
A QH's overlay QTD altnext pointer should be explicitly marked invalid
so that the EHCI controller knows to look at the QTD next pointer. Update
the driver to do this.
Can you please
On Thursday, February 06, 2014 at 09:13:06 PM, Stephen Warren wrote:
From: Stephen Warren swar...@nvidia.com
These data structures are passed to cache-flushing routines, and hence
must be conform to both the USB the cache-flusing alignment requirements.
That means aligning to
Hi Tom,
I have incorporated the feedback on the MMC and I2C drivers from Jaehoon
(via Panto) and Heiko respectively, and was wondering if there is
anything else that needs to be done? Please note that these same patches
work on both the latest u-boot master and the u-boot-arm trees. Thanks!
hello,
I made http://www.xrefs.info available to open source community in
the hope of making open source developers more productive.
The site hosts many open source code projects' cross references based
on OpenGrok,
which is a very fast cross reference tool, and easy to use.
u-boot is a very
On 22/01/14 23:54, Piotr Wilczek wrote:
This patchset adds runtime variables for Samsung boards that describe
build configuration (arch, soc, board, vendor).
Additionally, more envs describing platform (soc and board revision) are added
to Samsung common code.
For boards Trats and Trats2,
Hi Tom,
On Thu, Feb 06, 2014 at 02:27:19PM -0500, Tom Rini wrote:
With e0059ea switching to using SZ_1K, we need to #include
asm/sizes.h here for everyone to build still.
Signed-off-by: Tom Rini tr...@ti.com
Applied to u-boot/master, thanks!
Thanks for fixing. I must confess
On 02/06/2014 07:53 PM, Marek Vasut wrote:
On Thursday, February 06, 2014 at 09:13:05 PM, Stephen Warren wrote:
From: Stephen Warren swar...@nvidia.com
A QH's overlay QTD altnext pointer should be explicitly marked invalid
so that the EHCI controller knows to look at the QTD next pointer.
On 02/06/2014 07:53 PM, Marek Vasut wrote:
On Thursday, February 06, 2014 at 09:13:06 PM, Stephen Warren wrote:
From: Stephen Warren swar...@nvidia.com
These data structures are passed to cache-flushing routines, and hence
must be conform to both the USB the cache-flusing alignment
Adds support for Bernecker Rainer Industrieelektronik GmbH T-Series
Motherboard, using TI's AM3352 SoC.
Most of code is derived from TI's AM335x_EVM
Signed-off-by: Hannes Petermaier oe5...@oevsv.at
---
Changes for v3:
- created a bur_am335x_common.h config file
- shared common BR code
On Tue, 2014-02-04 at 12:56 +0400, Alexey Brodkin wrote:
This patch series adds support for the Synopsys DesignWare ARC700
architecture.
Any chance to get this series (its 4th re-spin)
reviewed/commented/accepted?
Regards,
Alexey
___
U-Boot mailing
On 27/01/14 23:15, Piotr Wilczek wrote:
This patch adds common board file for Exynos 4 based boards.
Signed-off-by: Piotr Wilczek p.wilc...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
arch/arm/dts/exynos4.dtsi| 139 +++
On 27/01/14 23:15, Piotr Wilczek wrote:
This patch enables parsing mipi data from device tree.
Non device tree case is still supported.
Signed-off-by: Piotr Wilczek p.wilc...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
Cc: Minkyu Kang mk7.k...@samsung.com
---
On 27/01/14 23:15, Piotr Wilczek wrote:
This patch adds additional data parsing from DTB.
Signed-off-by: Piotr Wilczek p.wilc...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
Cc: Minkyu Kang mk7.k...@samsung.com
---
drivers/video/exynos_fb.c | 19 +++
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