Hello Tom,
(dropping dead emails from Cc)
(adding Albert to Cc)
When I Cced board maintainers, some of them resulted
in bounce mails.
I'd say at least 8 addresses (listed as Cc: below)
are dead.
After discussing with Detlev, I agreed to just mark
them as dead address and keep them.
Hi Jaehoon,
On 03/05/2014 06:21 PM, Lukasz Majewski wrote:
Hi Beomho,
This patch set for use dw mmc controller.
First, add dw mmc controller initialization.
And then, change exynos4 mmc gpio configuration.
Additionally, I have removed exynos4x12_set_mmc_clk function.
Because
- change QIXIS timing parameter CONFIG_SYS_CS3_FTIM2 to 8 from 0.
- fix EMI2 for t2080qds, which was caused by adding t2081qds.
Signed-off-by: Shengzhou Liu shengzhou@freescale.com
---
board/freescale/t208xqds/eth_t208xqds.c | 3 ++-
include/configs/T208xQDS.h | 2 +-
2 files
On 03/06/2014 04:00 PM, Minkyu Kang wrote:
On 05/03/14 10:57, Beomho Seo wrote:
Remove exynos4x12_set_mmc_clk.
Please describe here why you remove it.
exynos4x12_set_mmc_clk function have been removed.
Because exynos4x12_clock/ exnos4_clock have same div_fsys* value.
I will describe here
-Original Message-
From: Wood Scott-B07421
Sent: Wednesday, March 05, 2014 11:30 PM
To: Bansal Aneesh-B39320
Cc: Sun York-R58495; Wolfgang Denk; u-boot@lists.denx.de; Gupta
Ruchika-R66431
Subject: Re: [U-Boot] [PATCH 1/3] powerpc/p1010rdb: SECURE BOOT-
define CONFIG_SYS_RAMBOOT for
To all,
Does anyone know if U-Boot supports Kontron's COMM-e bIP6 Processors ?
I believe the core for these processors is Intel's I-series processors.
Any info would be appreciated.
Thanks,
Sam Nilssen
___
U-Boot mailing list
U-Boot@lists.denx.de
Hi Masahiro,
On Thu, 06 Mar 2014 17:05:24 +0900, Masahiro Yamada
yamad...@jp.panasonic.com wrote:
Hello Tom,
(dropping dead emails from Cc)
(adding Albert to Cc)
When I Cced board maintainers, some of them resulted
in bounce mails.
I'd say at least 8 addresses (listed as Cc: below)
Hi Krishna,
Thanks for attempt to improve DFU.
I've CCed Tormod Volden, who is involved in dfu-util development.
Hi All,
I was working with dfu-utill couple of years ago as part of my
thesis. My task was to provide a firmware upgrade mechanism using
USB. I had an open moko so I thought of
Hi Pantelis,
Hi Lukasz,
On Feb 27, 2014, at 11:21 AM, Lukasz Majewski wrote:
Hi Pantelis,
Hi Lukasz,
On Feb 27, 2014, at 10:36 AM, Lukasz Majewski wrote:
Hi Pantelis,
Hi Lukasz,
Looks fine to me. Let me run a few tests over the weekend and
I'll apply.
Signed-off-by: Prabhakar Kushwaha prabha...@freescale.com
---
Add support of 2 stage NAND boot loader in cornet platforms using SPL framework.
In current secenrio size of u-boot can become =512KB. So This patch set will
be
helpful for those SoC which has less internal SRAM(512KB).
here, PBL
SPL linker has fix location of bootpg and reset vector with respect to text
base.
It is not necessary to have fixed locations.
Avoid such hardcoding.
Signed-off-by: Prabhakar Kushwaha prabha...@freescale.com
---
Changes for v2: Sending as it is
arch/powerpc/cpu/mpc85xx/u-boot-spl.lds |7
Current SPL code base has BSS section placed after reset_vector. This means
they have to relocate to use the global variables. This put an implicit
requirement of having SPL size = Memory/2.
To avoid relocation:
- Move bss_section within SPL range
- Modify relocate_code()
LAW_EN is only defined if CONFIG_SYS_CCSRBAR_DEFAULT is not equal to
CONFIG_SYS_CCSRBAR_PHYS. in SPL framework CCSRBAR is not relocated hence
both are same. This cause compilation error.
So LAW_EN define outside of configs
Signed-off-by: Prabhakar Kushwaha prabha...@freescale.com
---
Changes
It is not necessary for SPL to define all required LAW of the system.
Re-parse LAW table again during non SPL boot.
Signed-off-by: Prabhakar Kushwaha prabha...@freescale.com
---
Changes for v2: Sending as it is
arch/powerpc/cpu/mpc8xxx/law.c |9 -
1 file changed, 9 deletions(-)
Add support of 2 stage NAND boot loader using SPL framework.
here, PBL initialise the internal SRAM and copy SPL(96K). This further
initialise DDR using SPD and environment and copy u-boot(512 kb) from NAND to
DDR.
Finally SPL transer control to u-boot.
Initialise/create followings required for
Objective of this target to have concatenate binary having
- SPL binary in PBL command format
- U-boot binary
Signed-off-by: Prabhakar Kushwaha prabha...@freescale.com
---
Changes for v2: Updated target
Makefile | 12
README |4
2 files changed, 16
nand_spl_load_image() can also be used for non TPL framework.
Signed-off-by: Prabhakar Kushwaha prabha...@freescale.com
---
Changes for v2: Sending as it is
drivers/mtd/nand/fsl_ifc_spl.c |4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/mtd/nand/fsl_ifc_spl.c
On Thu, Mar 06, 2014 at 11:10:56AM +0100, Albert ARIBAUD wrote:
Hi Masahiro,
On Thu, 06 Mar 2014 17:05:24 +0900, Masahiro Yamada
yamad...@jp.panasonic.com wrote:
Hello Tom,
(dropping dead emails from Cc)
(adding Albert to Cc)
When I Cced board maintainers, some of them resulted
Hi Troy,
On 05/03/2014 20:30, Troy Kisky wrote:
Since we are slowly heading toward a single u-boot for quad/duallite,
can we find a solution to this now.
mx6sabre_common.h: fdt_file= CONFIG_DEFAULT_FDT_FILE \0 \
mx6sabresd.h:#define CONFIG_DEFAULT_FDT_FILEimx6q-sabresd.dtb
Hi Fabio,
On 05/03/2014 19:51, Fabio Estevam wrote:
From: Fabio Estevam fabio.este...@freescale.com
Allow the boot of a device tree mainline kernel by aligning the environment
variables with other FSL boards.
Tested NFS boot of a dt 3.14-rc5 kernel.
Signed-off-by: Fabio Estevam
For clear separation of user's (OS) filesystem to U-Boot and other's
stuff it is now possible to give the filesystem a specific offset and a
specific size.
For full consistency OS storage driver also has to support this and
has to use same offset and size.
Following new parameters has been added
- Adds support for a minimal framebuffer driver of TI's AM335x SoC
to be compatible with Wolfgang Denk's LCD-Framework (CONFIG_LCD,
common/lcd.c)
Signed-off-by: Hannes Petermaier oe5...@oevsv.at
---
drivers/video/Makefile|1 +
drivers/video/am335x-fb.c | 169
- Adds support for 32-bit organized framebuffers to the LCD-framework.
- cleaned up unused functions
Signed-off-by: Hannes Petermaier oe5...@oevsv.at
---
common/lcd.c | 52 +---
include/lcd.h | 19 ---
2 files changed, 49
Hello Hannes,
Am 06.03.2014 14:39, schrieb Hannes Petermaier:
- Adds support for a minimal framebuffer driver of TI's AM335x SoC
to be compatible with Wolfgang Denk's LCD-Framework (CONFIG_LCD,
common/lcd.c)
Signed-off-by: Hannes Petermaieroe5...@oevsv.at
---
drivers/video/Makefile
On 2014-03-06 14:58, Heiko Schocher wrote:
Hello Hannes,
Am 06.03.2014 14:39, schrieb Hannes Petermaier:
- Adds support for a minimal framebuffer driver of TI's AM335x SoC
to be compatible with Wolfgang Denk's LCD-Framework (CONFIG_LCD,
common/lcd.c)
Signed-off-by: Hannes
- Adds support for CONFIG_LCD_NOSTDOUT, which prevents switching
stdout to the LCD screen, usefull in case when only lcd_puts(...),
lcd_printf(...) is used for displaying status informations.
Signed-off-by: Hannes Petermaier oe5...@oevsv.at
---
README |7 +++
common/lcd.c |
Hi Tom,
On Thu, 6 Mar 2014 06:55:46 -0500, Tom Rini tr...@ti.com wrote:
On Thu, Mar 06, 2014 at 11:10:56AM +0100, Albert ARIBAUD wrote:
Hi Masahiro,
On Thu, 06 Mar 2014 17:05:24 +0900, Masahiro Yamada
yamad...@jp.panasonic.com wrote:
Hello Tom,
(dropping dead emails from Cc)
Albert,
Please pull u-boot-tegra/master into ARM/master. Thanks!
./MAKEALL -s tegra AOK, checkpatch.pl is clean, and ./MAKEALL -a arm only
shows failures that were already present in ARM/master.
The following changes since commit cc07294bc704694ae33db75b25ac557e5917a83f:
arm: am335x: DXR2:
Hey,
The following changes since commit cc07294bc704694ae33db75b25ac557e5917a83f:
arm: am335x: DXR2: Reset SMSC LAN9303 switch via GPIO upon bootup (2014-03-04
09:42:07 -0500)
are available in the git repository at:
git://git.denx.de/u-boot-ti.git master
for you to fetch changes up to
On Thu, Mar 06, 2014 at 07:03:24AM +0100, Hannes Petermaier wrote:
BR boards are using Phy Addresses 'one' and 'two', prior this was
defined through #define PHYADDR 1 within a header file.
Now this is addresses are given with device-driver structure.
Signed-off-by: Hannes Petermaier
On Thu, 2014-03-06 at 09:48 -0600, Kumar Gala wrote:
On Jan 23, 2014, at 6:11 AM, Alexander Graf ag...@suse.de wrote:
On 21.01.2014, at 03:25, Scott Wood scottw...@freescale.com wrote:
On Sun, 2014-01-19 at 16:19 +0100, Alexander Graf wrote:
With the qemu-ppce500 machine type we can
On Mar 6, 2014, at 9:50 AM, Scott Wood scottw...@freescale.com wrote:
On Thu, 2014-03-06 at 09:48 -0600, Kumar Gala wrote:
On Jan 23, 2014, at 6:11 AM, Alexander Graf ag...@suse.de wrote:
On 21.01.2014, at 03:25, Scott Wood scottw...@freescale.com wrote:
On Sun, 2014-01-19 at 16:19
Hi Kumar,
On 3/6/2014 9:21 PM, Kumar Gala wrote:
On Mar 6, 2014, at 6:12 AM, Prabhakar Kushwaha prabha...@freescale.com wrote:
LAW_EN is only defined if CONFIG_SYS_CCSRBAR_DEFAULT is not equal to
CONFIG_SYS_CCSRBAR_PHYS. in SPL framework CCSRBAR is not relocated hence
both are same. This
Hi Tom,
2014-03-06 16:45 GMT+01:00 Tom Rini tr...@ti.com:
Hey,
The following changes since commit cc07294bc704694ae33db75b25ac557e5917a83f:
arm: am335x: DXR2: Reset SMSC LAN9303 switch via GPIO upon bootup
(2014-03-04 09:42:07 -0500)
are available in the git repository at:
On Mar 6, 2014, at 6:12 AM, Prabhakar Kushwaha prabha...@freescale.com wrote:
LAW_EN is only defined if CONFIG_SYS_CCSRBAR_DEFAULT is not equal to
CONFIG_SYS_CCSRBAR_PHYS. in SPL framework CCSRBAR is not relocated hence
both are same. This cause compilation error.
So LAW_EN define outside
On Jan 23, 2014, at 6:11 AM, Alexander Graf ag...@suse.de wrote:
On 21.01.2014, at 03:25, Scott Wood scottw...@freescale.com wrote:
On Sun, 2014-01-19 at 16:19 +0100, Alexander Graf wrote:
With the qemu-ppce500 machine type we can run the same board with
either an e500v2 or an e500mc
On Thu, Mar 06, 2014 at 10:45:22AM -0500, Tom Rini wrote:
Hey,
The following changes since commit cc07294bc704694ae33db75b25ac557e5917a83f:
arm: am335x: DXR2: Reset SMSC LAN9303 switch via GPIO upon bootup
(2014-03-04 09:42:07 -0500)
are available in the git repository at:
On Thu, Mar 06, 2014 at 05:05:42PM +0100, Enric Balletbo Serra wrote:
Hi Tom,
2014-03-06 16:45 GMT+01:00 Tom Rini tr...@ti.com:
Hey,
The following changes since commit cc07294bc704694ae33db75b25ac557e5917a83f:
arm: am335x: DXR2: Reset SMSC LAN9303 switch via GPIO upon bootup
On Sat, Jan 25, 2014 at 4:52 PM, Enric Balletbo i Serra
eballe...@gmail.com wrote:
Enable required clocks for GPIO to fix a boot issue introduced by commit
f33b9bd3984fb11e1d8566a866adc5957b1e1c9d (arm: omap3: Enable clocks for
peripherals only if they are used).
Without this patch the
On Thu, 2014-03-06 at 09:56 -0600, Kumar Gala wrote:
On Mar 6, 2014, at 9:50 AM, Scott Wood scottw...@freescale.com wrote:
This has nothing to do with U-Boot's own exception handlers -- this is
what U-Boot is currently doing just prior to entering the OS.
-Scott
Oh, right. Did
On 3/5/2014 12:38 PM, Otavio Salvador wrote:
On Wed, Mar 5, 2014 at 4:30 PM, Troy Kisky
troy.ki...@boundarydevices.com wrote:
Since we are slowly heading toward a single u-boot for quad/duallite,
can we find a solution to this now.
mx6sabre_common.h: fdt_file= CONFIG_DEFAULT_FDT_FILE \0
Hi Tom,
-Original Message-
From: u-boot-boun...@lists.denx.de [mailto:u-boot-
boun...@lists.denx.de] On Behalf Of Rini, Tom
Sent: Tuesday, February 25, 2014 5:12 PM
To: Karicheri, Muralidharan
Cc: Kwok, WingMan; u-boot@lists.denx.de; Nair, Sandeep
Subject: Re: [U-Boot] [U-Boot
-BEGIN PGP SIGNED MESSAGE-
Hash: SHA1
On 03/06/2014 02:09 PM, Andrianov, Vitaly wrote:
Hi Tom,
-Original Message-
From: u-boot-boun...@lists.denx.de [mailto:u-boot-
boun...@lists.denx.de] On Behalf Of Rini, Tom
Sent: Tuesday, February 25, 2014 5:12 PM
To: Karicheri,
On Thu, Mar 06, 2014 at 15:16 +0900, Masahiro Yamada wrote:
--- a/README
+++ b/README
@@ -164,7 +164,7 @@ Directory Hierarchy:
/mips Files generic to MIPS architecture
/cpu CPU specific files
/mips32Files specific to MIPS32
On Thu, Mar 06, 2014 at 14:53 +0100, Hannes Petermaier wrote:
- Adds support for 32-bit organized framebuffers to the LCD-framework.
- cleaned up unused functions
These are two unrelated changes, and should be kept in two
individual commits (usually the cleanup first, the feature change
On Thu, Mar 06, 2014 at 15:26 +0100, Hannes Petermaier wrote:
--- a/common/lcd.c
+++ b/common/lcd.c
@@ -400,12 +400,12 @@ __weak int lcd_get_size(int *line_length)
int drv_lcd_init(void)
{
- struct stdio_dev lcddev;
- int rc;
-
lcd_base = (void *) gd-fb_base;
On 2014-03-06 20:49, Gerhard Sittig wrote:
Hi Gerhard,
On Thu, Mar 06, 2014 at 15:26 +0100, Hannes Petermaier wrote:
--- a/common/lcd.c
+++ b/common/lcd.c
@@ -400,12 +400,12 @@ __weak int lcd_get_size(int *line_length)
int drv_lcd_init(void)
{
- struct stdio_dev lcddev;
-
Signed-off-by: John de la Garza j...@jjdev.com
---
arch/arm/include/asm/arch-at91/at91_rstc.h |2 +-
include/configs/at91sam9260ek.h|1 +
2 files changed, 2 insertions(+), 1 deletion(-)
diff --git a/arch/arm/include/asm/arch-at91/at91_rstc.h
On 14-02-28 10:49 AM, Tom Rini wrote:
-BEGIN PGP SIGNED MESSAGE-
Hash: SHA1
On 02/28/2014 01:18 PM, Darwin Rambo wrote:
Given the ARM header below, is this code possible to put into
u-boot?
For reference, I see this discussion below.
-BEGIN PGP SIGNED MESSAGE-
Hash: SHA1
On 03/06/2014 03:43 PM, Darwin Rambo wrote:
On 14-02-28 10:49 AM, Tom Rini wrote:
On 02/28/2014 01:18 PM, Darwin Rambo wrote:
Given the ARM header below, is this code possible to put into
u-boot?
For reference, I see this discussion below.
The Microchip MCP7941x series of chips are very similar
to Maxim's DS1307 but have some important differences:
o I2C address 0x6f rather than 0x68
o The oscillator start bit logic is reversed
o VBATEN bit to enable a power-fail time-stamp
o SQWE is bit 6 of the control register, not bit 4
On 03/06/2014 01:24 AM, Bansal Aneesh-B39320 wrote:
-Original Message-
From: Wood Scott-B07421
Sent: Wednesday, March 05, 2014 11:30 PM
To: Bansal Aneesh-B39320
Cc: Sun York-R58495; Wolfgang Denk; u-boot@lists.denx.de; Gupta
Ruchika-R66431
Subject: Re: [U-Boot] [PATCH 1/3]
This is the third version of my series to add support for AHCI to the
sunxi platform. This uses the existing ahci platform support already
present in u-boot. Most of the sunxi specific code comes from the Linux
platform patches.
Since last time I've cut out all the unused register #defines and
I have observed timeouts on a cubietruck.
The increase to 40ms is completely arbitrary and Works For Me(tm). I
couldn't find a good reference for how long you are supposed to wait,
although googling around it seems like tens of ms rather than single
digits is more common. I don't think there is
Signed-off-by: Ian Campbell i...@hellion.org.uk
---
board/highbank/highbank.c | 14 ++
1 file changed, 10 insertions(+), 4 deletions(-)
diff --git a/board/highbank/highbank.c b/board/highbank/highbank.c
index 4b272c7..d42447d 100644
--- a/board/highbank/highbank.c
+++
This allow the platform to register the platform ahci device.
Signed-off-by: Ian Campbell i...@hellion.org.uk
---
In theory this could perhaps be used by highbank. I have access to a
Midway system (close enough for testing purposes, I think) but since
Calxeda has folded I'm not sure it is worth
This enables the necessary clocks, in AHB0 and in PLL6_CFG. This is done
for sun7i only since I don't have access to any other sunxi platforms
with sata included.
The bulk of the code is taken from the Linux ahci sunxi platform driver
patches, adjusted for u-boot.
This adds the PORT_DMA tweaks
On Fri, 2014-03-07 at 01:19 +, Ian Campbell wrote:
This is the third version of my series to add support for AHCI to the
sunxi platform. This uses the existing ahci platform support already
present in u-boot. Most of the sunxi specific code comes from the Linux
platform patches.
Since
On Thu, Mar 6, 2014 at 7:20 PM, Ian Campbell i...@hellion.org.uk wrote:
Signed-off-by: Ian Campbell i...@hellion.org.uk
Acked-by: Rob Herring r...@kernel.org
---
board/highbank/highbank.c | 14 ++
1 file changed, 10 insertions(+), 4 deletions(-)
diff --git
Hi,
I am trying to perform secure booting on nitrogen6x SOM.After compiling the
u-boot2013.08 source code I have obtained a u-boot.imx image with fsize
51c00.I tried to pad and sign this image for authentication which returns
me a u-boot-signed-padded.imx. The problem is that the size of this new
Hello Hannes,
Am 06.03.2014 15:24, schrieb Hannes Petermaier:
On 2014-03-06 14:58, Heiko Schocher wrote:
Hello Hannes,
Am 06.03.2014 14:39, schrieb Hannes Petermaier:
- Adds support for a minimal framebuffer driver of TI's AM335x SoC
to be compatible with Wolfgang Denk's LCD-Framework
Dear John de la Garza,
this is a pure resent of [1]. Please read [2] and especially [3] on
sending updated patches.
On 06.03.14 21:33, John de la Garza wrote:
Signed-off-by: John de la Garza j...@jjdev.com
---
arch/arm/include/asm/arch-at91/at91_rstc.h |2 +-
Hi All,
I'm having a problem where fw_setenv fails writing the environment to a SPI NOR
device with a 4K erase block size. This led me to two discoveries and two
patches:
1) The default number of environment sectors is assumed to be one, even if
the environment is larger than a sector.
2)
The assumed number of environment sectors (always 1) leads to an
incorrect top_of_range calculation in fw.env.c when a flash device has
an erase block size smaller than the environment data size (number of
environment sectors 1).
This change updates the default number of environment sectors to
Some NOR flash devices have a small erase block size. For example, the
Micron N25Q512 can erase in 4K blocks. These devices expose a bug in
fw_env.c where flash_write_buf() incorrectly calculates bytes written
and attempts to write past the environment sectors. Luckily, a range
check prevents
65 matches
Mail list logo
