Hi Ian,
diff --git a/boards.cfg b/boards.cfg
index b4203f1..31b02df 100644
--- a/boards.cfg
+++ b/boards.cfg
@@ -371,6 +371,7 @@ Active arm armv7 rmobile renesas
lager
Active arm armv7 s5pc1xx samsung goni
On 06/03/14 03:43, Simon Glass wrote:
Hi Martin,
On 1 June 2014 23:59, Martin Ertsås marti...@gmail.com wrote:
On 06/01/14 18:42, Simon Glass wrote:
Hi Martin,
On 30 May 2014 04:33, Martin Ertsås marti...@gmail.com wrote:
Hi.
I'm trying to use u-boot as a payload to coreboot. Problem is
Hi,
I am working on an embedded project where I need to set a single
consistent splash screen during u-boot,kernel and init phases. I have
completed the u-boot part.
Now I want to configure linux in such a way that, it doesn't override
the splash created by u-boot. So u-boot splash
On Tue, 2014-06-03 at 15:11 +0900, Masahiro Yamada wrote:
Could you fill the maintainers field (the last field of boards.cfg)?
Hans de Goede has a follow up series which includes this change.
Thanks,
Ian.
___
U-Boot mailing list
U-Boot@lists.denx.de
Check the core timer status register (TSR) for watchdog reset,
and and set the QRIO's reset reason flag REASON1[0] accordingly.
This allows the appliction SW to identify the cpu watchdog as a
reset reason, by setting the REASON1[0] flag in the QRIO.
Signed-off-by: Rainer Boschung
The booting of the board is now protected by the CPU watchdog.
A failure during the boot phase will end up in board reset.
Signed-off-by: Rainer Boschung rainer.bosch...@keymile.com
---
include/configs/km/kmp204x-common.h | 8
1 file changed, 8 insertions(+)
diff --git
This patch configures the qrio to trigger a core reset on
a CPU reset request.
Signed-off-by: Rainer Boschung rainer.bosch...@keymile.com
Signed-off-by: Valentin Longchamp valentin.longch...@keymile.com
---
board/keymile/kmp204x/kmp204x.c | 3 +++
1 file changed, 3 insertions(+)
diff --git
To achieve this, the qrio_cpuwd_flag() function that sets the CPU watchdog
flag in the REASON1 reg is added.
Signed-off-by: Rainer Boschung rainer.bosch...@keymile.com
Signed-off-by: Valentin Longchamp valentin.longch...@keymile.com
---
board/keymile/kmp204x/kmp204x.h | 2 ++
When CONFIG_WATCHDOG is defined the board initialization just performs
a WATCHDOG_RESET, an initialization of the watchdog is not done.
This has been modified fot the MPC85xx, the board initialization calls
its watchdog initialitzation allowing for full watchdog configuration
very early in the
To acheive this, the qrio_uprstreq() function that sets the UPRSTREQN
flag in the qrio RESCNF reg is added.
Signed-off-by: Rainer Boschung rainer.bosch...@keymile.com
Signed-off-by: Valentin Longchamp valentin.longch...@keymile.com
---
board/keymile/kmp204x/kmp204x.h | 5 +
For e500mc cores the watchdog timer period has to be set by means of a
6bit value, that defines the bit of the timebase counter used to signal
a watchdog timer exception on its 0 to 1 transition.
The macro used to set the watchdog period TCR_WP, was redefined for e500mc
to support 6 WP setting.
Function to inititialize the cpu watchdog added.
Signed-off-by: Rainer Boschung rainer.bosch...@keymile.com
---
arch/powerpc/cpu/mpc85xx/cpu.c | 8
1 file changed, 8 insertions(+)
diff --git a/arch/powerpc/cpu/mpc85xx/cpu.c b/arch/powerpc/cpu/mpc85xx/cpu.c
index 684d400..6274f92 100644
TCR watchdog bit are overwritten when dec interrupt is enabled.
This has been fixed with this patch.
Signed-off-by: Rainer Boschung rainer.bosch...@keymile.com
---
arch/powerpc/cpu/mpc85xx/interrupts.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git
I am using the core watchdog of the P2041 on the kmp204x board.
For the watchdog initialization I use the mpc85xx framework and
the powerpc register definitions. However, I had to modify both
for the following reasons (Patches 1 to 4):
-the e500mc register implementation differs from other ppc
Hi Stephen,
On 06/02/2014 12:14 AM, Lukasz Majewski wrote:
Hi Stephen,
On 05/30/2014 02:28 AM, Lukasz Majewski wrote:
...
I've tested if raw u-boot can be downloaded and uploaded via DFU.
The u-boot size is 1MiB precisely.
Corresponding dfu_alt_info entry:
u-boot raw 0x80
Hello Simon:
Are you planning to work on a patch?
Yes, I am; I hope to send something out tonight. Sorry for the delay!
Best regards,
Thomas
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ls1021 is arm-core and supports qe too.
Move immap_qe.h into common directory for both arm and powerpc.
Signed-off-by: Zhao Qiang b45...@freescale.com
---
arch/powerpc/cpu/mpc83xx/cpu.c | 2 +-
arch/powerpc/cpu/mpc83xx/fdt.c | 2 +-
Hi!
U-Boot 2014.07-rc1-00079-g2072e72-dirty (May 16 2014 - 15:54:55)
CPU : Altera SOCFPGA Platform
BOARD : Altera SOCFPGA Cyclone5 Board
DRAM: 1 GiB
WARNING: Caches not enabled
Using default environment
In:serial
Out: serial
Err: serial
Net: No
On Tue, Jun 03 2014 at 3:16:19 am BST, tiger...@via-alliance.com
tiger...@via-alliance.com wrote:
Hi， Marc:
In short, if you're setting GICD_SGIR[24] to 1, you're sending SGI0 to
all CPUs but yourself. This seems to match the name of the function,
doesn't it?
I described my understanding based
Hi, Marc:
My understanding is that if you're using the Trusted Firmware, then you
have an implementation of PSCI, and that's what you must use to bring
the CPUs into u-boot. U-Boot will be running non-secure anyway, so it
requires the firmware to perform S to NS transition on its behalf.
Do you
On Tue, Jun 03 2014 at 10:41:51 am BST, tiger...@via-alliance.com
tiger...@via-alliance.com wrote:
Hi, Marc:
My understanding is that if you're using the Trusted Firmware, then you
have an implementation of PSCI, and that's what you must use to bring
the CPUs into u-boot. U-Boot will be running
This commit adds test scripts for testing if any commit has introduced
regression to the DFU subsystem.
It uses md5 to test if sent and received file is correct.
The test detailed description is available at README file.
Signed-off-by: Lukasz Majewski l.majew...@samsung.com
---
Changes for v2:
-
When the map_sysmem, then the fatwrite command can support sandbox.
Following command will show how to use it:
= sb bind 0 sd.img
= fatls host 0
= fatwrite host 0 $memaddr filename $filesize
Signed-off-by: Josh Wu josh...@atmel.com
---
common/cmd_fat.c |6 +-
1 file changed, 5
On Tuesday, June 03, 2014 at 03:59:49 AM, Simon Glass wrote:
Hi Marek,
On 1 June 2014 11:33, Marek Vasut ma...@denx.de wrote:
On Saturday, May 24, 2014 at 11:21:02 PM, Simon Glass wrote:
The root device should be probed just like any other device. The effect
of this is to mark the device
Hi Simon,
On Mon, 2 Jun 2014 21:40:05 -0600
Simon Glass s...@chromium.org wrote:
Hi Masahiro,
I see that we have a few files in tools/ which #include their
counterpart .c files in common/ or lib/. The most noticeable example
is libfdt.
Is there a better way of doing this? Would it be
Hello,
On Sat, 2014-05-24 at 12:17 +0400, Alexey Brodkin wrote:
This enables relocation of initrd to the end of available DDR before Linux
kernel start-up as it is done in other architectures.
Signed-off-by: Alexey Brodkin abrod...@synopsys.com
---
arch/arc/include/asm/config.h | 1 +
1
Dear Tom,
The following changes since commit 3fe1a8545b55d31a6db2d9e60d962c4f6e048913:
powerpc: hiddendragon: remove orphan board (2014-05-30 14:03:24 -0400)
are available in the git repository at:
git://git.denx.de/u-boot-arc.git master
for you to fetch changes up to
This patch set intends to -
1. Fix SPI flash reading.
2. Enable saving environment at the end of flash.
3. Increase SPL size.
4. Enable USB booting for all Exynos5 Socs.
Changes since v1:
- Added check for step in 1/5.
- Added new config for SPI flash size in 2/5.
- Made
SPI recieve and transfer code in exynos_spi driver has a logical bug.
We read data in a variable which can hold an integer. Then we assign
this integer 32 bit value to another variable which has data type uchar.
Latter represents a unit of our recieve buffer. Everytime when we write
a value to our
Right now USB booting is enabled for Exynos5250 only. Moving all the
configs for USB boot mode from exynos5250-dt.h to exynos5-dt.h in order
to enableUSB booting for all Exynos5 SoCs.
Signed-off-by: Akshay Saraswat aksha...@samsung.com
Acked-by: Simon Glass s...@chromium.org
---
Changes since v1:
Currently environment resides at the location where BL2 ends.
This may hold good in case there is an empty space at this
position. But what if this place already has a binary or is
expected to have one. To avoid such scenarios it is better
to save environment at the end of the flash.
Max footprint for SPL in both Exynos 5250 and 5420 is limited to 14 KB.
For Exynos5250 we need to keep it 14 KB because BL1 supports only fixed
size SPL downloading. But in case of Exynos5420 we need not restrict it
to 14 KB. And also, the SPL size for Exynos5420 is expected to increase
with the
From: Michael Pratt mpr...@chromium.org
Since snow has a different memory configuration than peach, split the
configuration between the 5250 and 5420. Exynos 5420 supports runtime
memory configuration detection, and can make the determination between 4
and 7 banks at runtime.
Include the bank
On Mon, Jun 2, 2014 at 8:26 PM, Simon Glass s...@chromium.org wrote:
Driver model works by looking up compatible strings in the top-level
nodes and binding a driver for each one it finds.
I get that.
I'm saying that isn't sufficient.
The exynos pinctrl device tree binding does not have a
On 30 May 2014 07:45, Jeroen Hofstee jer...@myspectrum.nl wrote:
When building tools the u-boot specific sha256.h is required, but the
host version of sha256.h is used when present. This leads to build errors
on FreeBSD which does have a system sha256.h include. Like libfdt_env.h
explicitly
HI Akshay,
On 3 June 2014 06:37, Akshay Saraswat aksha...@samsung.com wrote:
SPI recieve and transfer code in exynos_spi driver has a logical bug.
We read data in a variable which can hold an integer. Then we assign
this integer 32 bit value to another variable which has data type uchar.
On 3 June 2014 08:23, Simon Glass s...@chromium.org wrote:
HI Akshay,
On 3 June 2014 06:37, Akshay Saraswat aksha...@samsung.com wrote:
SPI recieve and transfer code in exynos_spi driver has a logical bug.
We read data in a variable which can hold an integer. Then we assign
this integer 32
On 3 June 2014 06:37, Akshay Saraswat aksha...@samsung.com wrote:
Currently environment resides at the location where BL2 ends.
This may hold good in case there is an empty space at this
position. But what if this place already has a binary or is
expected to have one. To avoid such scenarios
On 3 June 2014 06:37, Akshay Saraswat aksha...@samsung.com wrote:
Max footprint for SPL in both Exynos 5250 and 5420 is limited to 14 KB.
For Exynos5250 we need to keep it 14 KB because BL1 supports only fixed
size SPL downloading. But in case of Exynos5420 we need not restrict it
to 14 KB.
On 3 June 2014 06:37, Akshay Saraswat aksha...@samsung.com wrote:
From: Michael Pratt mpr...@chromium.org
Since snow has a different memory configuration than peach, split the
configuration between the 5250 and 5420. Exynos 5420 supports runtime
memory configuration detection, and can make
On 26 May 2014 07:41, Akshay Saraswat aksha...@samsung.com wrote:
While the Exynos5420 chip is used in both Smdk5420 and in the Peach-Pit
line of devices, there could be other boards using the same chip, so a
common configuration file is being added (exynos5420.h) as well
as two common device
On 26 May 2014 07:49, Akshay Saraswat aksha...@samsung.com wrote:
From: Doug Anderson diand...@chromium.org
From experiments it appears that PHY_CON13 is glitchy if we sample it
when CLKM is running. If we stop CLKM when sampling it the glitches
all go away, so we'll do that as per Samsung
On 26 May 2014 07:48, Akshay Saraswat aksha...@samsung.com wrote:
This patch intends to remove all code which enables hardware read
leveling. All characterization environments may not cope up with
h/w read leveling enabled, so we must disable this.
Also, disabling h/w read leveling improves
Hi Josh,
On 3 June 2014 03:52, Josh Wu josh...@atmel.com wrote:
When the map_sysmem, then the fatwrite command can support sandbox.
Following command will show how to use it:
= sb bind 0 sd.img
= fatls host 0
= fatwrite host 0 $memaddr filename $filesize
Signed-off-by: Josh Wu
Hi,
On 2 June 2014 23:17, Belisko Marek marek.beli...@gmail.com wrote:
Dear Simon Glass,
On Tue, Jun 3, 2014 at 6:42 AM, Simon Glass s...@chromium.org wrote:
Hi Belisko,
On 28 April 2014 00:30, Belisko Marek marek.beli...@gmail.com wrote:
Hi Simon,
On Wed, Apr 16, 2014 at 4:41 PM, Simon
On Sat, May 31, 2014 at 1:32 PM, Jeroen Hofstee jer...@myspectrum.nl wrote:
NOTE: smdk5420 snow smdkv310 apf27 arndale origen vpac270_ond_256 smdk5250
don't have a memset available.
---
arch/arm/lib/crt0.S | 6 ++
1 file changed, 6 insertions(+)
diff --git a/arch/arm/lib/crt0.S
On Sat, May 31, 2014 at 1:32 PM, Jeroen Hofstee jer...@myspectrum.nl wrote:
---
arch/arm/lib/spl.c | 3 ---
1 file changed, 3 deletions(-)
diff --git a/arch/arm/lib/spl.c b/arch/arm/lib/spl.c
index dfcc596..75ab546 100644
--- a/arch/arm/lib/spl.c
+++ b/arch/arm/lib/spl.c
@@ -28,9 +28,6
Hi Masahiro,
On 3 June 2014 06:02, Masahiro Yamada yamad...@jp.panasonic.com wrote:
Hi Simon,
On Mon, 2 Jun 2014 21:40:05 -0600
Simon Glass s...@chromium.org wrote:
Hi Masahiro,
I see that we have a few files in tools/ which #include their
counterpart .c files in common/ or lib/.
Hi,
Am 26.05.2014 13:28, schrieb Masahiro Yamada:
Hi Vasili,
On Mon, 26 May 2014 13:51:52 +0300
Vasili Galka vvv...@gmail.com wrote:
Hi,
Are all boards supposed to build fine in v2014.04 release?
I'm running ./MAKEALL -a powerpc and get build failure for 9 boards:
Boards with errors: 9 (
On 05/30/2014 10:22 AM, Alison Wang wrote:
The QorIQ LS1 family is built on Layerscape architecture,
the industry's first software-aware, core-agnostic networking
architecture to offer unprecedented efficiency and scale.
Freescale LS102xA is a set of SoCs combines two ARM
Cortex-A7 cores that
+Stephen
Hi Jon,
On 3 June 2014 07:39, Jon Loeliger loeli...@gmail.com wrote:
On Mon, Jun 2, 2014 at 8:26 PM, Simon Glass s...@chromium.org wrote:
Driver model works by looking up compatible strings in the top-level
nodes and binding a driver for each one it finds.
I get that.
I'm
Dear Simon,
In message CAPnjgZ2g_7Nu8rBWn3D=xq7qmawowjmoukd1pycahkopz99...@mail.gmail.com
you wrote:
AFAICT there is no HS version of the AM335X processor.
I just sent out a new series (available in u-boot-x86.git branch
'bone') which adds some step-by-step documentation for the
Hi Thomas,
On 3 June 2014 02:27, thomas.bet...@rohde-schwarz.com wrote:
Hello Simon:
Are you planning to work on a patch?
Yes, I am; I hope to send something out tonight. Sorry for the delay!
No problem, thanks for looking at it. Hopefully you can work in a test somehow.
Regards,
Simon
Hi Martin,
On 3 June 2014 00:22, Martin Ertsås marti...@gmail.com wrote:
On 06/03/14 03:43, Simon Glass wrote:
Hi Martin,
On 1 June 2014 23:59, Martin Ertsås marti...@gmail.com wrote:
On 06/01/14 18:42, Simon Glass wrote:
Hi Martin,
On 30 May 2014 04:33, Martin Ertsås marti...@gmail.com
On Mon, May 19, 2014 at 1:21 PM, Stephen Warren swar...@wwwdotorg.org wrote:
From: Stephen Warren swar...@nvidia.com
Now that we wait the correct specification-mandated time at the end of
usb_hub_power_on(), I suspect that CONFIG_USB_HUB_MIN_POWER_ON_DELAY has
no purpose.
For cm_t35.h, we
This patch set intends to -
1. Fix SPI flash reading.
2. Enable saving environment at the end of flash.
3. Increase SPL size.
4. Enable USB booting for all Exynos5 Socs.
Changes since v2:
- Added Acked-by Tested-by.
- Changed assignment for *rxp in 1/5.
Changes since v1:
Currently environment resides at the location where BL2 ends.
This may hold good in case there is an empty space at this
position. But what if this place already has a binary or is
expected to have one. To avoid such scenarios it is better
to save environment at the end of the flash.
SPI recieve and transfer code in exynos_spi driver has a logical bug.
We read data in a variable which can hold an integer. Then we assign
this integer 32 bit value to another variable which has data type uchar.
Latter represents a unit of our recieve buffer. Everytime when we write
a value to our
Max footprint for SPL in both Exynos 5250 and 5420 is limited to 14 KB.
For Exynos5250 we need to keep it 14 KB because BL1 supports only fixed
size SPL downloading. But in case of Exynos5420 we need not restrict it
to 14 KB. And also, the SPL size for Exynos5420 is expected to increase
with the
Right now USB booting is enabled for Exynos5250 only. Moving all the
configs for USB boot mode from exynos5250-dt.h to exynos5-dt.h in order
to enableUSB booting for all Exynos5 SoCs.
Signed-off-by: Akshay Saraswat aksha...@samsung.com
Acked-by: Simon Glass s...@chromium.org
Tested-by: Simon
From: Michael Pratt mpr...@chromium.org
Since snow has a different memory configuration than peach, split the
configuration between the 5250 and 5420. Exynos 5420 supports runtime
memory configuration detection, and can make the determination between 4
and 7 banks at runtime.
Include the bank
On 06/03/2014 10:04 AM, Simon Glass wrote:
+Stephen
I don't think there's anything actionable for me in this email, although
I guess I'll chime in on a couple of points:
I agree that the current way U-Boot parses DT is completely inadequate.
The only way to parse it is to take a top-down
On 06/03/2014 10:17 AM, Tim Harvey wrote:
On Mon, May 19, 2014 at 1:21 PM, Stephen Warren swar...@wwwdotorg.org wrote:
From: Stephen Warren swar...@nvidia.com
Now that we wait the correct specification-mandated time at the end of
usb_hub_power_on(), I suspect that
Hi Wolfgang,
On 3 June 2014 10:07, Wolfgang Denk w...@denx.de wrote:
Dear Simon,
In message
CAPnjgZ2g_7Nu8rBWn3D=xq7qmawowjmoukd1pycahkopz99...@mail.gmail.com you
wrote:
AFAICT there is no HS version of the AM335X processor.
I just sent out a new series (available in u-boot-x86.git
On Mon, Jun 02, 2014 at 07:11:14PM -0600, Simon Glass wrote:
Hi Tom,
On 24 May 2014 06:21, Tom Rini tr...@ti.com wrote:
On Fri, May 23, 2014 at 03:57:34PM -1000, Simon Glass wrote:
[snip]
It surprises me the lengths to which people are going to try to
shoehorn .dtbs, compression,
Hi Tom,
On 3 June 2014 10:59, Tom Rini tr...@ti.com wrote:
On Mon, Jun 02, 2014 at 07:11:14PM -0600, Simon Glass wrote:
Hi Tom,
On 24 May 2014 06:21, Tom Rini tr...@ti.com wrote:
On Fri, May 23, 2014 at 03:57:34PM -1000, Simon Glass wrote:
[snip]
It surprises me the lengths to which
On Tue, Jun 03, 2014 at 11:01:21AM -0600, Simon Glass wrote:
Hi Tom,
On 3 June 2014 10:59, Tom Rini tr...@ti.com wrote:
On Mon, Jun 02, 2014 at 07:11:14PM -0600, Simon Glass wrote:
Hi Tom,
On 24 May 2014 06:21, Tom Rini tr...@ti.com wrote:
On Fri, May 23, 2014 at 03:57:34PM -1000,
Hi,
On 05/31/2014 07:08 PM, Ian Campbell wrote:
On Fri, 2014-05-30 at 11:06 +0200, Hans de Goede wrote:
From: Henrik Nordstrom hen...@henriknordstrom.net
Add support for the x-powers axp209 pmic which is found on most A10, A13 and
A20 boards.
While changing the boards.cfg lines for the
Hi,
On 05/31/2014 07:10 PM, Ian Campbell wrote:
On Fri, 2014-05-30 at 11:06 +0200, Hans de Goede wrote:
Add support for the x-powers axp152 pmic which is found on most A10s boards.
This driver looks superficially very similar to the last one, have you
considered merging them?
Other than
On Tuesday, June 03, 2014 at 06:38:30 PM, Stephen Warren wrote:
[...]
Yes, perhaps it is worth U-Boot probing for longer than the minimum
time, either always or on-demand as requested by an environment
variable. The only downside would be that usb start would take longer
even in the absence
Dear Simon,
In message capnjgz359pn2di57u2gqv5thojaytmyxpkfz02hamqxvmda...@mail.gmail.com
you wrote:
Please correct me if I'm wrong - but while this can protect against
software attacks, it cannot protect your system when someone has
physical access, say with a JTAG debugger, correct?
On Tue, Jun 3, 2014 at 9:38 AM, Stephen Warren swar...@wwwdotorg.org wrote:
On 06/03/2014 10:17 AM, Tim Harvey wrote:
On Mon, May 19, 2014 at 1:21 PM, Stephen Warren swar...@wwwdotorg.org
wrote:
From: Stephen Warren swar...@nvidia.com
Now that we wait the correct specification-mandated time
Hello Simon,
On di, 2014-06-03 at 08:11 -0600, Simon Glass wrote:
On 30 May 2014 07:45, Jeroen Hofstee jer...@myspectrum.nl wrote:
When building tools the u-boot specific sha256.h is required, but the
host version of sha256.h is used when present. This leads to build errors
on FreeBSD
Hello Simon,
On ma, 2014-06-02 at 20:02 -0600, Simon Glass wrote:
Hi Jeroen,
On 31 May 2014 14:32, Jeroen Hofstee jer...@myspectrum.nl wrote:
NOTE: smdk5420 snow smdkv310 apf27 arndale origen vpac270_ond_256 smdk5250
don't have a memset available.
You should add a message explaining
Adjust the u-boot-spl.lds linker script to match the changes made in the
41623c91b09a0c865fab41acdaff30f060f29ad6 arm: move exception handling out
of start.S files commit.
Signed-off-by: Hans de Goede hdego...@redhat.com
Acked-by: Ian Campbell i...@hellion.org.uk
---
Hi All,
Here is v2 of my patch series to be applied on top of Ian's recently merged
basic sun7i support.
This patch series begins with a few bug fixes found while working on preparing
the rest of the series, adds sun4i and sun5i support, pmic support (which is
necessary to clock the CPU at its
We should not be aligning the amount of bytes which we try to read from the
disk, this leads to trying to read more bytes then there are which fails.
file_size is already aligned to BLOCK_SIZE before being stored in
img.header.length, so there is no need for load_size at all.
Signed-off-by: Hans
There is no way to reset the cpu, so use the watchdog for this.
Signed-off-by: Hans de Goede hdego...@redhat.com
Acked-by: Ian Campbell i...@hellion.org.uk
---
arch/arm/cpu/armv7/sunxi/board.c| 7 +++
arch/arm/include/asm/arch-sunxi/timer.h | 5 +
2 files changed, 12
The DMA code in sunxi_mmc.c is broken. mmc_trans_data_by_dma() allocates the
dma descriptors on the stack, and then exits while the dma transfer is in
progress, so the dma engine is reading stack memory which at that point may
be re-used. So far we've gotten away with this by luck, but recent
Add support for the i2c controller found on all Allwinner sunxi SoCs,
this is the same controller as found on the Marvell orion5x and kirkwood
SoC families, with a slightly different register layout, so this patch uses
the existing mvtwsi code.
Signed-off-by: Hans de Goede hdego...@redhat.com
Add support for the Allwinner A10 SoC also known as the Allwinner sun4i family,
and add the Cubieboard board which uses the A10 SoC.
Compared to sun7 only the DRAM controller is a bit different:
-Controller reset bits are inverted, but only for Rev. A
-Different hpcr values
-No MBUS on sun4i
Add support for the Allwinner A13 and A10s SoCs also know as the Allwinner
sun5i family, and the A13-OLinuXinoM A13 based and r7-tv-dongle A10s based
boards.
The only differences compared to the already supported sun4i and sun7i
families are all in the DRAM controller initialization:
-Different
Add support for the x-powers axp152 pmic which is found on most A10s boards
and enable it for the r7-tv-dongle board.
Signed-off-by: Henrik Nordstrom hen...@henriknordstrom.net
Signed-off-by: Ian Campbell i...@hellion.org.uk
Signed-off-by: Hans de Goede hdego...@redhat.com
---
From: Henrik Nordstrom hen...@henriknordstrom.net
Add support for the x-powers axp209 pmic which is found on most A10, A13 and
A20 boards.
And enable AXP209 support for the Cubietruck and Cubieboard boards.
While changing the boards.cfg lines for the Cubietruck, add Ian and me as board
From: Stefan Roese s...@denx.de
There have been 3 versions of the sunxi_emac support patch during its
development. Somehow version 2 ended up in upstream u-boot where as
the u-boot-sunxi git repo got version 3.
This bumps the version in upstream u-boot to version 3 of the patch:
- Initialize MII
Signed-off-by: Hans de Goede hdego...@redhat.com
---
arch/arm/cpu/armv7/sunxi/board.c | 8
boards.cfg | 2 +-
include/configs/sunxi-common.h | 5 +
3 files changed, 14 insertions(+), 1 deletion(-)
diff --git a/arch/arm/cpu/armv7/sunxi/board.c
From: Chen-Yu Tsai w...@csie.org
Many A20 boards (ie Cubieboard2, A20-OLinuXino_MICRO) use an 100 Mbit MII
phy together with the GMAC nic found in the A20 SoC, add support for this
(this will get used when we add these boards in a later patch).
Signed-off-by: Chen-Yu Tsai w...@csie.org
On ma, 2014-06-02 at 20:20 -0600, Simon Glass wrote:
Hi Jeroen,
On 31 May 2014 14:32, Jeroen Hofstee jer...@myspectrum.nl wrote:
---
arch/arm/include/asm/global_data.h | 17 +
1 file changed, 17 insertions(+)
diff --git a/arch/arm/include/asm/global_data.h
Hi Ian,
On 05/31/2014 06:36 PM, Ian Campbell wrote:
This enables the necessary clocks, in AHB0 and in PLL6_CFG. This is done
for sun7i only since I don't have access to any other sunxi platformsw
with sata included.
The PHY setup is derived from the Alwinner releases and Linux, but is mostly
Hi Simon (this time with reply..)
On ma, 2014-06-02 at 20:20 -0600, Simon Glass wrote:
Hi Jeroen,
On 31 May 2014 14:32, Jeroen Hofstee jer...@myspectrum.nl wrote:
---
arch/arm/include/asm/global_data.h | 17 +
1 file changed, 17 insertions(+)
diff --git
Hi Jeroen,
On 3 June 2014 13:58, Jeroen Hofstee jer...@myspectrum.nl wrote:
Hi Simon (this time with reply..)
On ma, 2014-06-02 at 20:20 -0600, Simon Glass wrote:
Hi Jeroen,
On 31 May 2014 14:32, Jeroen Hofstee jer...@myspectrum.nl wrote:
---
arch/arm/include/asm/global_data.h | 17
Hello Wolfgang / Stefan.
On za, 2014-05-31 at 22:32 +0200, Jeroen Hofstee wrote:
When CONFIG_SYS_GENERIC_GLOBAL_DATA is not set the arch handles
the assignment of gd. At least in case of ARM/Aarch64 this means
board_init_r is alteady called with the new gd. Therefore only
assign gd if
We already have cmd_shipped in scripts/Makefile.lib.
Use it rather than defining a new command cmd_copy.
Signed-off-by: Masahiro Yamada yamad...@jp.panasonic.com
---
dts/Makefile | 5 +
1 file changed, 1 insertion(+), 4 deletions(-)
diff --git a/dts/Makefile b/dts/Makefile
index
Because cmd_mkimage is used in various subdirectories,
it seems reasonable to define it in scripts/Makefile.lib.
Signed-off-by: Masahiro Yamada yamad...@jp.panasonic.com
---
arch/arm/imx-common/Makefile| 4
board/cray/L1/Makefile | 6 +-
Remove the common infrastructure of nand_spl and
clean-up the code inside ifdef(CONFIG_NAND_U_BOOT)..endif.
Signed-off-by: Masahiro Yamada yamad...@jp.panasonic.com
---
Makefile | 28 +
arch/powerpc/cpu/ppc4xx/cpu.c | 3 -
common/env_embedded.c | 2 +-
Commit 3d5a335c announced that all the nand_spl boards
would be removed before v2014.07 release.
Signed-off-by: Masahiro Yamada yamad...@jp.panasonic.com
---
boards.cfg | 1 -
include/configs/MPC8569MDS.h| 29
Commit 3d5a335c announced that all the nand_spl boards
would be removed before v2014.07 release.
Signed-off-by: Masahiro Yamada yamad...@jp.panasonic.com
---
boards.cfg | 1 -
include/configs/MPC8315ERDB.h | 32 +--
Commit 3d5a335c announced that all the nand_spl boards
would be removed before v2014.07 release.
Signed-off-by: Masahiro Yamada yamad...@jp.panasonic.com
---
board/freescale/p1023rds/p1023rds.c | 5 --
board/freescale/p1023rds/tlb.c| 2 -
boards.cfg
Commit 3d5a335c announced that all the nand_spl boards
would be removed before v2014.07 release.
Signed-off-by: Masahiro Yamada yamad...@jp.panasonic.com
---
boards.cfg | 1 -
include/configs/MPC8572DS.h| 30 -
Commit 3d5a335c announced that all the nand_spl boards
would be removed before v2014.07 release.
Signed-off-by: Masahiro Yamada yamad...@jp.panasonic.com
---
boards.cfg | 1 -
include/configs/MPC8536DS.h| 29 +---
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