Hi Simon,
On Fri, Dec 5, 2014 at 6:37 AM, Simon Glass s...@chromium.org wrote:
On 4 December 2014 at 08:01, Bin Meng bmeng...@gmail.com wrote:
On most x86 boards, the legacy serial ports (io address 0x3f8/0x2f8)
are provided by a superio chip connected to the LPC bus. We must
program the
Hi Simon,
On Fri, Dec 5, 2014 at 6:43 AM, Simon Glass s...@chromium.org wrote:
Hi Bin,
On 4 December 2014 at 08:01, Bin Meng bmeng...@gmail.com wrote:
Intel Tunnel Creek GPIO register block is compatible with current
ich6-gpio driver, except the offset and content of GPIO block base
address
-Original Message-
From: Joakim Tjernlund [mailto:joakim.tjernl...@transmode.se]
Sent: Thursday, December 04, 2014 7:29 PM
To: Diego Santa Cruz
Cc: u-boot@lists.denx.de
Subject: RE: [U-Boot] [PATCH 00/18] Support for eMMC partitioning and related
fixes
Diego Santa Cruz
Hi Stefan,
Thanks for your quick review.
I want to use this patch to clean up my board support code.
( I want to enable CONFIG_SYS_MAX_FLASH_BANKS_DETECT on my boards
but in some use cases, there is a possibility that no flash is found.)
CFI-flash patches are generally supposed to be applied
Hi Simon,
On Fri, Dec 5, 2014 at 6:49 AM, Simon Glass s...@chromium.org wrote:
Hi Bin,
On 4 December 2014 at 08:01, Bin Meng bmeng...@gmail.com wrote:
This is the initial import from Intel FSP release for Queensbay
platform (Tunnel Creek processor and Topcliff Platform Controller
Hub),
Hi Masahiro-san,
On 05.12.2014 09:40, Masahiro Yamada wrote:
I want to use this patch to clean up my board support code.
( I want to enable CONFIG_SYS_MAX_FLASH_BANKS_DETECT on my boards
but in some use cases, there is a possibility that no flash is found.)
CFI-flash patches are generally
Hi Simon,
On Fri, Dec 5, 2014 at 6:47 AM, Simon Glass s...@chromium.org wrote:
Hi Bin,
On 4 December 2014 at 08:02, Bin Meng bmeng...@gmail.com wrote:
Use inline assembly codes to call FspNotify() to make sure parameters
are passed on the stack as required by the FSP calling convention.
Hi Simon,
On Fri, Dec 5, 2014 at 7:40 AM, Simon Glass s...@chromium.org wrote:
Hi Bin,
On 4 December 2014 at 08:02, Bin Meng bmeng...@gmail.com wrote:
Per Intel FSP architecture specification, FSP provides 3 routines
for bootloader to call. The first one is the TempRamInit (aka
Cache-As-Ram
Hi Simon,
On Fri, Dec 5, 2014 at 7:42 AM, Simon Glass s...@chromium.org wrote:
Hi Bin,
On 4 December 2014 at 08:02, Bin Meng bmeng...@gmail.com wrote:
Can we have a short commit message about what HOB is and why you want
to list it?
Sure.
[snip]
---
arch/x86/lib/Makefile | 1 +
Hi Simon,
On Fri, Dec 5, 2014 at 7:43 AM, Simon Glass s...@chromium.org wrote:
Hi Bin,
On 4 December 2014 at 08:02, Bin Meng bmeng...@gmail.com wrote:
Integrate the processor microcode version 1.05 for Tunnel Creek,
CPUID device 20661h.
Signed-off-by: Bin Meng bmeng...@gmail.com
---
When CONFIG_MX6QDL is undefined, these definitions must be coherent with
those in mx6-pins.h. The prefix is MX6 regardless of the type of SoC.
Cc: Tim Harvey thar...@gateworks.com
Cc: Stefano Babic sba...@denx.de
Signed-off-by: Pierre Aubert p.aub...@staubli.com
---
Complete the definition of the macros I2C_PADS and I2C_PADS_INFO for use
without multiple SoC type. Usefull when the same board have configurations
with or without SPL.
Cc: Stefano Babic sba...@denx.de
Cc: Nikita Kiryanov nik...@compulab.co.il
Signed-off-by: Pierre Aubert p.aub...@staubli.com
Hi Simon,
On Fri, Dec 5, 2014 at 7:48 AM, Simon Glass s...@chromium.org wrote:
Hi Bin,
On 4 December 2014 at 08:02, Bin Meng bmeng...@gmail.com wrote:
Implement minimum required functions for the basic support to
queensbay platform and crownbay board.
Signed-off-by: Bin Meng
Diego Santa Cruz diego.santac...@spinetix.com wrote on 2014/12/05
09:38:34:
-Original Message-
From: Joakim Tjernlund [mailto:joakim.tjernl...@transmode.se]
Sent: Thursday, December 04, 2014 7:29 PM
To: Diego Santa Cruz
Cc: u-boot@lists.denx.de
Subject: RE: [U-Boot] [PATCH
-Original Message-
From: Joakim Tjernlund [mailto:joakim.tjernl...@transmode.se]
Sent: Friday, December 05, 2014 10:46 AM
To: Diego Santa Cruz
Cc: u-boot@lists.denx.de
Subject: RE: [U-Boot] [PATCH 00/18] Support for eMMC partitioning and related
fixes
[snip]
Write size should
Hello,
On 12/04/2014 03:00 AM, Simon Glass wrote:
Hi Przemyslaw,
On 3 December 2014 at 09:13, Przemyslaw Marczak p.marc...@samsung.com wrote:
Hello all,
On 11/24/2014 07:57 PM, Simon Glass wrote:
This series adds I2C support to driver model. It has become apparent that
this is a high
Hi Simon,
Here are some comments on v4.
On Thu, 4 Dec 2014 21:21:20 -0700
Simon Glass s...@chromium.org wrote:
+#define I2C_MAX_OFFSET_LEN 4
+
+/**
+ * i2c_setup_offset() - Set up a new message with a chip offset
+ *
+ * @chip:Chip to use
+ * @offset: Byte offset within chip
Hi Simon,
On Thu, 4 Dec 2014 21:21:30 -0700
Simon Glass s...@chromium.org wrote:
+static const struct dm_i2c_ops tegra_i2c_ops = {
+ .xfer = tegra_i2c_xfer,
+ .probe_chip = tegra_i2c_probe_chip,
+ .set_bus_speed = tegra_i2c_set_bus_speed,
+};
- for (i =
Hi Simon,
On Fri, Dec 5, 2014 at 7:54 AM, Simon Glass s...@chromium.org wrote:
Hi Bin,
On 4 December 2014 at 08:03, Bin Meng bmeng...@gmail.com wrote:
Signed-off-by: Bin Meng bmeng...@gmail.com
---
arch/x86/Kconfig | 13
arch/x86/cpu/queensbay/Kconfig | 75
Hi Simon,
On Fri, Dec 5, 2014 at 7:56 AM, Simon Glass s...@chromium.org wrote:
Hi Bin,
On 4 December 2014 at 08:03, Bin Meng bmeng...@gmail.com wrote:
Signed-off-by: Bin Meng bmeng...@gmail.com
---
configs/crownbay_defconfig | 6 ++
include/configs/crownbay.h | 52
Hi Simon,
On Fri, Dec 5, 2014 at 7:57 AM, Simon Glass s...@chromium.org wrote:
Hi Bin,
On 4 December 2014 at 08:03, Bin Meng bmeng...@gmail.com wrote:
Signed-off-by: Bin Meng bmeng...@gmail.com
---
Makefile | 8
1 file changed, 8 insertions(+)
diff --git a/Makefile b/Makefile
Hi Simon,
On Fri, Dec 5, 2014 at 7:59 AM, Simon Glass s...@chromium.org wrote:
Hi Bin,
On 4 December 2014 at 08:03, Bin Meng bmeng...@gmail.com wrote:
Signed-off-by: Bin Meng bmeng...@gmail.com
---
arch/x86/cpu/queensbay/tnc.c | 26 +-
include/configs/crownbay.h
Hi Simon,
On Fri, Dec 5, 2014 at 8:01 AM, Simon Glass s...@chromium.org wrote:
Hi Bin,
On 4 December 2014 at 08:04, Bin Meng bmeng...@gmail.com wrote:
There are two standard SD card slots on the Crown Bay board, which
are connected to the Topcliff PCH SDIO controllers. Enable the SDHC
Hi Simon,
On Fri, Dec 5, 2014 at 8:03 AM, Simon Glass s...@chromium.org wrote:
Hi Bin,
On 4 December 2014 at 08:04, Bin Meng bmeng...@gmail.com wrote:
Signed-off-by: Bin Meng bmeng...@gmail.com
---
doc/README.x86 | 123
+
1 file
Hi Simon,
On Fri, Dec 5, 2014 at 8:04 AM, Simon Glass s...@chromium.org wrote:
Hi Bin,
On 4 December 2014 at 08:00, Bin Meng bmeng...@gmail.com wrote:
This patch series add the Intel Queensbay platform support. The Queensbay
platform includes an Atom E6xx processor (codename Tunnel Creek)
Hi,
On 04.12.2014 08:55, jiang wrote:
Hello all:
I just downloaded the latest u-boot source code,then compiled with:
make qemu_mips_defconfig
make CROSS_COMPILE=mips-linux-uclibc-
then create image:
# dd of=flash bs=1k count=4k if=/dev/zero
# dd of=flash bs=1k conv=notrunc if=u-boot.bin
Hi Bin,
On 5 December 2014 at 07:07, Bin Meng bmeng...@gmail.com wrote:
Hi Simon,
On Fri, Dec 5, 2014 at 8:04 AM, Simon Glass s...@chromium.org wrote:
Hi Bin,
On 4 December 2014 at 08:00, Bin Meng bmeng...@gmail.com wrote:
This patch series add the Intel Queensbay platform support.
Add support for the eDP panel supported on peach_pi.
Sjoerd Simons(1):
[PATCH 1/5] Exynos5800: The Peach-Pi board does not have a Parade video bridge
Ajay Kumar (4):
[PATCH 2/5] arm: exynos: add display clocks for Exynos5800
[PATCH 3/5] Exynos5: Fix rpll_sdiv to support both peach-pit and
From: Sjoerd Simons sjoerd.sim...@collabora.co.uk
Unlike the Peach-Pit board, there is no parade edp to lvds bridge on the
Pi. So drop it from device-tree.
Signed-off-by: Sjoerd Simons sjoerd.sim...@collabora.co.uk
Acked-by: Simon Glass s...@chromium.org
Tested-by: Simon Glass s...@chromium.org
Add get_lcd_clk and set_lcd_clk callbacks for Exynos5800 needed by
exynos video driver.
Signed-off-by: Ajay Kumar ajaykumar...@samsung.com
---
arch/arm/cpu/armv7/exynos/clock.c | 63 +++-
arch/arm/include/asm/arch-exynos/clk.h |3 ++
2 files changed, 64
Add code to support powerup sequence for peach-pi LCD.
Signed-off-by: Ajay Kumar ajaykumar...@samsung.com
---
board/samsung/smdk5420/smdk5420.c | 32 +---
1 file changed, 21 insertions(+), 11 deletions(-)
diff --git a/board/samsung/smdk5420/smdk5420.c
Add some delay after powering up the peach_pi eDP panel,
to make sure the panel is ready for link training.
Signed-off-by: Ajay Kumar ajaykumar...@samsung.com
---
arch/arm/dts/exynos5800-peach-pi.dts |1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/dts/exynos5800-peach-pi.dts
The existing setting for rpll_sdiv generates 70.5Mhz RPLL
video clock to drive 1366x768 panel on peach_pit.
This clock rate is not sufficient to drive 1920x1080 panel on peach-pi.
So, we adjust rpll_sdiv to 3 so that it generates 141Mhz pixel clock
which can drive peach-pi LCD.
This change
Hi Simon,
On Fri, Dec 5, 2014 at 10:16 PM, Simon Glass s...@chromium.org wrote:
Hi Bin,
On 5 December 2014 at 07:07, Bin Meng bmeng...@gmail.com wrote:
Hi Simon,
On Fri, Dec 5, 2014 at 8:04 AM, Simon Glass s...@chromium.org wrote:
Hi Bin,
On 4 December 2014 at 08:00, Bin Meng
Hi All,
On Tue, Dec 2, 2014 at 2:00 AM, Simon Glass s...@chromium.org wrote:
Hi Sjoerd,
On 1 December 2014 at 13:25, Sjoerd Simons
sjoerd.sim...@collabora.co.uk wrote:
On Mon, 2014-12-01 at 13:09 -0700, Simon Glass wrote:
+Akshay
Hi Sjoerd,
On 1 December 2014 at 03:03, Sjoerd Simons
Hi Masahiro,
On 5 December 2014 at 06:11, Masahiro Yamada yamad...@jp.panasonic.com wrote:
Hi Simon,
Here are some comments on v4.
On Thu, 4 Dec 2014 21:21:20 -0700
Simon Glass s...@chromium.org wrote:
+#define I2C_MAX_OFFSET_LEN 4
+
+/**
+ * i2c_setup_offset() - Set up a new
Hi Masahiro,
On 5 December 2014 at 06:15, Masahiro Yamada yamad...@jp.panasonic.com wrote:
Hi Simon,
On Thu, 4 Dec 2014 21:21:30 -0700
Simon Glass s...@chromium.org wrote:
+static const struct dm_i2c_ops tegra_i2c_ops = {
+ .xfer = tegra_i2c_xfer,
+ .probe_chip =
On Thu, Nov 06, 2014 at 08:28:42AM -0600, Felipe Balbi wrote:
Out of all OMAP5-like boards, only one of them
needs CONFIG_MISC_INIT_R, so it's best to enable
that for that particular board only, instead of
enabling for all boards unconditionally.
Signed-off-by: Felipe Balbi ba...@ti.com
On Thu, Nov 06, 2014 at 08:28:43AM -0600, Felipe Balbi wrote:
Those regulators don't have any coupling with
what they supply, so remove the suffixes in order
to not confuse anybody.
Signed-off-by: Felipe Balbi ba...@ti.com
Reviewed-by: Tom Rini tr...@ti.com
Applied to u-boot-ti/master,
On Thu, Nov 06, 2014 at 08:28:44AM -0600, Felipe Balbi wrote:
some boards might want to use USB1 for host,
without fiddling those registers it'll be
impossible.
Signed-off-by: Felipe Balbi ba...@ti.com
Reviewed-by: Tom Rini tr...@ti.com
Applied to u-boot-ti/master, thanks!
--
Tom
On Thu, Nov 06, 2014 at 08:28:45AM -0600, Felipe Balbi wrote:
there's no such function usb3_phy_power(),
it's likely that author meant to call,
usb_phy_power() instead, but that's already
called properly from xhci-omap.c.
Signed-off-by: Felipe Balbi ba...@ti.com
Reviewed-by: Tom Rini
On Thu, Nov 06, 2014 at 08:28:46AM -0600, Felipe Balbi wrote:
If we want to have two sections, one on each EMIF, without
interleaving, current code wouldn't enable emif2. Fix that
problem.
Signed-off-by: Felipe Balbi ba...@ti.com
Reviewed-by: Tom Rini tr...@ti.com
Applied to
On Thu, Nov 06, 2014 at 08:28:49AM -0600, Felipe Balbi wrote:
this will allow for boards to overwrite those
in case memory setup is different.
Signed-off-by: Felipe Balbi ba...@ti.com
Reviewed-by: Tom Rini tr...@ti.com
Applied to u-boot-ti/master, thanks!
--
Tom
signature.asc
On Sat, Nov 08, 2014 at 08:55:45PM +0100, Paul Kocialkowski wrote:
Some devices may use non-standard combinations of regulators to power MMC:
this allows these devices to provide a board-specific MMC power init function
to set everything up in their own way.
Signed-off-by: Paul Kocialkowski
On Thu, Nov 06, 2014 at 08:28:51AM -0600, Felipe Balbi wrote:
just add a few ifdefs around because this
device is very similar to dra7xxx.
Signed-off-by: Felipe Balbi ba...@ti.com
Reviewed-by: Tom Rini tr...@ti.com
Applied to u-boot-ti/master, thanks!
--
Tom
signature.asc
Description:
On Sat, Nov 08, 2014 at 08:55:46PM +0100, Paul Kocialkowski wrote:
Not every device has multiple MMC slots available, so it makes sense to enable
only the required LDOs for the available slots. Generic code in omap_hsmmc
will
enable both VMMC1 and VMMC2, in doubt.
Signed-off-by: Paul
On Thu, Nov 06, 2014 at 08:28:48AM -0600, Felipe Balbi wrote:
this way we can let boards overwrite based
on what they need.
Signed-off-by: Felipe Balbi ba...@ti.com
Reviewed-by: Tom Rini tr...@ti.com
Applied to u-boot-ti/master, thanks!
--
Tom
signature.asc
Description: Digital
On Thu, Nov 06, 2014 at 08:28:50AM -0600, Felipe Balbi wrote:
expose those two definitions so they can be
used by another board which we're adding in upcoming
patches.
Signed-off-by: Felipe Balbi ba...@ti.com
Reviewed-by: Tom Rini tr...@ti.com
Applied to u-boot-ti/master, thanks!
--
Tom
On Thu, Nov 06, 2014 at 08:28:47AM -0600, Felipe Balbi wrote:
From: Franklin S Cooper Jr fcoo...@ti.com
* Since the emmc isn't always programed trying to load the fs from the
emmc causes boot failures/kernel panic.
* The current bootcmd is set to:
bootcmd=run findfdt; run
On Mon, Nov 10, 2014 at 11:04:10AM -0800, Gregoire Gentil wrote:
Here is a patch to apply the same fix on OMAP4 boards as on OMAP3, in
order to prevent ns16550 hanging during SPL boot,
Grégoire
mode before
* SPL starts only THRE bit is set. We have to empty the
On Mon, Nov 10, 2014 at 02:02:44PM -0600, Felipe Balbi wrote:
BeagleBoard-X15 is the next generation Open Source
Hardware BeagleBoard based on TI's AM5728 SoC
featuring dual core 1.5GHZ A15 processor. The
platform features 2GB DDR3L (w/dual 32bit busses),
eSATA, 3 USB3.0 ports, integrated
On Wed, Nov 12, 2014 at 11:57:33AM +0100, Stefan Roese wrote:
Re-map NANDI2C boot-device to the normal NAND boot-device.
Otherwise the SPL boot IF can't handle this device correctly.
Somehow booting with Hynix 4GBit NAND H27U4G8 on Siemens
Draco leads to this boot-device passed to SPL from
On Mon, Nov 10, 2014 at 06:34:10PM +0200, Lubomir Popov wrote:
The comments on the QSPI pad assignments erronously swapped
the qspi1_d0 and qspi1_d1 functionality and could cause
confusion. QSPI1_D[0] is in fact muxed on pad U1 (gpmc_a16),
and QSPI1_D[1] - on pad P3 (gpmc_a17). Fixing
On Tue, Nov 18, 2014 at 11:51:04AM +0100, Heiko Schocher wrote:
a record could contain other records, so after an (begin mark)
there not always come an end mark , instead a is possible.
Take care of this.
Signed-off-by: Heiko Schocher h...@denx.de
Applied to u-boot-ti/master, thanks!
--
On Thu, Nov 13, 2014 at 03:43:39AM +0100, Stefan Roese wrote:
The functions to detect the state of the ready / busy signal is already
available but only used in the SPL case. Lets use it always, also for the
main U-Boot. As all boards should have this HW connection.
Testing on Siemens Draco
On Mon, Nov 10, 2014 at 06:14:18PM +0200, Lubomir Popov wrote:
Tested on a Vayu EVM Rev.E2 with DRA752 ES1.1
Signed-off-by: Lubomir Popov l-po...@ti.com
Reviewed-by: Tom Rini tr...@ti.com
Applied to u-boot-ti/master, thanks!
--
Tom
signature.asc
Description: Digital signature
Hi Bin,
On 5 December 2014 at 06:53, Bin Meng bmeng...@gmail.com wrote:
Hi Simon,
On Fri, Dec 5, 2014 at 7:56 AM, Simon Glass s...@chromium.org wrote:
Hi Bin,
On 4 December 2014 at 08:03, Bin Meng bmeng...@gmail.com wrote:
Signed-off-by: Bin Meng bmeng...@gmail.com
---
On Tue, Nov 18, 2014 at 11:51:06AM +0100, Heiko Schocher wrote:
add FIT support and set boardid from factoryset records
DEV/id and COMP/ver. boardid is used for selecting
which fit configuration gets booted on the board.
Signed-off-by: Heiko Schocher h...@denx.de
Applied to
Hello myself,
The following changes since commit f0c6e1c31b94f193047619b6adf67c2d792b659e:
Revert image-fdt: boot_get_fdt() return value when no DTB exists
(2014-12-03 13:19:34 -0500)
are available in the git repository at:
git://git.denx.de/u-boot-ti.git master
for you to fetch changes
On Tue, Nov 18, 2014 at 11:51:05AM +0100, Heiko Schocher wrote:
Signed-off-by: Heiko Schocher h...@denx.de
Applied to u-boot-ti/master, thanks!
--
Tom
signature.asc
Description: Digital signature
___
U-Boot mailing list
U-Boot@lists.denx.de
On Sat, Nov 08, 2014 at 08:55:47PM +0100, Paul Kocialkowski wrote:
Boards using the TWL4030 regulator may not all use the LDOs the same way
(e.g. MMC2 power can be controlled by another LDO than VMMC2).
This delegates TWL4030 MMC power initializations to board-specific functions,
that may
There are two kinds of expansion boards which are often used for
the UniPhier platform and they are only exclusively selectable.
It can be better described by the choice menu of Kconfig.
Signed-off-by: Masahiro Yamada yamad...@jp.panasonic.com
---
arch/arm/cpu/armv7/uniphier/Kconfig | 23
Add I2C controller and NAND controller devices. Fix indentation too.
Signed-off-by: Masahiro Yamada yamad...@jp.panasonic.com
---
arch/arm/dts/uniphier-ph1-ld4-ref.dts | 23 +---
arch/arm/dts/uniphier-ph1-ld4.dtsi | 40 -
arch/arm/dts/uniphier-ph1-pro4-ref.dts
Signed-off-by: Masahiro Yamada yamad...@jp.panasonic.com
---
include/configs/uniphier-common.h | 1 -
1 file changed, 1 deletion(-)
diff --git a/include/configs/uniphier-common.h
b/include/configs/uniphier-common.h
index 2140fcc..31ab470 100644
--- a/include/configs/uniphier-common.h
+++
0x2000-0x2fff: assigned to ARM mpcore (sLD3 only)
0xf000-0x: assigned to Denali NAND controller (sLD3 only)
Signed-off-by: Masahiro Yamada yamad...@jp.panasonic.com
---
arch/arm/cpu/armv7/uniphier/init_page_table.c | 7 ++-
1 file changed, 6 insertions(+), 1 deletion(-)
Some configurations have been moved to Kconfig and the difference
among the config headers of UniPhier SoC variants is getting smaller
and smaller. Now is a good time to merge them into a single file.
Signed-off-by: Masahiro Yamada yamad...@jp.panasonic.com
---
Signed-off-by: Masahiro Yamada yamad...@jp.panasonic.com
---
arch/arm/dts/Makefile | 1 +
arch/arm/dts/uniphier-ph1-sld3-ref.dts | 57
arch/arm/dts/uniphier-ph1-sld3.dtsi| 121 +
3 files changed, 179 insertions(+)
create
Some UniPhier boards are equipped with an expansion slot that
some optional SRAM/NOR-flash cards can be attached to. So, run-time
detection of the number of flash banks would be more user-friendly.
Until this commit, UniPhier boards have achieved this by (ab)using
board_flash_wp_on() because the
Signed-off-by: Masahiro Yamada yamad...@jp.panasonic.com
---
arch/arm/cpu/armv7/uniphier/ph1-pro4/sbc_init.c | 20 ++--
1 file changed, 10 insertions(+), 10 deletions(-)
diff --git a/arch/arm/cpu/armv7/uniphier/ph1-pro4/sbc_init.c
Masahiro Yamada (9):
ARM: UniPhier: disable autostart by default
ARM: UniPhier: use boot_is_swapped() macro for readability
ARM: UniPhier: move CONFIG_UNIPHIER_SMP to Kconfig
ARM: UniPhier: move support card select to Kconfig
ARM: UniPhier: merge UniPhier config headers into a single
Signed-off-by: Masahiro Yamada yamad...@jp.panasonic.com
---
arch/arm/cpu/armv7/uniphier/Kconfig | 4
include/configs/ph1_pro4.h | 2 --
2 files changed, 4 insertions(+), 2 deletions(-)
diff --git a/arch/arm/cpu/armv7/uniphier/Kconfig
b/arch/arm/cpu/armv7/uniphier/Kconfig
index
Hi Bin,
On 5 December 2014 at 01:35, Bin Meng bmeng...@gmail.com wrote:
Hi Simon,
On Fri, Dec 5, 2014 at 6:43 AM, Simon Glass s...@chromium.org wrote:
Hi Bin,
On 4 December 2014 at 08:01, Bin Meng bmeng...@gmail.com wrote:
Intel Tunnel Creek GPIO register block is compatible with current
Hi Bin,
On 5 December 2014 at 02:14, Bin Meng bmeng...@gmail.com wrote:
Hi Simon,
On Fri, Dec 5, 2014 at 7:43 AM, Simon Glass s...@chromium.org wrote:
Hi Bin,
On 4 December 2014 at 08:02, Bin Meng bmeng...@gmail.com wrote:
Integrate the processor microcode version 1.05 for Tunnel Creek,
Hi Bin,
On 5 December 2014 at 02:40, Bin Meng bmeng...@gmail.com wrote:
Hi Simon,
On Fri, Dec 5, 2014 at 7:48 AM, Simon Glass s...@chromium.org wrote:
Hi Bin,
On 4 December 2014 at 08:02, Bin Meng bmeng...@gmail.com wrote:
Implement minimum required functions for the basic support to
This series adds I2C support to driver model. It has become apparent that
this is a high priority as it is widely used. It follows along to some
extent from the SPI conversion.
Several changes are made from the original I2C implementations.
Firstly it is not necessary to specify the chip
In order to test I2C we need some sort of emulation interface. Add hooks
to allow a driver to emulate an I2C device for sandbox.
Signed-off-by: Simon Glass s...@chromium.org
Acked-by: Heiko Schocher h...@denx.de
---
Changes in v5: None
Changes in v4: None
Changes in v3: None
Changes in v2: None
Dear Ajay Kumar,
On 5 December 2014 at 23:13, Ajay Kumar ajaykumar...@samsung.com wrote:
Add get_lcd_clk and set_lcd_clk callbacks for Exynos5800 needed by
exynos video driver.
Signed-off-by: Ajay Kumar ajaykumar...@samsung.com
---
arch/arm/cpu/armv7/exynos/clock.c | 63
This driver includes some test features such as only supporting certain
bus speeds. It passes its I2C traffic through to an emulator.
Acked-by: Heiko Schocher h...@denx.de
Signed-off-by: Simon Glass s...@chromium.org
---
Changes in v5: None
Changes in v4:
- Drop set_offset_len() method
Changes
There seem to be a few EEPROM drivers around - perhaps we should have a
single standard one? This simple driver is used for sandbox testing, but
could be pressed into more active service.
Signed-off-by: Simon Glass s...@chromium.org
Acked-by: Heiko Schocher h...@denx.de
---
Changes in v5: None
Some of these are missing a newline. Add it.
Signed-off-by: Simon Glass s...@chromium.org
---
Changes in v5: None
Changes in v4:
- Add new patch to add newline to debug() messages
Changes in v3: None
Changes in v2: None
drivers/core/device.c | 6 +++---
1 file changed, 3 insertions(+), 3
The concept of a 'current bus' is now implemented in the command line
rather than in the uclass. Also the address length does not need to
be specified with each command - really we should consider dropping
this from most commands but it works OK for now.
Signed-off-by: Simon Glass
Add an I2C bus to the device tree, with an EEPROM emulator attached to one
of the addresses.
Signed-off-by: Simon Glass s...@chromium.org
Acked-by: Heiko Schocher h...@denx.de
---
Changes in v5: None
Changes in v4: None
Changes in v3: None
Changes in v2: None
arch/sandbox/dts/sandbox.dts | 17
The uclass implements the same operations as the current I2C framework but
makes some changes to make it fit driver model better:
- Remove the chip address from API calls
- Remove the address length from API calls
- Remove concept of 'current' I2C bus
- Drop all existing init functions
Acked-by:
Enable the options to bring up I2C on sandbox. Also enable all the available
I2C commands for testing purposes.
Signed-off-by: Simon Glass s...@chromium.org
Acked-by: Heiko Schocher h...@denx.de
---
Changes in v5: None
Changes in v4: None
Changes in v3: None
Changes in v2: None
To enable testing of I2C, add a simple I2C EEPROM simulator for sandbox.
It supports reading and writing from a small data store.
Signed-off-by: Simon Glass s...@chromium.org
Acked-by: Heiko Schocher h...@denx.de
---
Changes in v5: None
Changes in v4:
- Add a probe_chip() method for the eeprom
-
Add some basic tests to check that the system works as expected.
Signed-off-by: Simon Glass s...@chromium.org
Acked-by: Heiko Schocher h...@denx.de
---
Changes in v5:
- Adjust tests for DM_I2C_CHIP_RE_ADDRESS split
Changes in v4:
- Add an assert for non-null
- Add tests for offset length
-
This converts all Tegra boards over to use driver model for I2C. The driver
is adjusted to use driver model and the following obsolete CONFIGs are
removed:
- CONFIG_SYS_I2C_INIT_BOARD
- CONFIG_I2C_MULTI_BUS
- CONFIG_SYS_MAX_I2C_BUS
- CONFIG_SYS_I2C_SPEED
- CONFIG_SYS_I2C
This has
On Fri, 2014-12-05 at 19:43 +0530, Ajay Kumar wrote:
Add code to support powerup sequence for peach-pi LCD.
Signed-off-by: Ajay Kumar ajaykumar...@samsung.com
---
board/samsung/smdk5420/smdk5420.c | 32 +---
1 file changed, 21 insertions(+), 11 deletions(-)
Hi Prafulla,
Without LIBFDT feature, all newer kernel are unusable !
I agree with a review may be needed with : [PATCH v3 2/2] arm: marvell: fix ENV
and MTDPARTS for sheevaplug
is there any problem with : [PATCH v3 1/2] arm: marvell: add LIBFDT support to
sheevaplug
Regards,
Gérald
Le
Tom,
The following changes since commit 38cd8c4253013ccdd4052ee021f6066fe9a52551:
Merge branch 'master' of git://git.denx.de/u-boot-mips (2014-11-27 10:49:38
-0500)
are available in the git repository at:
git://git.denx.de/u-boot-mpc85xx.git master
for you to fetch changes up to
Hey Simon,
On Thu, 2014-12-04 at 06:36 -0700, Simon Glass wrote:
This will be used by nyan-big, but bring it in in a separate patch since it
will be common to other boards.
Signed-off-by: Simon Glass s...@chromium.org
This will clash with the patch i sent last week to pull (sorry i didn't
On 10/24/2014 07:49 AM, Joakim Tjernlund wrote:
fman_port_enet_if() tests if FM1_DTSEC2 or FM1_DTSEC4 uses
RGMII or MII and if not returns PHY_INTERFACE_MODE_NONE.
This excludes testing for SGMII further down.
Remove the unconditional else return PHY_INTERFACE_MODE_NONE
so SGMII can be
On 10/26/2014 07:08 PM, Shengzhou Liu wrote:
Add serdes2 protocol 0x2e.
Signed-off-by: Shengzhou Liu shengzhou@freescale.com
---
Applied to u-boot-mpc85xx, awaiting upstream.
York
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U-Boot mailing list
U-Boot@lists.denx.de
On 10/29/2014 10:03 AM, Prabhakar Kushwaha wrote:
When device is configured to load RCW from NAND flash IFC_A[16:31] are driven
low after RCW loading. Hence Devices connected on IFC_CS[1:7] and using
IFC_A[16:31] lines are not accessible.
Workaround is already in-place.
Put the errata
On 10/29/2014 10:03 AM, Prabhakar Kushwaha wrote:
Workaround of Errata A-008044 was implemented without errata number and it is
enabled by default. Errata A-008044 is only valid for T1040 Rev 1.0.
So put errata number and make it conditional.
Signed-off-by: Prabhakar Kushwaha
On 10/29/2014 11:07 PM, Zhao Qiang wrote:
T2080 v1.0 has this errata while v1.1 has fixed
this errata by hardware, add a new function has_errata_a007186
to check the SVR_SOC_VER, SVR_MAJ and SVR_MIN first,
if the sil has errata a007186, then run the errata code,
if not, doesn't run the code.
On 10/31/2014 03:06 AM, ying.zh...@freescale.com wrote:
From: Ying Zhang b40...@freescale.com
The fuse status register provides the values from on-chip
voltage ID efuses programmed at the factory.
These values define the voltage requirements for
the chip. u-boot reads FUSESR and translates
On 11/03/2014 11:10 PM, ying.zh...@freescale.com wrote:
From: Ying Zhang b40...@freescale.com
Use generic board architecture for p1025-twr, tested with NOR
boot and NAND boot on p1025-twr.
Signed-off-by: Ying Zhang b40...@freescale.com
---
Applied to u-boot-mpc85xx, awaiting upstream.
On 11/05/2014 09:05 PM, ying.zh...@freescale.com wrote:
From: Ying Zhang b40...@freescale.com
Use generic board architecture for p1010rdb, tested with NOR
boot on p1010rdb-pb.
Signed-off-by: Ying Zhang b40...@freescale.com
---
Applied to u-boot-mpc85xx, awaiting upstream.
York
On 11/04/2014 03:53 AM, shh@gmail.com wrote:
From: Shaohui Xie shaohui@freescale.com
The define CONFIG_FSL_SATA_V2 is missing, so SATA is not available
in U-boot.
Signed-off-by: Shaohui Xie shaohui@freescale.com
---
Applied to u-boot-mpc85xx, awaiting upstream.
York
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