Hi Jagan,
On Tue, Dec 9, 2014 at 11:29 PM, Jagannadha Sutradharudu Teki
jagannadh.t...@gmail.com wrote:
From: Bin Meng bmeng...@gmail.com
Currently if SST flash advertises SST_WP flag in the params table
the word program command (ADh) with auto address increment will be
used for the flash
Hi Jagan,
On Tue, Dec 9, 2014 at 11:29 PM, Jagannadha Sutradharudu Teki
jagannadh.t...@gmail.com wrote:
Enabled byte program support for sst flashes in sf.
Few controllers will only support BP, so this patch
gives a rx transfer flag to set the BP so-that sf
Actually it is a tx transfer flag.
Hi Jagan,
On Tue, Dec 9, 2014 at 11:29 PM, Jagannadha Sutradharudu Teki
jagannadh.t...@gmail.com wrote:
Few of the spi controllers are only supports array slow
read which is quite different behaviour compared to others.
So this fix on sf will correctly handle the slow read supported
Hello,
i'm upcycling an old stereo amplifier and using an raspberry pi to do
this. Since i didn't want to unscrew the cover everytime i want to do an
update, i thought booting with u-boot from a secondary partition would
be a good idea. I'm using buildroot to create a customized kernel /
This driver uses struct pl01x_priv as private data. However, the area of this
structure has not been reserved.
This reserves area of struct pl01x_priv by using priv_auto_alloc_size.
Signed-off-by: Nobuhiro Iwamatsu nobuhiro.iwamatsu...@renesas.com
---
drivers/serial/serial_pl01x.c | 1 +
1 file
The ich spi controller driver spi_xfer() tries to align reading
address to 64 bytes when doing spi data in, which causes a bug of
either infinite loop or a huge size memcpy().
Actually the ich spi controller does not have such requirement of
64 bytes alignment when reading data from spi slave
ICH 7 SPI controller only supports byte program (02h) for SST flash.
Word program (ADh) is not supported.
Signed-off-by: Bin Meng bmeng...@gmail.com
---
Split from my v2 patch @ http://patchwork.ozlabs.org/patch/405753/
This needs to be applied after Jagan's new patch series:
ICH 7 SPI controller only supports array read command (03h).
Fast array read command (0Bh) is not supported.
Signed-off-by: Bin Meng bmeng...@gmail.com
Acked-by: Simon Glass s...@chromium.org
Tested-by: Simon Glass s...@chromium.org
---
Changes in v3: None
RESEND of v2 patch @
Hi York,
On 12/09/2014 11:15 PM, York Sun wrote:
Tom,
I found a compiling error for board mx53loco, undefined reference to
`disable_sata_clock'. Not sure if this is related to recent patches from
Nikita.
It is, and there is a fix in the u-boot-imx tree. It should be merged
soon. See this
This patch adds the new Barco platinum platform. It currently
includes those two boards:
platinum-titanium
-
This is the same board as the titanium that is already supported in
mainline U-Boot. But its now moved to this new platform to support
multiple flavors of imx6 boards in
Hi Tom,
please pull from u-boot-imx, thanks !
The following changes since commit 2a82ec77d27ef5f860a107c4b764643a655dceeb:
Prepare v2015.01-rc2 (2014-11-24 17:08:47 -0500)
are available in the git repository at:
git://www.denx.de/git/u-boot-imx.git master
for you to fetch changes up to
On 10 December 2014 at 13:40, Bin Meng bmeng...@gmail.com wrote:
Hi Jagan,
On Tue, Dec 9, 2014 at 11:29 PM, Jagannadha Sutradharudu Teki
jagannadh.t...@gmail.com wrote:
From: Bin Meng bmeng...@gmail.com
Currently if SST flash advertises SST_WP flag in the params table
the word program
Hi Jagan,
On Wed, Dec 10, 2014 at 6:02 PM, Jagan Teki jagannadh.t...@gmail.com wrote:
On 10 December 2014 at 13:40, Bin Meng bmeng...@gmail.com wrote:
Hi Jagan,
On Tue, Dec 9, 2014 at 11:29 PM, Jagannadha Sutradharudu Teki
jagannadh.t...@gmail.com wrote:
From: Bin Meng bmeng...@gmail.com
Hello Robert, Andreas,
On 09-12-14 22:45, Robert Nelson wrote:
On Mon, Dec 8, 2014 at 4:19 PM, Jeroen Hofstee jer...@myspectrum.nl wrote:
Hi,
A while ago [1], a RFC was posted to disable workaround for
besides others, errata 430973. It is a bit unclear to me which
revision actually need this
SerDes 2 protocol 56 is not valid any longer due to
the new RCW; protocol 55 is used instead, so add
SerDes 2 protocol 55 to align with RCW.
Signed-off-by: Chunhe Lan chunhe@freescale.com
---
board/freescale/t4rdb/eth.c |2 +-
board/freescale/t4rdb/t4_rcw.cfg |4 ++--
2 files
SerDes 2 protocol 56 is not valid any longer due to
the new RCW; protocol 55 is used instead, so add
SerDes 2 protocol 55 to align with RCW.
Signed-off-by: Chunhe Lan chunhe@freescale.com
---
board/freescale/t4rdb/eth.c |2 +-
board/freescale/t4rdb/t4_rcw.cfg |4 ++--
2 files
This series update SPI flash supported read commands per datasheet
in the flash params table, and change flash sector size to 4KiB as
long as flash supports sector erase (20h) command, to ensure
'sf erase offset +len' work on 4KiB boundary instead of 64KiB when
given SECT_4K.
Changes in v3:
-
Update SST25VF064C read command to RD_EXTN per datasheet.
Also change flash sector size to 4KiB to match SECT_4K.
Signed-off-by: Bin Meng bmeng...@gmail.com
---
drivers/mtd/spi/sf_params.c | 20 ++--
1 file changed, 10 insertions(+), 10 deletions(-)
diff --git
Update supported read commands for Macronix flash parts per datasheet.
Also update flash sector size to 4KiB as long as flash supports sector
erase (20h) command.
Signed-off-by: Bin Meng bmeng...@gmail.com
---
drivers/mtd/spi/sf_params.c | 20 ++--
1 file changed, 10
Update supported read commands for GigaDevice flash parts to RD_FULL
per datasheet. Also update flash sector size to 4KiB as long as flash
supports sector erase (20h) command.
Signed-off-by: Bin Meng bmeng...@gmail.com
---
drivers/mtd/spi/sf_params.c | 4 ++--
1 file changed, 2 insertions(+), 2
Update supported read commands for EON flash parts to RD_EXTN and
QUAD_IO_FAST per datasheet. Also update flash sector size to 4KiB
as long as flash supports sector erase (20h) command.
Signed-off-by: Bin Meng bmeng...@gmail.com
---
drivers/mtd/spi/sf_params.c | 8
1 file changed, 4
Update supported read commands for Micron flash parts per datasheet.
Also update flash sector size to 4KiB as long as flash supports sector
erase (20h) command.
Signed-off-by: Bin Meng bmeng...@gmail.com
---
drivers/mtd/spi/sf_params.c | 46 ++---
1 file
Update flash sector size to 4KiB as long as flash supports sector
erase (20h) command. Correct AT25DF321 JEDEC ID and bulk erase
command to 50h instead of D8h. Also add AT25DF321A params per
datasheet.
Signed-off-by: Bin Meng bmeng...@gmail.com
---
drivers/mtd/spi/sf_internal.h | 5 +
Signed-off-by: Bin Meng bmeng...@gmail.com
---
drivers/mtd/spi/sf_params.c | 169 ++--
1 file changed, 85 insertions(+), 84 deletions(-)
diff --git a/drivers/mtd/spi/sf_params.c b/drivers/mtd/spi/sf_params.c
index 735dd54..b5177ad 100644
---
Update supported read commands for Spansion flash parts per datasheet.
Also update flash sector size to 4KiB as long as flash supports sector
erase (20h) command.
Signed-off-by: Bin Meng bmeng...@gmail.com
---
drivers/mtd/spi/sf_params.c | 12 ++--
1 file changed, 6 insertions(+), 6
Update supported read commands for Winbond flash parts per datasheet.
Also update flash sector size to 4KiB as long as flash supports sector
erase (20h) command. Add W25X10, W25X20, W25X80 params per datasheet.
Signed-off-by: Bin Meng bmeng...@gmail.com
---
drivers/mtd/spi/sf_params.c | 39
From: Sonic Zhang sonic.zh...@analog.com
When watchdog is enabled, memmove_wd() always copy chunk up from small address.
This damanges overlapped memory data if destination address is smaller than
source address.
Signed-off-by: Sonic Zhang sonic.zh...@analog.com
---
common/image.c | 14
Hi Simon,
Sorry for my late reply.
On Fri, 5 Dec 2014 07:50:33 -0700
Simon Glass s...@chromium.org wrote:
Sorry I didn't reply on this.
I have been thinking about this for a while. For SPI we have the same
problem and I think I mentioned it in the code somewhere. For the PCI
RFC I have
Hi Simon,
I have some comments on sandbox I2C driver.
On Fri, 5 Dec 2014 08:32:07 -0700
Simon Glass s...@chromium.org wrote:
+
+static int get_emul(struct udevice *bus, uint chip_addr, struct udevice
**devp,
+ struct dm_i2c_ops **opsp)
+{
+ const void *blob =
Hi Simon,
Sorry for my late reply.
On Fri, 5 Dec 2014 07:41:50 -0700
Simon Glass s...@chromium.org wrote:
n -EADDRNOTAVAIL;
I notice i2c_{read|write}_bytewise checks the return code of this
function, but the normal one does not.
I think it seems a little bit strange.
Instead of
Hi Simon,
Some minor comments.
On Fri, 5 Dec 2014 08:32:08 -0700
Simon Glass s...@chromium.org wrote:
+int sandbox_i2c_probe_chip(struct udevice *bus, uint chip_addr, uint
chip_flags)
+{
static ??
+ /* Always let probe succeed */
+ printf(%s: Detected probe\n, __func__);
+
Hi Simon,
On Fri, 5 Dec 2014 08:32:04 -0700
Simon Glass s...@chromium.org wrote:
+struct dm_i2c_chip {
+ uint chip_addr;
+ uint offset_len;
+ uint flags;
+#ifdef CONFIG_SANDBOX
+ struct udevice *emul;
+#endif
+};
I do not like this ifdef conditional.
As mentioned in
On Fri, 5 Dec 2014 08:32:05 -0700
Simon Glass s...@chromium.org wrote:
The concept of a 'current bus' is now implemented in the command line
rather than in the uclass. Also the address length does not need to
be specified with each command - really we should consider dropping
this from most
On Fri, 5 Dec 2014 08:32:10 -0700
Simon Glass s...@chromium.org wrote:
Add an I2C bus to the device tree, with an EEPROM emulator attached to one
of the addresses.
Signed-off-by: Simon Glass s...@chromium.org
Acked-by: Heiko Schocher h...@denx.de
---
Changes in v5: None
Changes in
On Fri, 5 Dec 2014 08:32:11 -0700
Simon Glass s...@chromium.org wrote:
There seem to be a few EEPROM drivers around - perhaps we should have a
single standard one? This simple driver is used for sandbox testing, but
could be pressed into more active service.
Signed-off-by: Simon Glass
On Fri, 5 Dec 2014 08:32:06 -0700
Simon Glass s...@chromium.org wrote:
In order to test I2C we need some sort of emulation interface. Add hooks
to allow a driver to emulate an I2C device for sandbox.
Signed-off-by: Simon Glass s...@chromium.org
Acked-by: Heiko Schocher h...@denx.de
Simon,
I forgot to mention a minor issue.
On Fri, 5 Dec 2014 08:32:07 -0700
Simon Glass s...@chromium.org wrote:
+static int get_emul(struct udevice *bus, uint chip_addr, struct udevice
**devp,
+ struct dm_i2c_ops **opsp)
+{
+ const void *blob = gd-fdt_blob;
+
On Wed, Dec 10, 2014 at 04:39:39PM +0900, Masahiro Yamada wrote:
Hi.
I notice SPL is using .data section
u32 *boot_params_ptr = NULL;
struct spl_image_info spl_image;
/* Define board data structure */
static bd_t bdata __attribute__ ((section(.data)));
If SPL is running
Hi,
On 4 December 2014 at 06:36, Simon Glass s...@chromium.org wrote:
From: Allen Martin amar...@nvidia.com
Nyan-big is a Tegra124 clamshell board that is very similar to venice2, but
it has a different panel, the sdcard cd and wp sense are flipped, and it has
a different revision of the
Hi Albert,
On 9 December 2014 at 22:25, Simon Glass s...@chromium.org wrote:
From: Thierry Reding tred...@nvidia.com
Implement an API that can be used by drivers to allocate memory from a
pool that is mapped uncached. This is useful if drivers would otherwise
need to do extensive cache
Hi Bin,
On 9 December 2014 at 23:23, Bin Meng bmeng...@gmail.com wrote:
Hi Simon,
On Wed, Dec 10, 2014 at 2:04 PM, Simon Glass s...@chromium.org wrote:
On 9 December 2014 at 07:50, Bin Meng bmeng...@gmail.com wrote:
FSP builds a series of data structures called the Hand-Off-Blocks
(HOBs) as
Hi Masahiro,
On 10 December 2014 at 06:18, Masahiro Yamada yamad...@jp.panasonic.com wrote:
Hi Simon,
Sorry for my late reply.
On Fri, 5 Dec 2014 07:50:33 -0700
Simon Glass s...@chromium.org wrote:
Sorry I didn't reply on this.
I have been thinking about this for a while. For SPI we
Hi,
On Thu, Nov 20, 2014 at 05:49:17PM +0100, Maxime Ripard wrote:
Hi,
I'm currently working on 2014.07, on a custom TI AM335x based board.
Everything works great so far, except when we're trying to have USB
host working.
The board has the MUSB1 controller wired as USB Host only, with
Hi Masahiro,
On 10 December 2014 at 06:19, Masahiro Yamada yamad...@jp.panasonic.com wrote:
Hi Simon,
I have some comments on sandbox I2C driver.
On Fri, 5 Dec 2014 08:32:07 -0700
Simon Glass s...@chromium.org wrote:
+
+static int get_emul(struct udevice *bus, uint chip_addr, struct
Hi Bin,
On 9 December 2014 at 23:01, Bin Meng bmeng...@gmail.com wrote:
Hi Simon,
On Wed, Dec 10, 2014 at 1:53 PM, Simon Glass s...@chromium.org wrote:
Hi Bin,
On 9 December 2014 at 07:49, Bin Meng bmeng...@gmail.com wrote:
This is the initial import from Intel FSP release for Queensbay
This series adds I2C support to driver model. It has become apparent that
this is a high priority as it is widely used. It follows along to some
extent from the SPI conversion.
Several changes are made from the original I2C implementations.
Firstly it is not necessary to specify the chip
The concept of a 'current bus' is now implemented in the command line
rather than in the uclass. Also the address length does not need to
be specified with each command - really we should consider dropping
this from most commands but it works OK for now.
Signed-off-by: Simon Glass
This converts all Tegra boards over to use driver model for I2C. The driver
is adjusted to use driver model and the following obsolete CONFIGs are
removed:
- CONFIG_SYS_I2C_INIT_BOARD
- CONFIG_I2C_MULTI_BUS
- CONFIG_SYS_MAX_I2C_BUS
- CONFIG_SYS_I2C_SPEED
- CONFIG_SYS_I2C
This has
In order to test I2C we need some sort of emulation interface. Add hooks
to allow a driver to emulate an I2C device for sandbox.
Signed-off-by: Simon Glass s...@chromium.org
Acked-by: Heiko Schocher h...@denx.de
Reviewed-by: Masahiro Yamada yamad...@jp.panasonic.com
---
Changes in v6: None
This driver includes some test features such as only supporting certain
bus speeds. It passes its I2C traffic through to an emulator.
Acked-by: Heiko Schocher h...@denx.de
Signed-off-by: Simon Glass s...@chromium.org
---
Changes in v6:
- Drop a stale comment
- Pass value from i2c_get_chip() to
To enable testing of I2C, add a simple I2C EEPROM simulator for sandbox.
It supports reading and writing from a small data store.
Signed-off-by: Simon Glass s...@chromium.org
Acked-by: Heiko Schocher h...@denx.de
---
Changes in v6:
- Drop the probe_chip() method which is not needed
Changes in
The uclass implements the same operations as the current I2C framework but
makes some changes to make it fit driver model better:
- Remove the chip address from API calls
- Remove the address length from API calls
- Remove concept of 'current' I2C bus
- Drop all existing init functions
Acked-by:
Add an I2C bus to the device tree, with an EEPROM emulator attached to one
of the addresses.
Signed-off-by: Simon Glass s...@chromium.org
Acked-by: Heiko Schocher h...@denx.de
Reviewed-by: Masahiro Yamada yamad...@jp.panasonic.com
---
Changes in v6: None
Changes in v5: None
Changes in v4: None
Enable the options to bring up I2C on sandbox. Also enable all the available
I2C commands for testing purposes.
Signed-off-by: Simon Glass s...@chromium.org
Acked-by: Heiko Schocher h...@denx.de
---
Changes in v6: None
Changes in v5: None
Changes in v4: None
Changes in v3: None
Changes in v2:
Add some basic tests to check that the system works as expected.
Signed-off-by: Simon Glass s...@chromium.org
Acked-by: Heiko Schocher h...@denx.de
---
Changes in v6: None
Changes in v5:
- Adjust tests for DM_I2C_CHIP_RE_ADDRESS split
Changes in v4:
- Add an assert for non-null
- Add tests for
There seem to be a few EEPROM drivers around - perhaps we should have a
single standard one? This simple driver is used for sandbox testing, but
could be pressed into more active service.
Signed-off-by: Simon Glass s...@chromium.org
Acked-by: Heiko Schocher h...@denx.de
Reviewed-by: Masahiro
Some of these are missing a newline. Add it.
Signed-off-by: Simon Glass s...@chromium.org
---
Changes in v6: None
Changes in v5: None
Changes in v4:
- Add new patch to add newline to debug() messages
Changes in v3: None
Changes in v2: None
drivers/core/device.c | 6 +++---
1 file changed, 3
Hi Simon,
2014-12-11 0:55 GMT+09:00 Simon Glass s...@chromium.org:
This driver includes some test features such as only supporting certain
bus speeds. It passes its I2C traffic through to an emulator.
Acked-by: Heiko Schocher h...@denx.de
Signed-off-by: Simon Glass s...@chromium.org
---
Hi Everyone,
The patch below fixes the autoconf_is_current function in the u-boot build
system in the event that the file timestamps are identical. This
situation tends to occur when building u-boot on an EXT3 filesystem which
has 1 second resolution for timestamps. In our case, the failure
Hi Masahiro,
On 10 December 2014 at 10:02, Masahiro YAMADA yamad...@jp.panasonic.com wrote:
Hi Simon,
2014-12-11 0:55 GMT+09:00 Simon Glass s...@chromium.org:
This driver includes some test features such as only supporting certain
bus speeds. It passes its I2C traffic through to an
Hi Tom,
On 10 December 2014 at 10:39, Tom Warren twar...@nvidia.com wrote:
Simon,
The v4 PCIE patch series fails to apply to u-boot-tegra/master after rebasing
my repo against both ARM master and U-Boot 'master' master (i.e. FETCH_HEAD =
32fdf0e4d82bdca5d64d86330e461e59685f9959
On 24 November 2014 at 21:36, Simon Glass s...@chromium.org wrote:
The private data size is missing from the driver, so we store it at 0,
which causes problems when something overwrites memory at 0.
Fix this.
Signed-off-by: Simon Glass s...@chromium.org
---
Changes in v3:
- Add new patch
On 29 November 2014 at 20:41, Stephen Warren swar...@wwwdotorg.org wrote:
On 11/24/2014 09:36 PM, Simon Glass wrote:
Adjust the configuration to use the driver model version of the pl01x
serial driver. Add the required platform data.
The series,
Tested-by: Stephen Warren
Hi,
On 10 December 2014 at 01:24, Nobuhiro Iwamatsu
nobuhiro.iwamatsu...@renesas.com wrote:
This driver uses struct pl01x_priv as private data. However, the area of this
structure has not been reserved.
This reserves area of struct pl01x_priv by using priv_auto_alloc_size.
Signed-off-by:
Hi Masahiro,
On 10 December 2014 at 06:19, Masahiro Yamada yamad...@jp.panasonic.com wrote:
Hi Simon,
Some minor comments.
On Fri, 5 Dec 2014 08:32:08 -0700
Simon Glass s...@chromium.org wrote:
+int sandbox_i2c_probe_chip(struct udevice *bus, uint chip_addr, uint
chip_flags)
+{
On 12/09/2014 07:54 PM, Chris Packham wrote:
Add the following configuration:
o CONFIG_SYS_GENERIC_BOARD
o CONFIG_DISPLAY_BOARDINFO
Signed-off-by: Chris Packham judge.pack...@gmail.com
---
Builds, pings and boots a kernel. Any other testing needed?
include/configs/P2041RDB.h | 2 ++
Hi Bin,
On 10 December 2014 at 18:21, Bin Meng bmeng...@gmail.com wrote:
Update supported read commands for EON flash parts to RD_EXTN and
QUAD_IO_FAST per datasheet. Also update flash sector size to 4KiB
as long as flash supports sector erase (20h) command.
Signed-off-by: Bin Meng
Hi Bin,
On 10 December 2014 at 18:21, Bin Meng bmeng...@gmail.com wrote:
This series update SPI flash supported read commands per datasheet
in the flash params table, and change flash sector size to 4KiB as
long as flash supports sector erase (20h) command, to ensure
'sf erase offset +len'
Simon Glass s...@chromium.org writes:
[...]
OK, thanks. Any pointers on how to get this building with mainline
u-boot? Just adding CONFIG_SPL to odroid_xu3.h doesn't seem to work
(compile errors.) I'm quite comfortable in the kernel, but I'm not very
familiar with u-boot, especially SPL.
Hyungwon Hwang human.hw...@samsung.com writes:
Dear Kevin,
On Tue, 09 Dec 2014 15:36:00 -0800
Kevin Hilman khil...@kernel.org wrote:
Hyungwon Hwang human.hw...@samsung.com writes:
This is v11 of the patchset adding support Odroud XU3 board.
I finally got around to testing this on top
Hi Tom,
On Dec 10, 2014 12:05 PM, Tom Warren twar...@nvidia.com wrote:
Simon,
-Original Message-
From: s...@google.com [mailto:s...@google.com] On Behalf Of Simon Glass
Sent: Wednesday, December 10, 2014 10:50 AM
To: Tom Warren
Cc: U-Boot Mailing List; Allen Martin; Albert
good improvements -- and it fixes my issues
Thanks!
(tested buildman-working 6c7f1b6)
Tested-by: Steve Rae s...@broadcom.com
On 14-12-09 09:29 PM, Simon Glass wrote:
Hi,
On 1 December 2014 at 17:50, Simon Glass s...@chromium.org wrote:
Hi,
On 1 December 2014 at 17:33, Simon Glass
Hi Bin,
On 10 December 2014 at 18:21, Bin Meng bmeng...@gmail.com wrote:
Update supported read commands for Spansion flash parts per datasheet.
Also update flash sector size to 4KiB as long as flash supports sector
erase (20h) command.
Signed-off-by: Bin Meng bmeng...@gmail.com
---
NFS is useful for loading zImage and dts through
NFS export. It saves us from running two services
for loading files over the network (tftp and nfs).
Signed-off-by: Felipe Balbi ba...@ti.com
---
include/configs/beagle_x15.h | 1 +
1 file changed, 1 insertion(+)
diff --git
From: Rob Herring r...@kernel.org
In order to add detach functions for fastboot, make the DFU detach related
functions common so they can be shared.
Signed-off-by: Rob Herring r...@kernel.org
---
common/cmd_dfu.c | 6 +++---
drivers/dfu/dfu.c | 16
From: Rob Herring r...@kernel.org
The fastboot continue command is defined to exit fastboot and continue
autoboot. This commit implements the continue command and the exiting of
fastboot only. Subsequent u-boot commands can be processed after exiting
fastboot. Autoboot should implement a boot
Hi Tom,
On 10 December 2014 at 12:36, Simon Glass s...@chromium.org wrote:
Hi Tom,
On Dec 10, 2014 12:05 PM, Tom Warren twar...@nvidia.com wrote:
Simon,
-Original Message-
From: s...@google.com [mailto:s...@google.com] On Behalf Of Simon Glass
Sent: Wednesday, December 10,
On Mon, Dec 8, 2014 at 12:09 AM, Bo Shen voice.s...@atmel.com wrote:
Signed-off-by: Bo Shen voice.s...@atmel.com
---
arch/arm/Kconfig| 1 +
board/atmel/sama5d4_xplained/sama5d4_xplained.c | 85
+
Same here:
+#ifdef CONFIG_SYS_USE_MMC
+#define CONFIG_SPL_LDSCRIPT
arch/arm/cpu/at91-common/u-boot-spl.lds
+#define CONFIG_SPL_MMC_SUPPORT
+#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x400
+#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x200
+#define
On Wed, Dec 10, 2014 at 03:38:19PM +0900, Nobuhiro Iwamatsu wrote:
Dear Tom Rini.
Please pull u-boot-sh rmobile branch.
Sorry, rmobile of PR is delayed.
The following changes since commit 97cdf64026c7d749dd7a5c0dbaba7a60a7292ac9:
Merge branch 'sandbox' of git://git.denx.de/u-boot-x86
On Wed, Dec 10, 2014 at 10:36:38AM +0100, Stefano Babic wrote:
Hi Tom,
please pull from u-boot-imx, thanks !
The following changes since commit 2a82ec77d27ef5f860a107c4b764643a655dceeb:
Prepare v2015.01-rc2 (2014-11-24 17:08:47 -0500)
are available in the git repository at:
Hi Tom,
On 10 December 2014 at 14:09, Tom Warren twar...@nvidia.com wrote:
Simon,
-Original Message-
From: s...@google.com [mailto:s...@google.com] On Behalf Of Simon Glass
Sent: Wednesday, December 10, 2014 2:04 PM
To: Tom Warren
Cc: U-Boot Mailing List; Stephen Warren; Allen
On Tue, 2014-12-09 at 17:45 -0700, Simon Glass wrote:
Hi Peter,
On 9 December 2014 at 17:13, Peter Howard p...@northern-ridge.com.au wrote:
On Wed, 2014-12-03 at 14:20 -0800, Simon Glass wrote:
Hi Peter,
On 3 December 2014 at 13:53, Peter Howard p...@northern-ridge.com.au
On Thu, Dec 11, 2014 at 7:31 AM, York Sun york...@freescale.com wrote:
On 12/09/2014 07:54 PM, Chris Packham wrote:
Add the following configuration:
o CONFIG_SYS_GENERIC_BOARD
o CONFIG_DISPLAY_BOARDINFO
Signed-off-by: Chris Packham judge.pack...@gmail.com
---
Builds, pings and boots a
Hi Peter,
On 10 December 2014 at 15:17, Peter Howard p...@northern-ridge.com.au wrote:
On Tue, 2014-12-09 at 17:45 -0700, Simon Glass wrote:
Hi Peter,
On 9 December 2014 at 17:13, Peter Howard p...@northern-ridge.com.au
wrote:
On Wed, 2014-12-03 at 14:20 -0800, Simon Glass wrote:
On Wed, 2014-12-10 at 15:43 -0700, Simon Glass wrote:
Hi Peter,
On 10 December 2014 at 15:17, Peter Howard p...@northern-ridge.com.au wrote:
On Tue, 2014-12-09 at 17:45 -0700, Simon Glass wrote:
Hi Peter,
On 9 December 2014 at 17:13, Peter Howard p...@northern-ridge.com.au
Hi Simon,
On Wed, 10 Dec 2014 10:16:30 -0700
Simon Glass s...@chromium.org wrote:
Hi Masahiro,
On 10 December 2014 at 10:02, Masahiro YAMADA yamad...@jp.panasonic.com
wrote:
Hi Simon,
2014-12-11 0:55 GMT+09:00 Simon Glass s...@chromium.org:
This driver includes some test
Hi Peter,
On 10 December 2014 at 17:19, Peter Howard p...@northern-ridge.com.au wrote:
On Wed, 2014-12-10 at 15:43 -0700, Simon Glass wrote:
Hi Peter,
On 10 December 2014 at 15:17, Peter Howard p...@northern-ridge.com.au
wrote:
On Tue, 2014-12-09 at 17:45 -0700, Simon Glass wrote:
Hi
On Wed, 10 Dec 2014 08:55:51 -0700
Simon Glass s...@chromium.org wrote:
To enable testing of I2C, add a simple I2C EEPROM simulator for sandbox.
It supports reading and writing from a small data store.
Signed-off-by: Simon Glass s...@chromium.org
Acked-by: Heiko Schocher h...@denx.de
---
If CONFIG_SPL_NOR_SUPPORT is defined, spl_nor_load_image() requires
spl_start_uboot(), CONFIG_SYS_OS_BASE, CONFIG_SYS_SPL_ARGS_ADDR,
CONFIG_SYS_FDT_BASE to be defined even if users just want to run
U-Boot, not Linux. This is inconvenient.
Signed-off-by: Masahiro Yamada yamad...@jp.panasonic.com
Dear Kevin,
On Wed, 10 Dec 2014 11:20:43 -0800
Kevin Hilman khil...@kernel.org wrote:
Simon Glass s...@chromium.org writes:
[...]
OK, thanks. Any pointers on how to get this building with mainline
u-boot? Just adding CONFIG_SPL to odroid_xu3.h doesn't seem to
work (compile errors.)
Hi Robert Nelson,
On 12/11/2014 05:35 AM, Robert Nelson wrote:
+
+#ifdef CONFIG_SYS_USE_MMC
+#define CONFIG_SPL_LDSCRIPTarch/arm/cpu/at91-common/u-boot-spl.lds
+#define CONFIG_SPL_MMC_SUPPORT
+#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x400
+#define
On Wed, 2014-12-10 at 17:49 -0700, Simon Glass wrote:
Hi Peter,
On 10 December 2014 at 17:19, Peter Howard p...@northern-ridge.com.au wrote:
On Wed, 2014-12-10 at 15:43 -0700, Simon Glass wrote:
Hi Peter,
On 10 December 2014 at 15:17, Peter Howard p...@northern-ridge.com.au
wrote:
Hi Robert Nelson,
On 12/11/2014 09:21 AM, Bo Shen wrote:
Hi Robert Nelson,
On 12/11/2014 05:35 AM, Robert Nelson wrote:
+
+#ifdef CONFIG_SYS_USE_MMC
+#define CONFIG_SPL_LDSCRIPT
arch/arm/cpu/at91-common/u-boot-spl.lds
+#define CONFIG_SPL_MMC_SUPPORT
+#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS
On Thu, Dec 11, 2014 at 10:01:38AM +0900, Masahiro Yamada wrote:
If CONFIG_SPL_NOR_SUPPORT is defined, spl_nor_load_image() requires
spl_start_uboot(), CONFIG_SYS_OS_BASE, CONFIG_SYS_SPL_ARGS_ADDR,
CONFIG_SYS_FDT_BASE to be defined even if users just want to run
U-Boot, not Linux. This is
Hi Peter,
On Dec 10, 2014 6:23 PM, Peter Howard p...@northern-ridge.com.au wrote:
On Wed, 2014-12-10 at 17:49 -0700, Simon Glass wrote:
Hi Peter,
On 10 December 2014 at 17:19, Peter Howard p...@northern-ridge.com.au
wrote:
On Wed, 2014-12-10 at 15:43 -0700, Simon Glass wrote:
Hi
On Wed, 10 Dec 2014 11:23:08 -0800
Kevin Hilman khil...@kernel.org wrote:
Hyungwon Hwang human.hw...@samsung.com writes:
Dear Kevin,
On Tue, 09 Dec 2014 15:36:00 -0800
Kevin Hilman khil...@kernel.org wrote:
Hyungwon Hwang human.hw...@samsung.com writes:
This is v11 of the
Implement a feature to allow fastboot to write the downloaded image
to the space reserved for the Protective MBR and the Primary GUID
Partition Table.
Additionally, prepare and write the Backup GUID Partition Table.
Signed-off-by: Steve Rae s...@broadcom.com
---
Changes in v3:
- prefer
Hi Lukasz,
On 14-12-09 01:05 AM, Lukasz Majewski wrote:
Hi Steve,
Implement a feature to allow fastboot to write the downloaded image
to the space reserved for the Protective MBR and the Primary GUID
Partition Table.
Signed-off-by: Steve Rae s...@broadcom.com
---
Changes in v2:
add
Hi Tom,
On 10 December 2014 at 07:06, Tom Rini tr...@ti.com wrote:
On Wed, Dec 10, 2014 at 04:39:39PM +0900, Masahiro Yamada wrote:
Hi.
I notice SPL is using .data section
u32 *boot_params_ptr = NULL;
struct spl_image_info spl_image;
/* Define board data structure */
static bd_t
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