On Sun, Jul 12, 2015 at 05:05:34AM +0100, Christopher Kilgour wrote:
Fix LS102xa timer configuration to ensure timer compare value is set to
all-ones as a 64-bit number rather than a 32-bit number.
When the 32-bit all-ones was used, this could result in a timer compare value
of 2^32-1, which
Hello Masahiro,
On Mon, 13 Jul 2015 16:39:45 +0900, Masahiro Yamada
yamada.masah...@socionext.com wrote:
Hi Albert,
2015-07-13 15:51 GMT+09:00 Albert ARIBAUD albert.u.b...@aribaud.net:
Hello Masahiro,
On Mon, 13 Jul 2015 13:17:03 +0900, Masahiro Yamada
yamada.masah...@socionext.com
On 10/07/15 15:57, Tom Rini wrote:
On Thu, Jun 25, 2015 at 10:25:50AM +0300, Roger Quadros wrote:
If board is booted with transitions happening on DCAN1 pins then
the following warning is seen in the kernel at boot when the
hwmod layer initializes.
omap_hwmod: dcan1: _wait_target_disable
I implemented a GPIO driver based on Driver Model for the UniPhier
SoC family, but I could not find any good reason why such SoC
specific GPIO headers are needed.
Signed-off-by: Masahiro Yamada yamada.masah...@socionext.com
---
arch/arm/include/asm/gpio.h | 2 ++
1 file changed, 2 insertions(+)
2015-07-13 19:55 GMT+09:00 Albert ARIBAUD albert.u.b...@aribaud.net:
Hello Masahiro,
On Mon, 13 Jul 2015 16:39:45 +0900, Masahiro Yamada
yamada.masah...@socionext.com wrote:
Hi Albert,
2015-07-13 15:51 GMT+09:00 Albert ARIBAUD albert.u.b...@aribaud.net:
Hello Masahiro,
On Mon, 13 Jul
As mentioned in the comment block in include/libfdt.h,
fdt_get_string_index() is supposed to return a negative value
on error.
BTW, looks like this function was added only for U-Boot in spite of
its location, so we need not send a bug report back to the DTC ML.
Signed-off-by: Masahiro Yamada
Hey all,
I'm feeling good, I think, about releasing v2015.07. But before I tag
things, are there outstanding patches people know about that must be in
for an important fix? Thanks!
--
Tom
signature.asc
Description: Digital signature
___
U-Boot
Hi Vikas,
On 09.07.2015 03:29, Vikas MANOCHA wrote:
-Original Message-
From: Vikas MANOCHA
Sent: Wednesday, July 01, 2015 9:25 AM
To: 'Stefan Roese'
Cc: 'u-boot@lists.denx.de'; 'grmo...@opensource.altera.com';
'dingu...@opensource.altera.com'; 'jt...@openedev.com'
Subject: RE: [PATCH
On Wed, Jul 08, 2015 at 08:31:47AM +0100, Sharma Bhupesh wrote:
-Original Message-
From: U-Boot [mailto:u-boot-boun...@lists.denx.de] On Behalf Of Wang
Haikun
On 7/8/2015 3:13 PM, Bin Meng wrote:
Hi,
On Wed, Jul 8, 2015 at 2:51 PM, Wang Haikun haikun.w...@freescale.com
On 07/12/2015 01:30 AM, Alexander Stein wrote:
On Friday 10 July 2015, 23:24:58 wrote Stephen Warren:
On 07/04/2015 03:48 AM, Alexander Stein wrote:
Now that mailbox driver supports cache flush and invalidation, we can
enable dcache.
Did you also test that HDMI output doesn't show any issues
On 07/12/2015 01:26 AM, Alexander Stein wrote:
On Friday 10 July 2015, 23:21:32 wrote Stephen Warren:
On 07/04/2015 03:48 AM, Alexander Stein wrote:
The code is copied 1:1 from arm1136 which uses the same cp15 registers.
Same comment here. Perhaps create a cache-armv6.c (or whatever name is
Hello David,
Am 13.07.2015 um 19:59 schrieb David Cemin:
Hi
Thank you for the prompt reply.
So theoretically on the main trunk it should work.
Would you be able to tell me if it is merged to this line:
https://github.com/altera-opensource/u-boot-socfpga
As I can see, this is not yet merged
On 07/12/2015 02:10 AM, Alexander Stein wrote:
On Friday 10 July 2015, 23:17:58 wrote Stephen Warren:
On 07/04/2015 03:48 AM, Alexander Stein wrote:
This patchset enables dcache support for Raspberry Pi 1.
First the cache support code was made similar to existing arm1136 code.
The invalidate
Hi Simon,
On 10/07/15 04:52, Simon Glass wrote:
Hi Andre,
On 7 July 2015 at 19:22, Andre Wolokita andre.wolok...@analog.com wrote:
Hi Simon,
Hopefully you're the right person to be contacting about this; if not,
please point me in the right direction.
We've recently had a contractor
On 07/11/2015 12:16 AM, Eric Anholt wrote:
Stephen Warren swar...@wwwdotorg.org writes:
...
Eric, did you find out any more details on the SMP pen mechanism
since I last asked you about it?
Oh, I thought we were settled on this back in May -- the CPUs are
spinning in the low 8kb. They
Hi Simon,
2015-07-09 23:15 GMT+09:00 Simon Glass s...@chromium.org:
With driver model drivers can have things stored in several places. There is
driver-private data, then the uclass can attach things to a device. If the
device is on a bus then its bus may attach parent data to the device
Hi,
On 07/11/2015 08:04 AM, Hans de Goede wrote:
Hi,
On 10-07-15 17:31, Bin Liu wrote:
Hi,
On 07/10/2015 10:12 AM, Heiko Schocher wrote:
Hello Samuel,
Am 10.07.2015 um 16:50 schrieb Egli, Samuel:
Hi Hans,
-Original Message- From: Hans de Goede
[mailto:hdego...@redhat.com] Sent:
Hello.
Im trying to compile U-Boot for a RK3168 cpu with make rk30xx, but when
flashing the resulting binary (RK3066Loader_miniall.bin) I receive a wrong
chip error and cannot flash the new bootloader.
Im guessing that the rk30xx config is not compatible with this cpu?
I have also tried
Hello Masahiro,
On Mon, 13 Jul 2015 20:42:15 +0900, Masahiro Yamada
yamada.masah...@socionext.com wrote:
2015-07-13 19:55 GMT+09:00 Albert ARIBAUD albert.u.b...@aribaud.net:
Hello Masahiro,
On Mon, 13 Jul 2015 16:39:45 +0900, Masahiro Yamada
yamada.masah...@socionext.com wrote:
Hi
Entering the maximum number of characters defined by CONFIG_SYS_CBSIZE into
the console and hitting enter afterwards, causes a hang in the system because
CONFIG_SYS_PBSIZE is not capable of storing the extra characters of the error
message:
Unknown command '' - try 'help'.
Use the default
There is no need to use multiple lines when they fit into a single line.
Signed-off-by: Otavio Salvador ota...@ossystems.com.br
---
Changes in v2: None
board/congatec/cgtqmx6eval/cgtqmx6eval.c | 6 ++
1 file changed, 2 insertions(+), 4 deletions(-)
diff --git
cgtqmx6eval has an eMMC connected to ESDHC3.
Add support for it.
Signed-off-by: Otavio Salvador ota...@ossystems.com.br
---
Changes in v2:
- Use ARRAY_SIZE(usdhc_cfg)
- Remove CONFIG_SYS_FSL_USDHC_NUM definition
board/congatec/cgtqmx6eval/cgtqmx6eval.c | 22 +-
1 file
Perfoming an OR operation on the error is not a good approach.
Return the error immediately for each ESDHC instance instead.
Signed-off-by: Otavio Salvador ota...@ossystems.com.br
---
Changes in v2:
- use ARRAY_SIZE(usdhc_cfg) (Marek)
board/congatec/cgtqmx6eval/cgtqmx6eval.c | 10 +++---
Declare 'static' when possible.
Signed-off-by: Otavio Salvador ota...@ossystems.com.br
---
Changes in v2: None
board/congatec/cgtqmx6eval/cgtqmx6eval.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/board/congatec/cgtqmx6eval/cgtqmx6eval.c
Use more standard boot scripts and also add the capability of
booting via NFS.
Signed-off-by: Otavio Salvador ota...@ossystems.com.br
---
Changes in v2: None
include/configs/cgtqmx6eval.h | 94 ++-
1 file changed, 66 insertions(+), 28 deletions(-)
diff
cgtqmx6eval has a PFUZE100 FSL PMIC connected to I2C2.
Add support for it.
Signed-off-by: Otavio Salvador ota...@ossystems.com.br
---
Changes in v2:
- Rework indent-level for code (Marek)
board/congatec/cgtqmx6eval/cgtqmx6eval.c | 85
Add board_mmc_getwp() for reading the ESDHC write-protect pin.
Signed-off-by: Otavio Salvador ota...@ossystems.com.br
---
Changes in v2: None
board/congatec/cgtqmx6eval/cgtqmx6eval.c | 19 +++
1 file changed, 19 insertions(+)
diff --git
cgtqmx6eval can be populated with a AR8035 or KSZ9031 depending on the
board revision.
Add Ethernet support.
Signed-off-by: Otavio Salvador ota...@ossystems.com.br
---
Changes in v2: None
board/congatec/cgtqmx6eval/cgtqmx6eval.c | 205 +++
Add LVDS and HDMI support.
Signed-off-by: Otavio Salvador ota...@ossystems.com.br
---
Changes in v2:
- Rework code to use setbits_le32 (Marek)
board/congatec/cgtqmx6eval/cgtqmx6eval.c | 173 +++
include/configs/cgtqmx6eval.h| 20
2 files changed,
Add USB support.
Signed-off-by: Otavio Salvador ota...@ossystems.com.br
---
Changes in v2:
- Use plan gpio API call (Marek)
board/congatec/cgtqmx6eval/cgtqmx6eval.c | 44
include/configs/cgtqmx6eval.h| 15 +++
2 files changed, 59
Add SATA support.
Signed-off-by: Otavio Salvador ota...@ossystems.com.br
---
Changes in v2: None
include/configs/cgtqmx6eval.h | 9 +
1 file changed, 9 insertions(+)
diff --git a/include/configs/cgtqmx6eval.h b/include/configs/cgtqmx6eval.h
index 5c72d34..d4b1538 100644
---
Add SPI NOR support:
= sf probe
SF: Detected SST25VF032B with page size 256 Bytes, erase size 4 KiB, total 4 MiB
Signed-off-by: Otavio Salvador ota...@ossystems.com.br
---
Changes in v2: None
board/congatec/cgtqmx6eval/cgtqmx6eval.c | 23 +++
include/configs/cgtqmx6eval.h
Add thermal support so that we can see the following message on boot:
CPU: Industrial temperature grade (-40C to 105C) at 33C
Signed-off-by: Otavio Salvador ota...@ossystems.com.br
---
Changes in v2: None
configs/cgtqmx6qeval_defconfig | 3 +++
include/configs/cgtqmx6eval.h | 8
2
Hi Albert, Hi Stefano,
On 10.07.2015 10:09, Stefano Babic wrote:
Hi Albert, Stefan,
On 19/06/2015 19:33, Albert ARIBAUD wrote:
I could probably factor back out the JEDEC settings, but there are
still differences in the lists of registers to write between the
existing vf610twr/colibri_vf
Remove the custom prompt and use the default instead.
Signed-off-by: Otavio Salvador ota...@ossystems.com.br
---
Changes in v2: None
include/configs/cgtqmx6eval.h | 3 ---
1 file changed, 3 deletions(-)
diff --git a/include/configs/cgtqmx6eval.h b/include/configs/cgtqmx6eval.h
index
On Mon, Jul 13, 2015 at 12:51 PM, Marek Vasut ma...@denx.de wrote:
On Monday, July 13, 2015 at 05:23:18 PM, Otavio Salvador wrote:
Use more standard boot scripts and also add the capability of
booting via NFS.
Signed-off-by: Otavio Salvador ota...@ossystems.com.br
Why don't you switch to
On Mon, Jul 13, 2015 at 1:13 PM, Marek Vasut ma...@denx.de wrote:
On Monday, July 13, 2015 at 06:11:11 PM, Otavio Salvador wrote:
On Mon, Jul 13, 2015 at 12:51 PM, Marek Vasut ma...@denx.de wrote:
On Monday, July 13, 2015 at 05:23:18 PM, Otavio Salvador wrote:
Use more standard boot scripts
On Monday, July 13, 2015 at 05:23:14 PM, Otavio Salvador wrote:
cgtqmx6eval has a PFUZE100 FSL PMIC connected to I2C2.
Add support for it.
Signed-off-by: Otavio Salvador ota...@ossystems.com.br
---
[..]
+/* setup board specific PMIC */
+int power_init_board(void)
+{
+ struct pmic
Hi
Thank you for the prompt reply.
So theoretically on the main trunk it should work.
Would you be able to tell me if it is merged to this line:
https://github.com/altera-opensource/u-boot-socfpga
thanks!
On Mon, Jul 13, 2015 at 12:23 AM, Heiko Schocher h...@denx.de wrote:
Hello David,
Am
Add USB support.
Signed-off-by: Otavio Salvador ota...@ossystems.com.br
---
board/congatec/cgtqmx6eval/cgtqmx6eval.c | 47
include/configs/cgtqmx6eval.h| 15 ++
2 files changed, 62 insertions(+)
diff --git
Add board_mmc_getwp() for reading the ESDHC write-protect pin.
Signed-off-by: Otavio Salvador ota...@ossystems.com.br
---
board/congatec/cgtqmx6eval/cgtqmx6eval.c | 19 +++
1 file changed, 19 insertions(+)
diff --git a/board/congatec/cgtqmx6eval/cgtqmx6eval.c
Add SPI NOR support:
= sf probe
SF: Detected SST25VF032B with page size 256 Bytes, erase size 4 KiB, total 4 MiB
Signed-off-by: Otavio Salvador ota...@ossystems.com.br
---
board/congatec/cgtqmx6eval/cgtqmx6eval.c | 23 +++
include/configs/cgtqmx6eval.h| 10
Add SATA support.
Signed-off-by: Otavio Salvador ota...@ossystems.com.br
---
include/configs/cgtqmx6eval.h | 9 +
1 file changed, 9 insertions(+)
diff --git a/include/configs/cgtqmx6eval.h b/include/configs/cgtqmx6eval.h
index 0a778a7..d1e4483 100644
--- a/include/configs/cgtqmx6eval.h
cgtqmx6eval has a PFUZE100 FSL PMIC connected to I2C2.
Add support for it.
Signed-off-by: Otavio Salvador ota...@ossystems.com.br
---
board/congatec/cgtqmx6eval/cgtqmx6eval.c | 83
include/configs/cgtqmx6eval.h| 13 +
2 files changed, 96
On Monday, July 13, 2015 at 05:23:07 PM, Otavio Salvador wrote:
Perfoming an OR operation on the error is not a good approach.
Return the error immediately for each ESDHC instance instead.
Signed-off-by: Otavio Salvador ota...@ossystems.com.br
---
Add LVDS and HDMI support.
Signed-off-by: Otavio Salvador ota...@ossystems.com.br
---
board/congatec/cgtqmx6eval/cgtqmx6eval.c | 181 +++
include/configs/cgtqmx6eval.h| 20
2 files changed, 201 insertions(+)
diff --git
Use more standard boot scripts and also add the capability of
booting via NFS.
Signed-off-by: Otavio Salvador ota...@ossystems.com.br
---
include/configs/cgtqmx6eval.h | 94 ++-
1 file changed, 66 insertions(+), 28 deletions(-)
diff --git
On Monday, July 13, 2015 at 05:23:16 PM, Otavio Salvador wrote:
Add LVDS and HDMI support.
Signed-off-by: Otavio Salvador ota...@ossystems.com.br
[...]
+static void setup_display(void)
+{
+ struct mxc_ccm_reg *mxc_ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR;
+ struct iomuxc *iomux
On Monday, July 13, 2015 at 05:23:18 PM, Otavio Salvador wrote:
Use more standard boot scripts and also add the capability of
booting via NFS.
Signed-off-by: Otavio Salvador ota...@ossystems.com.br
Why don't you switch to distro-bootcmd ?
Best regards,
Marek Vasut
There is no need to use multiple lines when they fit into a single line.
Signed-off-by: Otavio Salvador ota...@ossystems.com.br
---
board/congatec/cgtqmx6eval/cgtqmx6eval.c | 6 ++
1 file changed, 2 insertions(+), 4 deletions(-)
diff --git a/board/congatec/cgtqmx6eval/cgtqmx6eval.c
cgtqmx6eval has an eMMC connected to ESDHC3.
Add support for it.
Signed-off-by: Otavio Salvador ota...@ossystems.com.br
---
board/congatec/cgtqmx6eval/cgtqmx6eval.c | 24 ++--
include/configs/cgtqmx6eval.h| 1 +
2 files changed, 23 insertions(+), 2 deletions(-)
Remove the custom prompt and use the default instead.
Signed-off-by: Otavio Salvador ota...@ossystems.com.br
---
include/configs/cgtqmx6eval.h | 3 ---
1 file changed, 3 deletions(-)
diff --git a/include/configs/cgtqmx6eval.h b/include/configs/cgtqmx6eval.h
index dd06c05..5f753e7 100644
---
Declare 'static' when possible.
Signed-off-by: Otavio Salvador ota...@ossystems.com.br
---
board/congatec/cgtqmx6eval/cgtqmx6eval.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/board/congatec/cgtqmx6eval/cgtqmx6eval.c
b/board/congatec/cgtqmx6eval/cgtqmx6eval.c
From: Guillaume GARDET guillaume.gar...@free.fr
This patch uses generic 'load' command instead of 'fatload' for
'loadbootscript', 'loadimage' and 'loadfdt' for mx53loco board.
This allows to use EXT partition instead of FAT, while keeping FAT
compatibility.
Signed-off-by: Guillaume GARDET
Add thermal support so that we can see the following message on boot:
CPU: Industrial temperature grade (-40C to 105C) at 33C
Signed-off-by: Otavio Salvador ota...@ossystems.com.br
---
configs/cgtqmx6qeval_defconfig | 2 ++
include/configs/cgtqmx6eval.h | 8
2 files changed, 10
cgtqmx6eval can be populated with a AR8035 or KSZ9031 depending on the
board revision.
Add Ethernet support.
Signed-off-by: Otavio Salvador ota...@ossystems.com.br
---
board/congatec/cgtqmx6eval/cgtqmx6eval.c | 205 +++
include/configs/cgtqmx6eval.h| 14
Entering the maximum number of characters defined by CONFIG_SYS_CBSIZE into
the console and hitting enter afterwards, causes a hang in the system because
CONFIG_SYS_PBSIZE is not capable of storing the extra characters of the error
message:
Unknown command '' - try 'help'.
Use the default
Perfoming an OR operation on the error is not a good approach.
Return the error immediately for each ESDHC instance instead.
Signed-off-by: Otavio Salvador ota...@ossystems.com.br
---
board/congatec/cgtqmx6eval/cgtqmx6eval.c | 10 +++---
1 file changed, 7 insertions(+), 3 deletions(-)
Hi,
On 13 July 2015 at 13:01, Otavio Salvador ota...@ossystems.com.br wrote:
Add thermal support so that we can see the following message on boot:
CPU: Industrial temperature grade (-40C to 105C) at 33C
Signed-off-by: Otavio Salvador ota...@ossystems.com.br
---
Changes in v2: None
Am 13.07.2015 um 00:10 schrieb Ulrich Prinz:
Hi Simon,
had to fixup my list account...
Am 09.07.2015 um 20:10 schrieb Simon Glass:
Hi Ulrich,
Don't you mean this?
./firefly/tools/mkimage -T rkimage -d ./firefly/spl/u-boot-dtb.spl.bin
You need to send U-Boot and its device tree. Perhaps
On Mon, Jul 13, 2015 at 8:01 PM, Otavio Salvador
ota...@ossystems.com.br wrote:
Add thermal support so that we can see the following message on boot:
CPU: Industrial temperature grade (-40C to 105C) at 33C
Signed-off-by: Otavio Salvador ota...@ossystems.com.br
---
Changes in v2: None
On Mon, Jul 13, 2015 at 8:01 PM, Otavio Salvador
ota...@ossystems.com.br wrote:
Use more standard boot scripts and also add the capability of
booting via NFS.
It would actually be useful I think if you used the distro defaults
support for booting here
Peter
Signed-off-by: Otavio Salvador
On Sat, Jul 11, 2015 at 3:11 PM, Marcel Ziswiler mar...@ziswiler.com wrote:
On Fri, 2015-07-10 at 08:47 -0700, Tim Harvey wrote:
Marcel,
Could you give an 'acked-by' if you agree with this series? I would
like to see it merged:
https://patchwork.ozlabs.org/patch/473997/
On Monday, July 13, 2015 at 05:23:15 PM, Otavio Salvador wrote:
Add USB support.
Signed-off-by: Otavio Salvador ota...@ossystems.com.br
---
[...]
+int board_ehci_power(int port, int on)
+{
+ switch (port) {
+ case 0:
+ break;
+ case 1:
+ if (on)
+
On Monday, July 13, 2015 at 06:11:11 PM, Otavio Salvador wrote:
On Mon, Jul 13, 2015 at 12:51 PM, Marek Vasut ma...@denx.de wrote:
On Monday, July 13, 2015 at 05:23:18 PM, Otavio Salvador wrote:
Use more standard boot scripts and also add the capability of
booting via NFS.
On Sun, Jun 28, 2015 at 5:32 PM, Stefano Babic sba...@denx.de wrote:
Hi Peter,
On 28/06/2015 18:23, Soeren Moch wrote:
Stefano,
in the u-boot-imx repository there is already thermal support for
tbs2910. We would need to revert commit
fbd18aa610df896ccebbebb3fb88b197c413 before applying
On 10 July 2015 at 06:46, Simon Glass s...@chromium.org wrote:
On 7 July 2015 at 23:06, Bin Meng bmeng...@gmail.com wrote:
We should not leave the expansion ROM address window open when there
is not a valid ROM.
Suggested-by: Matt Porter mpor...@konsulko.com
Signed-off-by: Bin Meng
Hi Bin,
On 7 July 2015 at 21:00, Bin Meng bmeng...@gmail.com wrote:
Hi Simon,
On Tue, May 19, 2015 at 5:39 AM, Simon Glass s...@chromium.org wrote:
On 15 May 2015 at 19:33, Bin Meng bmeng...@gmail.com wrote:
This driver was originally added to support the native IDE mode for
Intel chipset,
On 10 July 2015 at 06:46, Simon Glass s...@chromium.org wrote:
On 7 July 2015 at 23:06, Bin Meng bmeng...@gmail.com wrote:
Currently PCI expansion ROM address is assigned by a call to
pciauto_setup_rom() outside of the pci auto config process.
This does not work when expansion ROM is on a
On Mon, Jul 06, 2015 at 03:37:14PM +0200, Belisko Marek wrote:
Hi,
I'm using am33x based board with emmc (2 boot partitions, userdata). I
can start u-boot when MLO and u-boot.img are written to user data
partition (raw mode) but I'm unable when stored in boot part 1. I got
fallback to
On Monday, July 13, 2015 at 07:15:44 PM, Otavio Salvador wrote:
On Mon, Jul 13, 2015 at 1:13 PM, Marek Vasut ma...@denx.de wrote:
On Monday, July 13, 2015 at 06:11:11 PM, Otavio Salvador wrote:
On Mon, Jul 13, 2015 at 12:51 PM, Marek Vasut ma...@denx.de wrote:
On Monday, July 13, 2015 at
Hi Simon,
On Mon, Jul 13, 2015 at 6:11 PM, Simon Glass s...@chromium.org wrote:
While you are in there, do you think you could fix the comments in
thermal.h, which are mostly bogus?
Just sent a patch fixing it.
+/* Thermal support */
+#define CONFIG_IMX6_THERMAL
This could move to
From: Fabio Estevam fabio.este...@freescale.com
It seems that many comments were copied from the I2C uclass, so adjust
the comments for the thermal class.
Reported-by: Simon Glass s...@chromium.org
Signed-off-by: Fabio Estevam fabio.este...@freescale.com
---
include/thermal.h | 16
Hello Masahiro,
On Mon, 13 Jul 2015 13:17:03 +0900, Masahiro Yamada
yamada.masah...@socionext.com wrote:
Please refer to the commit message of 06/14
for what this series wants to do.
Remark: you could use Series-notes: in 6/14 to have patman directly
include said notes here instead of
Hi Masahiro,
The macro cpu_relax() is defined by several headers in different
ways.
arch/{arm,avr32,mips}/include/asm/processor.h defines it as follows:
#define cpu_relax() barrier()
On the other hand, include/linux/compat.h defines it as follows:
#define cpu_relax() do {} while (0)
Hi Albert,
2015-07-13 15:51 GMT+09:00 Albert ARIBAUD albert.u.b...@aribaud.net:
Hello Masahiro,
On Mon, 13 Jul 2015 13:17:03 +0900, Masahiro Yamada
yamada.masah...@socionext.com wrote:
Please refer to the commit message of 06/14
for what this series wants to do.
Remark: you could use
Hi Masahiro,
Currently, kzalloc() returns zero-filled memory, while kmalloc()
simply ignores the second argument and never fills the memory
area with zeros.
I want kmalloc(size, __GFP_ZERO) to behave as kzalloc() does,
which will make it easier to add more memory allocator variants.
Hi Masahiro,
It does not seem efficient to always return cache-aligned memory.
Return aligned memory only when GFP_DMA flag is given.
My main motivation for this commit is to refactor device_probe()
and device_free() in the next commit. DM_FLAG_ALLOC_PRIV_DMA
should be handled more
2015-07-13 16:52 GMT+09:00 Lukasz Majewski l.majew...@samsung.com:
Hi Masahiro,
It does not seem efficient to always return cache-aligned memory.
Return aligned memory only when GFP_DMA flag is given.
My main motivation for this commit is to refactor device_probe()
and device_free() in the
This GPIO controller device is used on UniPhier SoCs.
Signed-off-by: Masahiro Yamada yamada.masah...@socionext.com
---
drivers/gpio/Kconfig | 6 ++
drivers/gpio/Makefile| 1 +
drivers/gpio/gpio-uniphier.c | 186 +++
3 files changed,
Masahiro Yamada (4):
gpio: UniPhier: add driver for UniPhier GPIO controller
gpio: do not include asm/arch/gpio.h for UniPhier
ARM: UniPhier: enable UniPhier GPIO driver
ARM: dts: UniPhier: add GPIO controller nodes
arch/arm/Kconfig| 1 +
Add GPIO (generic port) controller nodes for PH1-sLD3, PH1-LD4,
PH1-Pro4 and PH1-sLD8.
Signed-off-by: Masahiro Yamada yamada.masah...@socionext.com
---
arch/arm/dts/uniphier-ph1-ld4.dtsi | 8
arch/arm/dts/uniphier-ph1-pro4.dtsi | 8
arch/arm/dts/uniphier-ph1-sld3.dtsi | 8
Signed-off-by: Masahiro Yamada yamada.masah...@socionext.com
---
arch/arm/Kconfig | 1 +
configs/ph1_ld4_defconfig | 1 +
configs/ph1_pro4_defconfig | 1 +
configs/ph1_sld8_defconfig | 1 +
4 files changed, 4 insertions(+)
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index
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