Move TARGET_xx Kconfig option based on mx6 to arch/arm/cpu/armv7/mx6/Kconfig.
Add enable CONFIG_ARCH_MX6 for boards based on mx6.
Then we can choose target boards using make ARCH=arm menuconfig
with ARCH_MX6 defined.
If using original way, we have no chance to enable ARCH_MX6 when
make
On Friday, August 07, 2015 at 10:26:04 PM, Dinh Nguyen wrote:
On 8/3/15 9:22 AM, Marek Vasut wrote:
Rework this function so it's clear that it is only polling for certain
bits to be cleared. Add kerneldoc. Fix it's return value to be either
0 on success and -ETIMEDOUT on error and propagate
On Monday, August 03, 2015 at 04:22:08 PM, Marek Vasut wrote:
Rework this function so it's clear that it is only polling for certain
bits to be cleared. Add kerneldoc. Fix it's return value to be either
0 on success and -ETIMEDOUT on error and propagate this through the
scan manager code.
The following changes since commit ae27120c31d58b8bb694d9155bcffdcfae8552a6:
Merge git://git.denx.de/u-boot-dm (2015-08-06 19:56:03 -0400)
are available in the git repository at:
git://git.denx.de/u-boot-socfpga.git HEAD
for you to fetch changes up to
When using different release version of Intel FSP, the VPD_IMAGE_REV
is different (ie: BayTrail Gold 3 is 0x0303 while Gold 4 is 0x0304).
Remove the asserting of this so that U-Boot does not hang in a debug
build.
Signed-off-by: Bin Meng bmeng...@gmail.com
---
On 7 August 2015 at 13:20, Simon Glass s...@chromium.org wrote:
On 6 August 2015 at 02:31, Bin Meng bmeng...@gmail.com wrote:
bd-bi_dram[] has both start address and size defined as 32-bit,
which is not the case on some platforms where =4GiB memory bank
is used. Change them to support such
On 7 August 2015 at 13:09, Simon Glass s...@chromium.org wrote:
On 6 August 2015 at 03:36, Bin Meng bmeng...@gmail.com wrote:
The BayTrail SoC has 4 different PCI devices IDs regarding to IDE
and AHCI. Add these IDs in pci_ids.h and also add the other SATA
ID in the Bayley Bay and MinnowMax
On 8 August 2015 at 08:01, Bin Meng bmeng...@gmail.com wrote:
When using different release version of Intel FSP, the VPD_IMAGE_REV
is different (ie: BayTrail Gold 3 is 0x0303 while Gold 4 is 0x0304).
Remove the asserting of this so that U-Boot does not hang in a debug
build.
Signed-off-by:
Add support for using the mipi pll as lcd clock source, this is
necessary for getting higher dotclocks with lcd panels.
Signed-off-by: Hans de Goede hdego...@redhat.com
---
drivers/video/sunxi_display.c | 41 ++---
1 file changed, 34 insertions(+), 7
Hi Ian and Anatolij,
Here is a patch series adding support for eDP panels connected via an
anx9804 bridge chip.
Most of this series touches sunxi only files, except for the commit
adding the anx9804 bridge driver, which is a generic driver which
should hopefully be useful elsewhere too.
Add a helper function to get the pll3 clock rate.
Signed-off-by: Hans de Goede hdego...@redhat.com
---
arch/arm/cpu/armv7/sunxi/clock_sun4i.c| 9 +
arch/arm/cpu/armv7/sunxi/clock_sun6i.c| 12
arch/arm/include/asm/arch-sunxi/clock_sun4i.h | 3 +++
Add support for 4 1.62G lane eDP panels connected via an anx9804 bridge,
such as found on the Colombus devkit.
While at it also fix the wrong indentation of the SSD2828 Kconfig help text
in board/sunxi/Kconfig.
Signed-off-by: Hans de Goede hdego...@redhat.com
---
board/sunxi/Kconfig
Add support for the mipi pll, this is necessary for getting higher dotclocks
with lcd panels.
Signed-off-by: Hans de Goede hdego...@redhat.com
---
arch/arm/cpu/armv7/sunxi/clock_sun6i.c| 55 +++
arch/arm/include/asm/arch-sunxi/clock_sun4i.h | 1 +
Add support for the ANX9804 bridge chip, which can take pixel data coming
from a parallel LCD interface and translate it on the flight into a DP
interface for driving eDP TFT displays. It uses I2C for configuration.
Signed-off-by: Hans de Goede hdego...@redhat.com
---
drivers/video/Kconfig |
These functions allow iteration through all PCI devices including bridges.
The children of each PCI bus are returned in turn. This can be useful for
configuring, checking or enumerating all the devices.
Signed-off-by: Simon Glass s...@chromium.org
---
Changes in v2:
- Add a comment as to why we
This series brings in interrupt support for Minnowmax, so that PCI
interrupts are correctly set up for Linux. It also includes a few small
improvements to FSP support.
Changes in v2:
- Correct 'Driver mode' typo
- Add blank line after dm_pci_read_config() declaration
- Add a comment as to why we
At present there are no PCI functions which allow access to PCI
configuration using a struct udevice. This is a sad situation for driver
model as it makes use of PCI harder. Add these functions.
Signed-off-by: Simon Glass s...@chromium.org
---
Changes in v2:
- Correct 'Driver mode' typo
- Add
This code could use a little tightening up. There is some repetition and
an odd use of fdtdec_get_int_array().
Signed-off-by: Simon Glass s...@chromium.org
---
Changes in v2:
- Fix handling of duplicate entries
arch/x86/cpu/irq.c | 41 +
1 file changed,
We should signal to the FSP that PCI enumeration is complete. Perform this
task in a suitable place.
Signed-off-by: Simon Glass s...@chromium.org
---
Changes in v2:
- Add new patch to tidy up interrupt and FSP init
arch/x86/cpu/baytrail/valleyview.c | 10 +-
1 file changed, 9
Use savedefconfig to get this file into the correct order.
Signed-off-by: Simon Glass s...@chromium.org
---
Changes in v2:
- Rebase to mainline
configs/efi-x86_defconfig | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/configs/efi-x86_defconfig
We should not fiddle with interrupts or the FSP when running as an EFI
payload. Detect this and skip this code.
Signed-off-by: Simon Glass s...@chromium.org
---
Changes in v2:
- Add new patch to support running as an EFI payload
arch/x86/cpu/baytrail/valleyview.c | 2 ++
1 file changed, 2
Set up interrupts correctly so that Linux can use all devices. Use
savedefconfig to regenerate the defconfig file.
Signed-off-by: Simon Glass s...@chromium.org
---
Changes in v2:
- Use pirq_init() instead of custom code
arch/x86/dts/minnowmax.dts | 48
This function can fail. In this case we should return the error rather than
swallowing it.
Signed-off-by: Simon Glass s...@chromium.org
---
Changes in v2:
- Add new patch to allow pirq_init() to return an error
arch/x86/cpu/baytrail/valleyview.c | 4 +---
arch/x86/cpu/irq.c |
This code may be useful for boards that use driver model for PCI.
Note: It would be better to have driver model automatically call this
function somehow. However for now it is probably safer to have it under
board control.
Signed-off-by: Simon Glass s...@chromium.org
---
Changes in v2: None
Hi Tom,
Here is the second sunxi pull-req for v2015.10, highlights:
-SPL nand support
-Composite video out support
-Misc fixes / defconfig improvements
The following changes since commit ae27120c31d58b8bb694d9155bcffdcfae8552a6:
Merge git://git.denx.de/u-boot-dm (2015-08-06 19:56:03 -0400)
Currently the serial code assumes that there is always at least one serial
port (and panics / crashes due to null pointer dereferences when there is
none).
This makes it impossible to use u-boot on boards where there is no (debug)
serial port, because e.g. all uart pins are muxed to another
Hi,
On 7 August 2015 at 06:44, Bin Meng bmeng...@gmail.com wrote:
On Fri, Aug 7, 2015 at 8:36 PM, Andrew Bradford
and...@bradfordembedded.com wrote:
From: Andrew Bradford andrew.bradf...@kodakalaris.com
Allow for configuration of FSP UPD from the device tree which will
override any settings
On Sat, Aug 08, 2015 at 02:24:43PM +0200, Marek Vasut wrote:
The following changes since commit ae27120c31d58b8bb694d9155bcffdcfae8552a6:
Merge git://git.denx.de/u-boot-dm (2015-08-06 19:56:03 -0400)
are available in the git repository at:
git://git.denx.de/u-boot-socfpga.git HEAD
On Sunday, August 09, 2015 at 02:19:56 AM, Tom Rini wrote:
On Sat, Aug 08, 2015 at 02:24:43PM +0200, Marek Vasut wrote:
The following changes since commit ae27120c31d58b8bb694d9155bcffdcfae8552a6:
Merge git://git.denx.de/u-boot-dm (2015-08-06 19:56:03 -0400)
are available in the git
From: Jiandong Zheng jdzh...@broadcom.com
Add support for the iproc NAND, and enable on Cygnus and NSP boards.
Signed-off-by: Jiandong Zheng jdzh...@broadcom.com
Signed-off-by: Steve Rae s...@broadcom.com
---
arch/arm/include/asm/arch-bcmcygnus/configs.h | 11 +
Hi Simon,
On 08/08 10:18, Simon Glass wrote:
Hi,
On 7 August 2015 at 06:44, Bin Meng bmeng...@gmail.com wrote:
On Fri, Aug 7, 2015 at 8:36 PM, Andrew Bradford
and...@bradfordembedded.com wrote:
From: Andrew Bradford andrew.bradf...@kodakalaris.com
Allow for configuration of FSP UPD
Hi Simon,
On Sun, Aug 9, 2015 at 12:18 AM, Simon Glass s...@chromium.org wrote:
Hi,
On 7 August 2015 at 06:44, Bin Meng bmeng...@gmail.com wrote:
On Fri, Aug 7, 2015 at 8:36 PM, Andrew Bradford
and...@bradfordembedded.com wrote:
From: Andrew Bradford andrew.bradf...@kodakalaris.com
Allow
Hi Andrew,
On Sun, Aug 9, 2015 at 9:08 AM, Andrew Bradford
and...@bradfordembedded.com wrote:
Hi Simon,
On 08/08 10:18, Simon Glass wrote:
Hi,
On 7 August 2015 at 06:44, Bin Meng bmeng...@gmail.com wrote:
On Fri, Aug 7, 2015 at 8:36 PM, Andrew Bradford
and...@bradfordembedded.com wrote:
Apped debug server image in error message to make more informative.
Signed-off-by: Prabhakar Kushwaha prabha...@freescale.com
---
drivers/misc/fsl_debug_server.c | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/drivers/misc/fsl_debug_server.c
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