From: York Sun
>On 07/09/2015 08:35 PM, Minghuan Lian wrote:
>> The patch will initialize PCIe controller on EP mode 1. Setup bar:
>>bar0 32bit 4K for specific configuration
>>bar1 32bit 8K for MSIX
>>bar2 64bit 4K for descriptor of memory
>>bar4 64bit 1M for DMA memory test
This
On 08/22/2015 11:04 AM, Hans de Goede wrote:
> Implement the necessary functions for implementing generic fs support
> for ubifs.
> diff --git a/fs/ubifs/ubifs.c b/fs/ubifs/ubifs.c
> +int ubifs_set_blk_dev(block_dev_desc_t *rbdd, disk_partition_t *info)
> +{
> + /* Check that ubifs is
On 08/30/2015 12:26 AM, Peng Fan wrote:
> Hi Stephen,
> On Fri, Aug 28, 2015 at 08:05:36AM +0800, Peng Fan wrote:
>> Hi Stephen,
>> On Thu, Aug 27, 2015 at 10:06:14AM -0600, Stephen Warren wrote:
>>> On 08/27/2015 05:08 AM, Marek Vasut wrote:
On Thursday, August 27, 2015 at 01:00:50 PM, Peng
Hi
On Sep 1, 2015 9:57 PM, "Stephen Warren" wrote:
>
> On 08/22/2015 11:04 AM, Hans de Goede wrote:
> > Implement the necessary functions for implementing generic fs support
> > for ubifs.
>
> > diff --git a/fs/ubifs/ubifs.c b/fs/ubifs/ubifs.c
>
> > +int
Hello Tom!
To be honest, I have no convincing idea on how to move forward with this.
My original intent was to get some GPIO LED support for the sunxi family of
devices, namely my Banana Pi (sun7i/A20).
Following Simon's suggestion, I had a closer look at the new DM-based
From: Simon Guinot
This patch enables generic board support for the following
Kirkwood-based LaCie boards:
- Network Space v2 (Mini, Lite and Max).
- Internet Space v2.
- D2 Network v2.
- 2Big Network v2.
Signed-off-by: Simon Guinot
---
On 09/01/2015 07:41 PM, Michal Simek wrote:
> On 09/01/2015 01:12 AM, Simon Glass wrote:
>> Hi Michal,
>>
>> On 31 August 2015 at 08:11, Michal Simek wrote:
>>> On 08/29/2015 05:10 PM, Simon Glass wrote:
This series updates the Zynq serial driver to use driver model. Along
Le vendredi 28 août 2015 à 10:29 +0200, Andreas Bießmann a écrit :
> The SOURCE_DATE_EPOCH mechanism for reproducible builds require some date(1)
> with -d switch to print the relevant date and time strings of another point of
> time.
>
> In other words it requires some date(1) that behaves like
On 09/01/2015 01:12 AM, Simon Glass wrote:
> Hi Michal,
>
> On 31 August 2015 at 08:11, Michal Simek wrote:
>> On 08/29/2015 05:10 PM, Simon Glass wrote:
>>> This series updates the Zynq serial driver to use driver model. Along the
>>> way several problems are fixed:
>>>
>>> -
Added device-tree-binding information for zynq qspi controller
driver.
Signed-off-by: Jagan Teki
Cc: Simon Glass
Cc: Michal Simek
Cc: Siva Durga Prasad Paladugu
Tested-by: Jagan Teki
---
Enabled zynq qspi controller node for zed board.
Signed-off-by: Jagan Teki
Cc: Simon Glass
Cc: Michal Simek
Cc: Siva Durga Prasad Paladugu
---
arch/arm/dts/zynq-zed.dts | 5 +
1 file changed, 5
Enabled zynq qspi controller node for zc770-xm010 board.
=> sf probe 0 -- bus0 for selecting spi controller
=> sf probe 1 -- bus1 for selecting qspi controller
Signed-off-by: Jagan Teki
Cc: Simon Glass
Cc: Michal Simek
Cc: Siva
This patch adds support for zynq qspi controller driver
on zynq-common.h
Signed-off-by: Jagan Teki
Cc: Simon Glass
Cc: Michal Simek
Cc: Siva Durga Prasad Paladugu
Tested-by: Jagan Teki
---
Enabled SPI flash Bank/Extended address register support.
Bank/Extended address registers are used to access the flash
which has size > 16MiB in 3-byte addressing.
Signed-off-by: Jagan Teki
---
include/configs/zynq-common.h | 1 +
1 file changed, 1 insertion(+)
diff --git
Enable legacy spi-flash interface support for boards which
supports qspi controller with connected spi-nor flash.
Signed-off-by: Jagan Teki
Cc: Simon Glass
Cc: Michal Simek
Cc: Siva Durga Prasad Paladugu
Enabled zynq qspi controller node for zc706 board.
Signed-off-by: Jagan Teki
Cc: Simon Glass
Cc: Michal Simek
Cc: Siva Durga Prasad Paladugu
---
arch/arm/dts/zynq-zc706.dts | 5 +
1 file changed, 5
On Tue, Sep 1, 2015 at 8:55 AM, Simon Glass wrote:
> At present, until a PCI bus is probed, it cannot be found by its sequence
> number unless it has an alias. This is the same with any device.
>
> However with PCI this is more annoying than usual, since bus 0 is always the
>
On Mon, 2015-08-31 at 16:46 +0200, Maxime Ripard wrote:
> When using the fastboot boot command, the image sent to U-Boot will be an
> Android boot image. If the support is missing, that won't obviously work,
> so we need it in our configuration.
Dumb question: Is it possible to boot anything
On Mon, 2015-08-31 at 16:46 +0200, Maxime Ripard wrote:
> When using fastboot and flashing a larger image such as the main partition
> of a system, the current 32MB limit for the buffer is quite small.
(Apart from rooting/rescuing the odd phone I'm completely unfamiliar
with fastboot, so sorry if
On Tue 2015-09-01 00:23:49, Marek Vasut wrote:
> On Monday, August 31, 2015 at 09:57:05 PM, dingu...@opensource.altera.com
> wrote:
> > From: Dinh Nguyen
> >
> > Add support for the Terasic DE0-Nano/Atlas-SoC Kit, which is a CycloneV
> > based board. The board
Hi Peng,
On 01/09/2015 03:40, Peng Fan wrote:
> Since we need to support runtime check for different drivers,
> we need to add get_cpu_rev for vf610.
>
> This patch only introduce a empty implementation to avoid build errors,
> later more stuff can be added if need to check vf610 cpu types.
>
>
On Tue, Sep 01, 2015 at 08:08:58AM +0100, Ian Campbell wrote:
> On Mon, 2015-08-31 at 16:46 +0200, Maxime Ripard wrote:
> > When using the fastboot boot command, the image sent to U-Boot will be an
> > Android boot image. If the support is missing, that won't obviously work,
> > so we need it in
Rename ZYNQ_SPI_CR_BRD_MASK to ZYNQ_SPI_CR_BAUD_MASK
for more readable.
Signed-off-by: Jagan Teki
---
drivers/spi/zynq_spi.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/spi/zynq_spi.c b/drivers/spi/zynq_spi.c
index 817728c..70d7716 100644
Update the numerical values for baudrate and chipselect
with config reg shift named macro's
Signed-off-by: Jagan Teki
---
drivers/spi/zynq_spi.c | 10 +++---
1 file changed, 7 insertions(+), 3 deletions(-)
diff --git a/drivers/spi/zynq_spi.c b/drivers/spi/zynq_spi.c
Add Zynq QSPI controller Kconfig entry.
Signed-off-by: Jagan Teki
Reviewed-by: Simon Glass
Cc: Michal Simek
Cc: Siva Durga Prasad Paladugu
---
drivers/spi/Kconfig | 9 +
1 file changed, 9
Store cs value into private data and use it while activating
chipselect instead of passing through function.
Signed-off-by: Jagan Teki
---
drivers/spi/zynq_spi.c | 8 +---
1 file changed, 5 insertions(+), 3 deletions(-)
diff --git a/drivers/spi/zynq_spi.c
Enable zynq qspi controller driver on respective zynq boards.
Signed-off-by: Jagan Teki
Cc: Simon Glass
Cc: Michal Simek
Cc: Siva Durga Prasad Paladugu
Tested-by: Jagan Teki
---
On Mon, 2015-08-31 at 17:42 +0200, Hans de Goede wrote:
> We know when u-boot is written to its own partition, in this case the
> layout always is:
>
> eb 0 spl
> eb 1 spl-backup
> eb 2 u-boot
> eb 3 u-boot-backup
>
> eb: erase-block
These are all the same size on this particular chip/all known
Hi,
On Mon, Aug 31, 2015 at 05:01:42PM +0200, Hans de Goede wrote:
> On 31-08-15 16:46, Maxime Ripard wrote:
> >When using fastboot and flashing a larger image such as the main partition
> >of a system, the current 32MB limit for the buffer is quite small.
> >
> >Increase it to something that
Hi Peng,
On 01/09/2015 02:32, Peng Fan wrote:
>> Patch is already applied - however, I have found that this break build
>> for vf610 boards (they have not a get_cpu_rev()). You can check with the
>> current u-boot-imx.
>>
>
> Sorry, I checked all i.MXes, but missed vf610.
No problem - we fix
Added zynq qspi controller driver for Xilinx Zynq APSOC,
this driver is driver-model driven with devicetree support.
=> sf probe
SF: Detected S25FL128S_64K with page size 256 Bytes, erase size 64 KiB, total
16 MiB
=> mw.b 0x100 0xCC 0x100
=> sf update 0x100 0x0 0x100
device 0 whole chip
Enabled zynq qspi controller node for zc702 board.
Signed-off-by: Jagan Teki
Cc: Simon Glass
Cc: Michal Simek
Cc: Siva Durga Prasad Paladugu
---
arch/arm/dts/zynq-zc702.dts | 5 +
1 file changed, 5
This patch adds zynq qspi controller nodes in zynq-7000.dtsi.
Signed-off-by: Jagan Teki
Cc: Simon Glass
Cc: Michal Simek
Cc: Siva Durga Prasad Paladugu
Tested-by: Jagan Teki
---
These are the previous version patches-
https://patchwork.ozlabs.org/patch/302945/
https://patchwork.ozlabs.org/patch/264440/
This series adds zynq qspi controller driver in driver model and
enabled support on relevent zynq boards and tested the same.
Branch to verify:
$ git clone
Enabled zynq qspi controller node for microzed board,
verified the same on spansion spi-nor flash.
Signed-off-by: Jagan Teki
Cc: Simon Glass
Cc: Michal Simek
Cc: Siva Durga Prasad Paladugu
Tested-by: Jagan
Hi Stefano,
On Tue, Sep 01, 2015 at 09:28:40AM +0200, Stefano Babic wrote:
>Hi Peng,
>
>On 01/09/2015 03:40, Peng Fan wrote:
>> Since we need to support runtime check for different drivers,
>> we need to add get_cpu_rev for vf610.
>>
>> This patch only introduce a empty implementation to avoid
On Mon, Aug 31, 2015 at 02:17:50PM -0500, Rob Herring wrote:
> On Mon, Aug 31, 2015 at 10:01 AM, Hans de Goede wrote:
> > Hi,
> >
> > On 31-08-15 16:46, Maxime Ripard wrote:
> >>
> >> When using fastboot and flashing a larger image such as the main partition
> >> of a system,
On 01/09/2015 03:06, Peng Fan wrote:
> Hi Stefano,
>
> On Mon, Aug 31, 2015 at 07:05:10PM +0200, Stefano Babic wrote:
>> On 31/08/2015 18:57, Stefano Babic wrote:
>>> On 26/08/2015 09:40, Peng Fan wrote:
There is a hole in shadow registers address map of size 0x100
between bank 5 and
Hi Stefano,
On Tue, Sep 01, 2015 at 09:24:24AM +0200, Stefano Babic wrote:
>On 01/09/2015 03:06, Peng Fan wrote:
>> Hi Stefano,
>>
>> On Mon, Aug 31, 2015 at 07:05:10PM +0200, Stefano Babic wrote:
>>> On 31/08/2015 18:57, Stefano Babic wrote:
On 26/08/2015 09:40, Peng Fan wrote:
> There
On Tue, 01 Sep 2015 08:22:04 +0100
Ian Campbell wrote:
> On Mon, 2015-08-31 at 16:46 +0200, Maxime Ripard wrote:
> > When using fastboot and flashing a larger image such as the main partition
> > of a system, the current 32MB limit for the buffer is quite small.
>
> (Apart
Hi Jagan,
On 31 August 2015 at 23:23, Jagan Teki wrote:
> On 31 August 2015 at 04:25, Simon Glass wrote:
>> Add a SPI driver for the Rockchip RK3288, using driver model. It should work
>> for other Rockchip SoCs also.
>>
>> Signed-off-by: Simon Glass
On 08/24/2015 12:26 PM, Paul Gortmaker wrote:
> Tested on commit 3ea0953d36023d7e50fb00b2e258d8fb2828aeac
> ("dm: Move pre-reloc init earlier to cope with board_early_init_f()")
> since the commit after that ("Set up stdio earlier when using driver
> model") hangs this board at "Net:" init, just
On 06/29/2015 05:09 AM, Priyanka Jain wrote:
> Signed-off-by: Priyanka Jain
> ---
Applied to fsl-qoriq master branch. Awaiting upstream.
York
___
U-Boot mailing list
U-Boot@lists.denx.de
On 06/30/2015 11:28 PM, Bhupesh Sharma wrote:
> This patch adds a minimal framework for Dickens CCN-504
> interconnect configuration - mainly related to adding Clusters/cores
> to snoop/DVM domain and setting QoS of the RN-I ports.
>
> LS2085A platform makes use of these configurations to
On 08/17/2015 10:22 PM, Alison Wang wrote:
> This patch rewrites MMU translation table entries. To start, all table
> entries are written as "invalid", then "device-ngnrnr" and "normal" are
> written to the entries to enable access to specific addresses.
>
> Signed-off-by: Alison Wang
On 08/17/2015 05:55 AM, Zhuoyu Zhang wrote:
> DEVDISRn registers provides a mechanism for gating clocks of IP blocks
> that are not used. Here we implement hwconfig option to allow users
> to disable unused peripherals on the board.
>
> For ex. If eSDHC/qDMA/eDMA are unused and with disabled
2015-09-02 11:48 GMT+09:00 Simon Glass :
>> diff --git a/drivers/pinctrl/uniphier/pinctrl-uniphier.h
>> b/drivers/pinctrl/uniphier/pinctrl-uniphier.h
>> new file mode 100644
>> index 000..db74838
>> --- /dev/null
>> +++ b/drivers/pinctrl/uniphier/pinctrl-uniphier.h
>> @@
On 1 September 2015 at 07:50, Masahiro Yamada
wrote:
> In UniPhier SoCs before ProXstream2 and PH1-LD6b, two address spaces
> 0x - 0x0fff
> 0x4000 - 0x4fff
> are both mapped to the external bus (also called system bus),
> so either was OK.
>
>
On 1 September 2015 at 07:50, Masahiro Yamada
wrote:
> Historically (for compatibility with very old platforms), two
> different types of micro support cards have been used with the
> UniPhier SoC development boards. It has been painful to maintain
> both. Having
+Tom and a few others who may have an opinion.
Hi,
On 1 September 2015 at 10:19, Masahiro Yamada
wrote:
> Hi.
>
>
> 2015-09-02 0:41 GMT+09:00 Michal Simek :
>
>
>> Why not just add one more uboot property to chosen with list of IPs
Hi Scott,
On 30 August 2015 at 14:30, Scott Wood wrote:
> On Sun, 2015-08-30 at 20:28 +, Marcel Ziswiler wrote:
>> On Sat, 2015-08-29 at 14:54 +, Simon Glass wrote:
>> > At present malloc.h is included everywhere since it recently was
>> > added to
>> > common.h
Hi Michal,
On 1 September 2015 at 07:12, Michal Simek wrote:
> Hi Simon,
>
> On 09/01/2015 01:12 AM, Simon Glass wrote:
>> Hi Michal,
>>
>> On 31 August 2015 at 08:07, Michal Simek wrote:
>>> On 08/31/2015 03:54 PM, Simon Glass wrote:
Hi Michal,
On 08/13/2015 12:22 PM, York Sun wrote:
> The emulator with DDR3 model was used during model bringup. DDR4
> controllers are used with ls2085a. Drop the DDR4 target defconfig
> and enable DDR4 in ls2085a_emu_defconfig.
>
> Signed-off-by: York Sun
> ---
>
> Changes in
Hi Bin,
On 1 September 2015 at 04:44, Bin Meng wrote:
> Hi Simon,
>
> I have the following codes to control a gpio pin in my board codes:
>
> void board_assert_perst(void)
> {
> gpio_request(32, "PERST");
> gpio_direction_output(32, 0);
> }
>
> But when I read , I
On Tue, 2015-09-01 at 22:04 -0500, York Sun wrote:
> On 09/01/2015 09:48 PM, Simon Glass wrote:
> > Hi Scott,
> >
> > On 31 August 2015 at 21:16, Scott Wood wrote:
> > > On Mon, 2015-08-31 at 21:13 -0600, Simon Glass wrote:
> > > > Hi Scott,
> > > >
> > > > On 31 August
On 08/22/2015 11:04 AM, Hans de Goede wrote:
> Add generic fs support, so that commands like ls, load and test -e can be
> used on ubifs.
> @@ -530,6 +531,28 @@ int get_device_and_partition(const char *ifname, const
> char *dev_part_str,
> return 0;
> }
>
> +#ifdef
Add a SPI driver for the Rockchip RK3288, using driver model. It should work
for other Rockchip SoCs also.
Signed-off-by: Simon Glass
---
Changes in v6:
- Add clk_get_divisor() instead of open-coding the maths
- Add constants for the timeout and maximum clock speed
- Put
These have not been converted to Generic Board, so should be removed.
(See doc/README.generic-board for details.)
Signed-off-by: Masahiro Yamada
Cc: Dan Malek
---
arch/powerpc/cpu/mpc85xx/Kconfig | 8 -
board/stx/stxgp3/Kconfig
This has not been converted to Generic Board, so should be removed.
(See doc/README.generic-board for details.)
Signed-off-by: Masahiro Yamada
---
arch/powerpc/cpu/mpc5xx/Kconfig | 4 -
board/cmi/Kconfig | 9 -
board/cmi/MAINTAINERS |
This has not been converted to Generic Board, so should be removed.
(See doc/README.generic-board for details.)
Signed-off-by: Masahiro Yamada
---
arch/powerpc/cpu/ppc4xx/Kconfig | 4 -
board/sbc405/Kconfig| 9 -
board/sbc405/MAINTAINERS|
This has not been converted to Generic Board, so should be removed.
(See doc/README.generic-board for details.)
Signed-off-by: Masahiro Yamada
Cc: Stefan Roese
---
arch/powerpc/cpu/ppc4xx/Kconfig | 4 -
arch/powerpc/cpu/ppc4xx/start.S | 15 --
This has not been converted to Generic Board, so should be removed.
(See doc/README.generic-board for details.)
Signed-off-by: Masahiro Yamada
Cc: Stefan Roese
---
arch/powerpc/cpu/ppc4xx/Kconfig | 4 -
board/prodrive/p3p440/Kconfig | 12
On Tue, 2015-09-01 at 20:48 -0600, Simon Glass wrote:
> Hi Scott,
>
> On 31 August 2015 at 21:16, Scott Wood wrote:
> > On Mon, 2015-08-31 at 21:13 -0600, Simon Glass wrote:
> > > Hi Scott,
> > >
> > > On 31 August 2015 at 20:11, Scott Wood
Hi Scott,
On 1 September 2015 at 21:00, Scott Wood wrote:
> On Tue, 2015-09-01 at 20:48 -0600, Simon Glass wrote:
>> Hi Scott,
>>
>> On 31 August 2015 at 21:16, Scott Wood wrote:
>> > On Mon, 2015-08-31 at 21:13 -0600, Simon Glass wrote:
>> > >
This has not been converted to Generic Board, so should be removed.
(See doc/README.generic-board for details.)
Remove CONFIG_LWMON5 references.
(Also, remove undefined CONFIG_WD_MAX_RATE while I am here.)
Signed-off-by: Masahiro Yamada
Cc: Stefan Roese
I sent the RFC version two weeks ago
to announce the final call for PowerPC unmaintained boards.
Some were converted to Generic Board, and some were not.
This series really intends to delete
non-generic PowerPC boards.
I added entries to doc/README.scrapyard in this version.
Changes in v2:
-
This has not been converted to Generic Board, so should be removed.
(See doc/README.generic-board for details.)
Signed-off-by: Masahiro Yamada
Cc: Stefan Roese
---
arch/powerpc/cpu/ppc4xx/Kconfig | 4 -
board/pcs440ep/Kconfig | 9 -
This has not been converted to Generic Board, so should be removed.
(See doc/README.generic-board for details.)
Signed-off-by: Masahiro Yamada
Cc: Stefan Roese
---
arch/powerpc/cpu/ppc4xx/Kconfig | 4 -
board/prodrive/alpr/Kconfig | 12 --
These have not been converted to Generic Board, so should be removed.
(See doc/README.generic-board for details.)
Signed-off-by: Masahiro Yamada
Cc: Tolunay Orkun
---
arch/powerpc/cpu/ppc4xx/Kconfig | 8 --
board/csb272/Kconfig|
On 1 September 2015 at 04:22, Josh Wu wrote:
> As we don't modify the 'name' parameter, so change it to const.
>
> Signed-off-by: Josh Wu
> ---
>
> include/net.h | 4 ++--
> net/eth.c | 4 ++--
> 2 files changed, 4 insertions(+), 4 deletions(-)
Reviewed-by:
On 08/07/2015 07:31 AM, Prabhakar Kushwaha wrote:
> The X-QSGMII-16PORT is a 4xQSGMII/8xSGMII riser card with eighth SerDes
> interfaces implemented in PCIe form factor board.
> It supports followings
> - Card can operate with up to 4 QSGMII lane simultaneously
> - Card can operate with up to
On 08/07/2015 07:31 AM, Prabhakar Kushwaha wrote:
> Add support of VSC8584 phy placed on new QSGMII/SGMII ethernet riser cards
> used on LS2085QDS platforms.
>
> Signed-off-by: King Chung l...@freescale.com
> Signed-off-by: Prabhakar Kushwaha
On 08/07/2015 07:31 AM, Prabhakar Kushwaha wrote:
> Every QSGMII SerDes Protocol usage 4 MACs.
>
> So add/repeat QSGMII information for 4 MACs in dpmac_info strucuture.
>
> Signed-off-by: King Chung l...@freescale.com
> Signed-off-by: Prabhakar Kushwaha
On 08/01/2015 10:41 PM, Prabhakar Kushwaha wrote:
> LS2085 targets supports following UART console
> LS2085AQDS UART0
> LS2085ARDB UART1
> LS2085ASim UART0
> LS2085AEmu UART0
>
> So update the bootargs as per the default console present at the target
>
> Signed-off-by: Prabhakar
On 07/31/2015 03:40 AM, Aneesh Bansal wrote:
> ISBC Key Extension feature is not applicable for RAMBOOT
> as there is no way to retrieve the CSF Header and validated
> IE Key table from SRAM once CPC has been disabled.
> The feature is only applicable in case of NOR SECURE BOOT.
> Code Cleanup:
On 08/07/2015 07:31 AM, Prabhakar Kushwaha wrote:
> Update 0x33 and 0x35 serdes protocol as per updated SoC document
> in array serdes1_cfg_tbl.
>
> Signed-off-by: Prabhakar Kushwaha
> ---
Applied to fsl-qoriq master branch. Awaiting upstream.
York
On 08/06/2015 11:54 PM, Prabhakar Kushwaha wrote:
> Enable CONFIG_CMD_GREPENV to allow search in env variables
>
> Signed-off-by: Prabhakar Kushwaha
> ---
Applied to fsl-qoriq master branch. Awaiting upstream.
York
___
On 07/24/2015 04:37 AM, Yangbo Lu wrote:
> Signed-off-by: Yangbo Lu
> ---
Applied to fsl-qoriq master branch. Awaiting upstream.
York
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot
On 07/28/2015 01:33 PM, Varun Sethi wrote:
> Setup mmu-masters property for the PCIe controllers. This would be
> used by the Linux SMMU driver, while setting up stream ID table mappings
> for the PCIe devices.
>
> Signed-off-by: Varun Sethi
> ---
Applied to
On 09/01/2015 09:48 PM, Simon Glass wrote:
> Hi Scott,
>
> On 31 August 2015 at 21:16, Scott Wood wrote:
>> On Mon, 2015-08-31 at 21:13 -0600, Simon Glass wrote:
>>> Hi Scott,
>>>
>>> On 31 August 2015 at 20:11, Scott Wood wrote:
Hi Simon,
On Wed, Sep 2, 2015 at 10:48 AM, Simon Glass wrote:
> Hi Bin,
>
> On 1 September 2015 at 04:44, Bin Meng wrote:
>> Hi Simon,
>>
>> I have the following codes to control a gpio pin in my board codes:
>>
>> void board_assert_perst(void)
>> {
>>
On Tue, 2015-09-01 at 17:41 -0500, dingu...@opensource.altera.com wrote:
> From: Dinh Nguyen
>
> Add support for the Terasic DE0-Nano/Atlas-SoC Kit, which is a CycloneV
> based board. The board can boot from SD/MMC. Ethernet is also supported.
>
> Signed-off-by:
On 06/29/2015 05:09 AM, Priyanka Jain wrote:
> RTC devices can generate 32KHz output if for
> -DS3232 device, EN32KHz bit and BB32KHz bit are set
> -DS3231 device, EN32KHz bit is set, BB32KHz bit is don't care
>
> Patch adds rtc_enable_32khz_output() which when called
> will enable 32KHz output
On 1 September 2015 at 07:50, Masahiro Yamada
wrote:
> Add "u-boot,dm-pre-reloc" for device nodes we want in SPL DTB
> (spl/u-boot-spl.dtb).
>
> The "soc" node (this is simple-bus node) also needs the property
> to bind the pinctrl node located under it.
>
> I am
Hi Bin,
On 1 September 2015 at 04:29, Bin Meng wrote:
> Hi Simon,
>
> On Tue, Sep 1, 2015 at 11:22 AM, Bin Meng wrote:
>> Hi Simon,
>>
>> On Tue, Sep 1, 2015 at 11:12 AM, Simon Glass wrote:
>>> Hi Bin,
>>>
>>> On 31 August 2015 at
Hi Masahiro,
On 1 September 2015 at 07:50, Masahiro Yamada
wrote:
> The core support for the pinctrl drivers for all the UniPhier SoCs.
>
> Signed-off-by: Masahiro Yamada
> ---
>
> drivers/pinctrl/Kconfig |
On 25 August 2015 at 21:52, Simon Glass wrote:
> At present buildman can compare configurations between commits but the
> feature is less useful than it could be. There is no summary by architecture
> and changes are not reported on a per-board basis.
>
> Correct these
On 1 September 2015 at 00:25, Bin Meng wrote:
> On Tue, Sep 1, 2015 at 8:55 AM, Simon Glass wrote:
>> At present, until a PCI bus is probed, it cannot be found by its sequence
>> number unless it has an alias. This is the same with any device.
>>
>> However
On 08/12/2015 05:29 AM, Claudiu Manoil wrote:
> Replace the DMACTRL[LE] hack with recommended settings
> for ETSECDMAMCR to get the same end effect - obtaining
> big-endian buffer descriptors and frame data for eTSEC.
> The reset / default value for ETSECDMAMCR is preserved,
> excepting the BD
Hi Scott,
On 31 August 2015 at 21:16, Scott Wood wrote:
> On Mon, 2015-08-31 at 21:13 -0600, Simon Glass wrote:
>> Hi Scott,
>>
>> On 31 August 2015 at 20:11, Scott Wood wrote:
>> > Currently, using fdt_fixup_stdout() on a device tree that is
On 08/10/2015 09:33 AM, Prabhakar Kushwaha wrote:
> Append "debug server FW" in error message to make more informative.
>
> Signed-off-by: Prabhakar Kushwaha
> Reviewed-by: Bhupesh Sharma
> ---
> Changes for v2: Incorporated Bhupesh's
+Stephen FYI
On 1 September 2015 at 07:50, Masahiro Yamada
wrote:
> As the UniPhier serial driver had already switched to Drive Model
> and the pinctrl drivers are now enabled, these pin-muxing settings
> are handled by the pinctrl drivers.
>
> Signed-off-by:
Tom,
The following changes since commit b7e84c93c450480ca4ff51ad2eb56bd83c1dc368:
Merge branch 'master' of http://git.denx.de/u-boot-sunxi (2015-08-31 12:12:27
-0400)
are available in the git repository at:
git://git.denx.de/u-boot-fsl-qoriq.git master
for you to fetch changes up to
On Tue, 2015-09-01 at 21:10 -0600, Simon Glass wrote:
> Hi Scott,
>
> On 1 September 2015 at 21:00, Scott Wood wrote:
> > On Tue, 2015-09-01 at 20:48 -0600, Simon Glass wrote:
> > > Hi Scott,
> > >
> > > On 31 August 2015 at 21:16, Scott Wood
Running mxsboot on a big-endian system produces a sd image which
cannot be started by the i.MX28 ROM. It complains on the debug
uart as following:
0x8020a009
0x80502008
0x8020a009
0x80502008
...
Enforcing all fields within the BCB to little-endian make
the image bootable
On Tue, Sep 1, 2015 at 10:36 AM, Marek Vasut wrote:
> On Tuesday, September 01, 2015 at 05:12:40 PM, Dinh Nguyen wrote:
>> On 09/01/2015 03:33 AM, Marek Vasut wrote:
>> > On Tuesday, September 01, 2015 at 09:38:23 AM, Pavel Machek wrote:
>> >> On Tue 2015-09-01 00:23:49, Marek
From: Dinh Nguyen
Add support for the Terasic DE0-Nano/Atlas-SoC Kit, which is a CycloneV
based board. The board can boot from SD/MMC. Ethernet is also supported.
Signed-off-by: Dinh Nguyen
---
v2: add ethernet support
moved
On 08/22/2015 11:04 AM, Hans de Goede wrote:
> From: Roy Spliet
>
> Under the assumptions of having a UBI volume called boot, containing
> a ubifs filesystem.
>
> Signed-off-by: Hans de Goede
I'd expect the person in the "From:" line above to have
On Mon, 31 Aug 2015 17:01:42 +0200
Hans de Goede wrote:
> Hi,
>
> On 31-08-15 16:46, Maxime Ripard wrote:
> > When using fastboot and flashing a larger image such as the main partition
> > of a system, the current 32MB limit for the buffer is quite small.
> >
> > Increase
Hi,friends,
I am studing uboot,but I found a issue that ubi can not be wrote,
Who do help me to implement the writable ubi fs?
Thanks!
cflu
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot
1 - 100 of 249 matches
Mail list logo