Implement a cfi flash uclass to work with drivers/mtd/cfi-flash.c.
The flash base address is extracted from device tree, and passed
to cfi_flash_bank_addr().
The current code supports only one bank. It should be extended to
support multiple banks by decoding multiple "reg" tuples, eg,
reg
+Simon,
Hi Thomas,
On Sun, Oct 11, 2015 at 3:30 PM, Thomas Chou wrote:
> Implement a cfi flash uclass to work with drivers/mtd/cfi-flash.c.
> The flash base address is extracted from device tree, and passed
> to cfi_flash_bank_addr().
>
> The current code supports only one
On Fri, 2015-10-09 at 18:15 +0200, Hans de Goede wrote:
> Add a bootcmd_old value to the default environment when building with
> CONFIG_OLD_SUNXI_KERNEL_COMPAT, this way people who occasionally want
> to boot an old kernel can do so by simply typing "run bootcmd_old"
> rather then needing to have
Add a bootcmd_sunxi_compat value to the default environment when building
with CONFIG_OLD_SUNXI_KERNEL_COMPAT, this way people who occasionally want
to boot an old kernel can do so by simply typing "run bootcmd_sunxi_compat"
rather then needing to have 2 separate setups / sdcards for old and
new
Hi,
On 10-10-15 16:13, Chen-Yu Tsai wrote:
On Sat, Oct 3, 2015 at 10:26 PM, Hans de Goede wrote:
Change the axp223 dcdc2 / VDD-SYS default from 1.2V to 1.1V, 1.1V is the
value recommended by Allwinner and is what most fex files specify.
This has been tested on a number
Hi Bin,
On 10/11/2015 01:41 PM, Bin Meng wrote:
You can check fdtdec_get_pci_addr() to see how multiple "reg" tuples
are decoded.
I see. So I will need to decode the cells.
cell = fdt_getprop(blob, node, prop_name, );
Thanks a lot for your help.
Best regards,
Thomas
On Sat, 2015-10-10 at 14:24 +0200, Hans de Goede wrote:
> [...]
> + Select this to enable support for the axp152 pmic found on
most
> + A10s boards.
> [...]
> + Select this to enable support for the axp209 pmic found on most
> + A10, A13 and A20 boards.
> [...]
> + Select this
On Sat, 2015-10-03 at 16:26 +0200, Hans de Goede wrote:
> Stop prefixing the axp functions for setting voltages, etc. with the
> model number, there ever is only one pmic driver built into u-boot,
> this allows simplifying the callers.
>
> Signed-off-by: Hans de Goede
Hi Tom,
Please pull this PR.
thanks!
Jagan.
The following changes since commit 9a4c6e9abf5261f565cfbf1e80c6e17d26ad0b1e:
sunxi: Fix USB regulators in Linksprite_pcDuino_defconfig (2015-10-10
11:54:16 +0200)
are available in the git repository at:
git://git.denx.de/u-boot-spi.git master
Hi,
On 11-10-15 11:12, Ian Campbell wrote:
On Fri, 2015-10-09 at 18:15 +0200, Hans de Goede wrote:
Add a bootcmd_old value to the default environment when building with
CONFIG_OLD_SUNXI_KERNEL_COMPAT, this way people who occasionally want
to boot an old kernel can do so by simply typing "run
On Sun, 2015-10-11 at 12:47 +0200, Hans de Goede wrote:
> Add a bootcmd_sunxi_compat value to the default environment when
> building
> with CONFIG_OLD_SUNXI_KERNEL_COMPAT, this way people who occasionally
> want
> to boot an old kernel can do so by simply typing "run
> bootcmd_sunxi_compat"
>
On 9 October 2015 at 19:25, Michal Simek wrote:
> Hi Tom,
>
> On 10/09/2015 03:54 PM, Tom Rini wrote:
>> On Fri, Oct 09, 2015 at 03:47:59PM +0200, Michal Simek wrote:
>>> Hi Jagan,
>>>
>>> On 09/30/2015 12:23 AM, Michal Simek wrote:
On 09/29/2015 11:13 PM, Jagan Teki
On Sat, 2015-10-10 at 14:40 +0200, Hans de Goede wrote:
> Add support for disabling the regulators found on the axp209 pmic.
>
> Signed-off-by: Hans de Goede
All 3 patches in this series: Acked-by: Ian Campbell
Hi Bin,
On 10/11/2015 03:54 PM, Bin Meng wrote:
+ flash@f000,0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "intel,PC48F4400P0VB", "cfi-flash";
PC48F4400P0VB should be lower cases
Thanks for your review. I will change it
Hi Bin,
On 10/11/2015 03:54 PM, Bin Meng wrote:
By looking at the implementation, is it really necessary to add a new
uclass for cfi-flash, given we only need get the flash base address?
There are no cfi-flash specific ops defined.
Why not just read its base address from device tree?
Yes,
Hi Thomas,
On Sun, Oct 11, 2015 at 4:54 PM, Thomas Chou wrote:
> Hi Bin,
>
> On 10/11/2015 03:54 PM, Bin Meng wrote:
>>
>> By looking at the implementation, is it really necessary to add a new
>> uclass for cfi-flash, given we only need get the flash base address?
>> There
Hi,
On 11-10-15 11:04, Ian Campbell wrote:
On Sat, 2015-10-10 at 14:24 +0200, Hans de Goede wrote:
[...]
+ Select this to enable support for the axp152 pmic found on
most
+ A10s boards.
[...]
+ Select this to enable support for the axp209 pmic found on most
+ A10, A13
We have the protocol and subclass variables which are used only in
disabled debug code. This code dates back to the initial git import and
seemingly dead code so remove it.
This was detected by Coverity (CID 131117)
Signed-off-by: Tom Rini
---
common/usb_storage.c | 29
On Mon, Oct 05, 2015 at 02:23:40PM -0500, Rob Herring wrote:
> On Tue, Sep 1, 2015 at 8:50 AM, Paul Kocialkowski wrote:
> > Le jeudi 27 août 2015 à 15:42 -0400, Tom Rini a écrit :
> >> In 2dd4632 the check for where a ramdisk is found on an Android image
> >> was got moved into
Hi Tom,
On Sun, Oct 11, 2015 at 7:26 PM, Tom Rini wrote:
> We have the protocol and subclass variables which are used only in
> disabled debug code. This code dates back to the initial git import and
> seemingly dead code so remove it.
>
> This was detected by Coverity (CID
Hi Thomas,
On Sun, Oct 11, 2015 at 8:24 PM, Thomas Chou wrote:
> Hi Bin,
>
> On 10/11/2015 05:10 PM, Bin Meng wrote:
>>
>> It's unlikely we are going to create another instance of cfi-flash
>> driver, isn't it? Then it's just a single driver which does not make
>> cfi-flash
Hi Bin,
On 10/11/2015 08:43 PM, Bin Meng wrote:
The spi-flash is converted to driver model, which is good, as there
are spi flashes from different vendors which have different op codes
thus need different drivers to handle. But for cfi-flash, almost every
cfi-flash we see in the market conforms
On Sun, Oct 11, 2015 at 08:05:11PM +0800, Bin Meng wrote:
> Hi Tom,
>
> On Sun, Oct 11, 2015 at 7:26 PM, Tom Rini wrote:
> > We have the protocol and subclass variables which are used only in
> > disabled debug code. This code dates back to the initial git import and
> >
Hi Bin,
On 10/11/2015 05:10 PM, Bin Meng wrote:
It's unlikely we are going to create another instance of cfi-flash
driver, isn't it? Then it's just a single driver which does not make
cfi-flash a "class". We can just update the cfi-flash driver to read
its flash base address directly from
On Sunday, October 11, 2015 at 02:38:35 AM, Thomas Chou wrote:
> Hi Marek,
Hi,
> On 10/11/2015 02:18 AM, Marek Vasut wrote:
> > Then you'd also need means to allocate variables to aligned memory
> > location to prevent invalid cache flush. (Linux does this with it's DMA
> > API). We are much
On Sunday, October 11, 2015 at 03:48:58 AM, Thomas Chou wrote:
> Hi Marek,
Hi,
> On 10/11/2015 02:19 AM, Marek Vasut wrote:
> > It might be wrong to keep DMA address looks alive but actually dead.
> >
> > I don't quite understand this sentence, can you please rephrase it ?
>
> Sorry. I meant
On Sunday, October 11, 2015 at 05:34:16 AM, Thomas Chou wrote:
> Export fdt_blob to the environment variable. So that we may
> use it to boot Linux.
>
> Signed-off-by: Thomas Chou
> ---
> v2
> move the code to per board, nios2-generic.c.
>
>
On Sunday, October 11, 2015 at 01:26:27 PM, Tom Rini wrote:
> We have the protocol and subclass variables which are used only in
> disabled debug code. This code dates back to the initial git import and
> seemingly dead code so remove it.
>
> This was detected by Coverity (CID 131117)
>
>
On Tue, Sep 29, 2015 at 09:31:32AM +0200, Ludger Dreier wrote:
> The crc-check and decision on which environment to use is now moved to
> env_relocate_spec. This is done for both the "redundant env" and the
> "single env" case.
> This also solves problems introduced from the commit "env_eeprom:
Signed-off-by: Nobuhiro Iwamatsu
---
arch/arm/Kconfig| 2 +-
arch/arm/Makefile | 2 +-
arch/arm/mach-rmobile/Kconfig | 2 +-
arch/arm/mach-rmobile/include/mach/rmobile.h
Add MAINTAINERS entry.
Signed-off-by: Nobuhiro Iwamatsu
---
MAINTAINERS | 6 ++
1 file changed, 6 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index bf60c67..06d3d2f 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -107,6 +107,12 @@ T: git
MTD partitioning in current pcm052 configuration is inconsistent.
Fix it across MTDPARTS_DEFAULT, CONFIG_EXTRA_ENV_SETTINGS, and
CONFIG_ENV_OFFSET[_REDUND].
Signed-off-by: Albert ARIBAUD (3ADEV)
---
include/configs/pcm052.h | 120
Hi,
On 11 October 2015 at 07:29, Thomas Chou wrote:
> Hi Bin,
>
> On 10/11/2015 08:43 PM, Bin Meng wrote:
>>
>> The spi-flash is converted to driver model, which is good, as there
>> are spi flashes from different vendors which have different op codes
>> thus need different
TFTP source and destination port variable names are
'tftpsrcp' and 'tftpdstp' in the code, but 'tftpsrcport'
and 'tftpdstport' in the README file. Fix the README.
Add environment variable 'tftptimeoutcountmax'. As per the
comments about the global variable tftp_timeout_count_max,
make sure
With the changes in 7a3e70c we now get read(2) behavior so trying to
read 2MB with 1MB left in the file results in 1MB read and a warning.
We update the test logic here to make sure we read back 1MB as expected.
This change however changes the overall summary as while EXT4 continues
to not have
On Fri, Oct 09, 2015 at 02:35:24PM +0200, Guillaume Gardet wrote:
>
>
> Le 09/10/2015 14:23, Przemyslaw Marczak a écrit :
> >Hello Guillaume,
> >
> >On 10/09/2015 02:11 PM, Guillaume Gardet wrote:
> >>Hi Przemyslaw,
> >>
> >>I would like to add DTB support for odroid board to be able to boot
>
Hi Simon,
On 10/12/2015 05:47 AM, Simon Glass wrote:
I don't see any problem with this in general, although the point with
CFI is that you are really implementing the uclass, as there will not
going to be any drivers (as I understand it).
Looking at SPI flash, it does have an API (read, write,
Hi Marek,
On 10/11/2015 08:15 PM, Marek Vasut wrote:
On Sunday, October 11, 2015 at 02:38:35 AM, Thomas Chou wrote:
Hi Marek,
Hi,
On 10/11/2015 02:18 AM, Marek Vasut wrote:
Then you'd also need means to allocate variables to aligned memory
location to prevent invalid cache flush. (Linux
Convert dma_alloc_coherent to use memalign.
Signed-off-by: Thomas Chou
---
v2
use memalign.
v3
check memalign() return for out of memory.
v4
use malloc_cache_aligned().
arch/nios2/include/asm/dma-mapping.h | 24 +++-
1 file changed, 11
Remove the call to custom mrc cache APIs, and use the ones
provided in the mrccache lib.
Signed-off-by: Bin Meng
---
arch/x86/cpu/ivybridge/sdram.c | 112 ++---
1 file changed, 4 insertions(+), 108 deletions(-)
diff --git
This adds mrccache_reserve(), mrccache_get_region() and
mrccache_save() APIs to the mrccache codes. They are ported
from the ivybridge implementation, but with some changes.
For example, in the mrccache_reserve(), ivybridge version
only reserves the pure MRC data, which causes additional
malloc()
Fix some nits, improve some comments and reorder some codes
a little bit.
Signed-off-by: Bin Meng
---
arch/x86/include/asm/mrccache.h | 20 ++--
arch/x86/lib/mrccache.c | 14 ++
2 files changed, 16 insertions(+), 18 deletions(-)
diff
Create a Kconfig option for enabling MRC cache.
Signed-off-by: Bin Meng
---
arch/x86/Kconfig | 8
1 file changed, 8 insertions(+)
diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
index bf09b21..f92082d 100644
--- a/arch/x86/Kconfig
+++ b/arch/x86/Kconfig
@@ -239,6
This series moves existing MRC cache codes in the ivybridge cpu
diretory to a common place and makes some changes so that every
x86 board benefits from it. It also updates FSP support codes
to pass MRC cache data to fsp_init() to speed up boot time.
Currently tested on Intel Bayley Bay board.
mrccache implementation can be common for all boards. Move it
from ivybridge cpu directory to the common lib directory.
Signed-off-by: Bin Meng
---
arch/x86/cpu/ivybridge/Makefile | 1 -
arch/x86/cpu/ivybridge/sdram.c | 2 +-
For the cache record to write in mrccache_update(), we should
perform a sanity test to see if it is a valid one.
Signed-off-by: Bin Meng
---
arch/x86/include/asm/mrccache.h | 2 +-
arch/x86/lib/mrccache.c | 3 +++
2 files changed, 4 insertions(+), 1 deletion(-)
Currently struct fmap_entry is used to describe a mrc region.
However this structure contains some other fields that are not
related to mrc cache and causes confusion. Besides, it does not
include a base address field to store SPI flash's base address.
Instead in the mrccache.c it tries to use
fsp_init() call has a parameter nvs_buf which is used by FSP as the
MRC cache but currently is blindly set to NULL. Retreive the MRC
cache from SPI flash and pass it to fsp_init() call. After the call,
save FSP produced MRC cache to SPI flash too.
Signed-off-by: Bin Meng
---
It should be MRC, not MCR.
Signed-off-by: Bin Meng
---
arch/x86/cpu/ivybridge/sdram.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/x86/cpu/ivybridge/sdram.c b/arch/x86/cpu/ivybridge/sdram.c
index 9121426..fc66a3c 100644
---
Save MRC cache to SPI flash in arch_misc_init().
Signed-off-by: Bin Meng
---
arch/x86/cpu/baytrail/valleyview.c | 19 +++
1 file changed, 19 insertions(+)
diff --git a/arch/x86/cpu/baytrail/valleyview.c
b/arch/x86/cpu/baytrail/valleyview.c
index
With MRC cache enabled, when typing 'reset' in the U-Boot shell,
BayTrail FSP initialization hangs at "Configuring Memory Start":
Setting BootMode to 0
Install PPI: 1F4C6F90-B06B-48D8-A201-BAE5F1CD7D56
Register PPI Notify: F894643D-C449-42D1-8EA8-85BDD8C65BDE
About to call MrcInit();
"type" and "wipe-value" are never used by the mrccache codes.
Remove them to avoid confusion. This also removes the alignment
comment in the panther dts file.
Signed-off-by: Bin Meng
---
arch/x86/dts/chromebook_link.dts | 2 --
arch/x86/dts/chromebox_panther.dts | 3 ---
Now that we have added MRC cache for Intel FSP and BayTrail codes,
enable it for all BayTrail boards (Bayley Bay and Minnow Max).
Note it turns out that FSP for Intel Atom E6xx does not produce
the HOB for NV storage, so we don't have such functionality on
Intel Crown Bay board.
Signed-off-by:
Hi,
On Mon, Oct 12, 2015 at 5:47 AM, Simon Glass wrote:
> Hi,
>
> On 11 October 2015 at 07:29, Thomas Chou wrote:
>> Hi Bin,
>>
>> On 10/11/2015 08:43 PM, Bin Meng wrote:
>>>
>>> The spi-flash is converted to driver model, which is good, as there
>>> are
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