Thanks, Tom.
> -Original Message-
> From: Tom Rini [mailto:tr...@konsulko.com]
> Sent: Monday, November 09, 2015 4:36 PM
> To: Tom Warren
> Cc: Albert ARIBAUD ; swar...@wwwdotorg.org; u-
> b...@lists.denx.de; Simon Glass ;
On 12:25-20151110, Masahiro Yamada wrote:
> 2015-11-10 5:24 GMT+09:00 Simon Glass <s...@chromium.org>:
> >>> I am unhappy because I was hoping
> >>> we could stop creating symbolic links during building
> >>> in a long run.
> >
> > Bu
Hi Fabio,
On 10 November 2015 at 06:50, Fabio Estevam wrote:
> Hi Simon,
>
> On Tue, Nov 10, 2015 at 12:41 PM, Simon Glass wrote:
>
>> We're at the very start the release process, so I wonder if we can try
>> to figure out what is wrong here?
>>
>> Is it
On 11/10/2015 08:55 AM, Nishanth Menon wrote:
> On 12:25-20151110, Masahiro Yamada wrote:
>> 2015-11-10 5:24 GMT+09:00 Simon Glass <s...@chromium.org>:
>>>>> I am unhappy because I was hoping
>>>>> we could stop creating symbolic links during building
ls1043ardb_nand_defconfig and ls1043ardb_sdcard_defconfig are missing
in the MAINTAINERS file, so add them for completeness.
Reported-by: Albert Aribaud
Signed-off-by: Fabio Estevam
---
board/freescale/ls1043ardb/MAINTAINERS | 2 ++
1
On Tuesday, November 10, 2015 at 03:48:40 PM, Thomas Chou wrote:
> Rename board nios2-generic to 3c120_devboard. Since nios2 is
> converted to driver model and device tree control of u-boot,
> the nios2-generic board directory is removed. We can rename
> the board back to a real board name. Now
Hello York,
On Tue, 10 Nov 2015 08:36:17 -0800, York Sun
wrote:
>
>
> On 11/10/2015 07:44 AM, Albert ARIBAUD wrote:
> > Hello Fabio,
> >
> > On Tue, 10 Nov 2015 13:41:03 -0200, Fabio Estevam
> > wrote:
> >> ls1043ardb_nand_defconfig and
Add 3c120 and 10m50 devboards MAINTAINERS
Signed-off-by: Thomas Chou
---
board/altera/nios2/MAINTAINERS | 13 +
1 file changed, 13 insertions(+)
create mode 100644 board/altera/nios2/MAINTAINERS
diff --git a/board/altera/nios2/MAINTAINERS
Hello Tom,
Switching to these ASAP. :)
On Tue, 10 Nov 2015 15:54:58 +, Tom Warren
wrote:
> Thanks, Tom.
>
> > -Original Message-
> > From: Tom Rini [mailto:tr...@konsulko.com]
> > Sent: Monday, November 09, 2015 4:36 PM
> > To: Tom Warren
>
Hi Simon,
On Tue, Nov 10, 2015 at 12:41 PM, Simon Glass wrote:
> We're at the very start the release process, so I wonder if we can try
> to figure out what is wrong here?
>
> Is it because malloc() is not working, perhaps?
Yes, exactly. malloc() is not working.
Issue
Hello Simon,
On Tue, 10 Nov 2015 06:41:25 -0800, Simon Glass
wrote:
> Hi Fabio,
>
> On 10 November 2015 at 04:40, Fabio Estevam
> wrote:
> > This reverts commit 5ba534d247d418e09c5b4fe5fb7fa780aac08e49.
> >
> > This commit causes cgtqmx6eval to
On Tue, Nov 10, 2015 at 1:21 PM, Simon Glass wrote:
> Is this patch against mainline or does your tree have other changes?
This change is against a clean mainline tree.
>> /* DDR initialization */
>> spl_dram_init();
>>
>> It is the ame issue I reported back in
On 11/10/2015 07:44 AM, Albert ARIBAUD wrote:
> Hello Fabio,
>
> On Tue, 10 Nov 2015 13:41:03 -0200, Fabio Estevam
> wrote:
>> ls1043ardb_nand_defconfig and ls1043ardb_sdcard_defconfig are missing
>> in the MAINTAINERS file, so add them for completeness.
>>
>>
On 11/10/2015 05:18 AM, Yuan Yao-B46683 wrote:
> Thanks york,
>
> So it seems I should moving the workaround out of DDR driver in "gen4" to SoC.
> I think the workaround is not just only for ddr4.
> And It should be as a workaround for the SOC.
Please make the patch if you are comfortable.
Rename board nios2-generic to 3c120_devboard. Since nios2 is
converted to driver model and device tree control of u-boot,
the nios2-generic board directory is removed. We can rename
the board back to a real board name. Now the boards maintained
in u-boot mainline are the same as Linux kernel,
Hello Fabio,
On Tue, 10 Nov 2015 13:41:03 -0200, Fabio Estevam
wrote:
> ls1043ardb_nand_defconfig and ls1043ardb_sdcard_defconfig are missing
> in the MAINTAINERS file, so add them for completeness.
>
> Reported-by: Albert Aribaud
>
On 11/10/15 15:17, Dmitry Lifshitz wrote:
> CM-T3517 has several HW revisions.
> Add board specific get_board_rev() callback to retrieve revision number.
>
> Signed-off-by: Dmitry Lifshitz
Reviewed-by: Igor Grinberg
> ---
>
> Igor, Tom
>
>
Hi,
On 9 November 2015 at 19:34, c...@rock-chips.com wrote:
>
> Hi Simon,
>
> Thank you so much for your response.
>
> If there is no new framework, I may first follow the following API which
> U-boot has defined
> in the file include/common.h, such as:
>
> /*
Hello Tom,
The following changes since commit e490ad25eb3dc4f075ed33b4b00b1f97071fcf3d:
ARM64: zynqmp: Sync zynq_sdhci_init() declaration (2015-11-07 08:17:54 -0500)
are available in the git repository at:
git://git.denx.de/u-boot-arm master
for you to fetch changes up to
board_init_f_mem() alters the C runtime environment's
stack it ls actually already using. This is not a valid
C runtime environment.
Split board_init_f_mem into C functions which do not
alter their own stack and therefore run in a valid C
runtime environment.
Signed-off-by: Albert ARIBAUD
On Tue, 2015-11-10 at 11:17 -0800, York Sun wrote:
> Primary Protected Application (PPA) is the base of TrustZone for
> Freescale Layerscape SoCs. It needs to run in secure memory while
> the rest of u-boot can run in non-secure memory. The secure memory
> is reserved at the very end of DDR,
On 11/09/2015 03:12 AM, Prabhakar Kushwaha wrote:
> LS2080A is a prime personality of Freescale’s LS2085A. It is a non-AIOP
> personality without support of DP-DDR, L2 switch, 1588, PCIe endpoint etc.
> So renaming existing LS2085A code base to reflect LS2080A (Prime personality)
>
>
Primary Protected Application (PPA) is the base of TrustZone for
Freescale Layerscape SoCs. It needs to run in secure memory while
the rest of u-boot can run in non-secure memory. The secure memory
is reserved at the very end of DDR, before debug server and MC
reservations. The address varies
DDR has been set as secure in MMU tables. Non-secure master such
as SDHC DMA cannot access data correctly. Mixing secure and non-
secure MMU entries requirs the MMU tables themselves in secure
memory. This patch moves MMU tables into a secure DDR area reserved
for TrustZone with size
On 11/10/2015 11:31 AM, Scott Wood wrote:
> On Tue, 2015-11-10 at 11:17 -0800, York Sun wrote:
>> Primary Protected Application (PPA) is the base of TrustZone for
>> Freescale Layerscape SoCs. It needs to run in secure memory while
>> the rest of u-boot can run in non-secure memory. The secure
This option only complicates the code unnecessarily, just use
CONFIG_SYS_DEF_EEPROM_ADDR as the default address if there are
only five arguments to eeprom {read/write} if this is defined.
If CONFIG_SYS_DEF_EEPROM_ADDR is not defined, we mandate all
six arguments.
Signed-off-by: Marek Vasut
Make this function weak and implement it's weak implementation
so that the boards can just reimplement it. This zaps the horrid
CONFIG_SYS_EEPROM_WREN macro.
Signed-off-by: Marek Vasut
Cc: Simon Glass
Cc: Tom Rini
Cc: Heiko Schocher
Cosmetic fixes to the file, make it checkpatch clean.
Signed-off-by: Marek Vasut
Cc: Simon Glass
Cc: Tom Rini
Cc: Heiko Schocher
---
common/cmd_eeprom.c | 19 ++-
1 file changed, 10 insertions(+), 9
Just move the code around so that the forward declarations are not
necessary. Also zap a few checkpatch issues where applicable and
zap the use of #ifdef CONFIG_CMD_EEPROM in the code, since this is
always true.
Signed-off-by: Marek Vasut
Cc: Simon Glass
Cc:
This macro is no longer used, so just reap it.
Signed-off-by: Marek Vasut
Cc: Tom Rini
Cc: Simon Glass
Cc: Heiko Schocher
---
README | 5 -
common/cmd_eeprom.c | 8
2 files changed, 4 insertions(+),
On 11/10/2015 11:52 AM, Wolfgang Denk wrote:
> Dear York,
>
> In message <5642490c.9090...@freescale.com> you wrote:
>>
+- CONFIG_FSL_PPA_RESERVED_DRAM_SIZE
+ If defined, this is reserved in highest address as secure memory
>>>
>>> What is Freescale-specific about the concept of
On 11/10/2015 11:51 AM, Scott Wood wrote:
> On Tue, 2015-11-10 at 11:44 -0800, York Sun wrote:
>>
>> On 11/10/2015 11:31 AM, Scott Wood wrote:
>>> On Tue, 2015-11-10 at 11:17 -0800, York Sun wrote:
Primary Protected Application (PPA) is the base of TrustZone for
Freescale Layerscape
On Tue, Nov 10, 2015 at 1:38 PM, Fabio Estevam wrote:
>> Are you using CONFIG_SYS_MALLOC_F?
>
> No, I am not, but I have also tried adding CONFIG_SYS_MALLOC_F_LEN
> inside configs/mx6sabresd_spl_defconfig, but it did not help.
Sorry, you asked for CONFIG_SYS_MALLOC_F. I do
Hi Fabio,
On 10 November 2015 at 14:23, Fabio Estevam wrote:
> Hi Simon,
>
> On Tue, Nov 10, 2015 at 7:19 PM, Simon Glass wrote:
>
>> Then I wonder why malloc() is failing? Is it because there is too much
>
> In the example I sent I only allocate 64 bytes.
Unify the code for doing read/write into single function, since the
code for both the read and write is almost identical. This again
trims down the code duplication.
Signed-off-by: Marek Vasut
Cc: Simon Glass
Cc: Tom Rini
Cc: Heiko Schocher
From: Andreas Bießmann
This rewrite uses lately promoted eeprom_init(int) function to choose the
right I2C bus when writing data to the EEPROM.
Signed-off-by: Andreas Bießmann
Cc: Marek Vasut
Cc: Simon Glass
Pull out the code which does the I2C or SPI read/write, so that
the beefy ifdef around it is contained in a single function.
Signed-off-by: Marek Vasut
Cc: Simon Glass
Cc: Tom Rini
Cc: Heiko Schocher
---
common/cmd_eeprom.c
Hi Fabio,
On 10 November 2015 at 14:16, Fabio Estevam wrote:
> On Tue, Nov 10, 2015 at 1:38 PM, Fabio Estevam wrote:
>
>>> Are you using CONFIG_SYS_MALLOC_F?
>>
>> No, I am not, but I have also tried adding CONFIG_SYS_MALLOC_F_LEN
>> inside
From: Vagrant Cascadian
Switch Novena to distro bootcmd, so it can be used with debian easily.
Signed-off-by: Vagrant Cascadian
Signed-off-by: Marek Vasut
Cc: Sean Cross
Cc: Stefano Babic
---
On Tuesday, November 10, 2015 at 09:54:52 PM, Vagrant Cascadian wrote:
> On 2015-11-10, Marek Vasut wrote:
> > Switch Novena to distro bootcmd, so it can be used with debian easily.
>
> ...
>
> > diff --git a/include/configs/novena.h b/include/configs/novena.h
> > index 718989f..b0f4c02 100644
>
Add bus argument to eeprom_init(), so that it can select
the I2C bus number on which the eeprom resides. Any negative
value of the $bus argument will preserve the old behavior.
This is in place so that old code does not randomly break.
Signed-off-by: Marek Vasut
Cc: Simon Glass
Add additional parameter into the eeprom command to select
the I2C bus on which the eeprom resides.
Signed-off-by: Marek Vasut
Cc: Simon Glass
Cc: Tom Rini
Cc: Heiko Schocher
---
common/cmd_eeprom.c | 15 +++
1
Implement default value of 8 for this macro and pull out all of
this macro out of the code. The default value of 8 actually does
implement exactly the same behavior as the previous code which
was in the #else clause of the ifdef.
Signed-off-by: Marek Vasut
Cc: Simon Glass
On Tue, Nov 10, 2015 at 06:45:40PM +0100, Albert ARIBAUD wrote:
> Hello Tom,
>
> The following changes since commit e490ad25eb3dc4f075ed33b4b00b1f97071fcf3d:
>
> ARM64: zynqmp: Sync zynq_sdhci_init() declaration (2015-11-07 08:17:54
> -0500)
>
> are available in the git repository at:
>
>
Hi Michal,
On Tue, Nov 10, 2015 at 7:00 AM, Michal Simek wrote:
>
> From: "Edgar E. Iglesias"
>
> Code is taken from Linux kernel driver (v4.2).
>
> Signed-off-by: Edgar E. Iglesias
> Signed-off-by: Michal Simek
On Sun, Oct 25, 2015 at 10:32:28AM +0530, Prabhakar Kushwaha wrote:
> From: Zhenhua Luo
>
> In binutils-2.25, the _GLOBAL_OFFSET_TABLE_ symbols defined by PROVIDE in
> u-boot.lds overrides the linker built-in symbols
>
On Tue, Nov 10, 2015 at 09:18:50AM -0500, Tom Rini wrote:
> In 522b021 we dropped 'PROVIDE(_GLOBAL_OFFSET_TABLE_ = . + 4)' lines in
> the mpc85xx linker scripts as this is not required and breaks newer
> binutils. This commit cleans up the rest of the powerpc linker scripts.
>
> Signed-off-by:
Hi Simon,
On Tue, Nov 10, 2015 at 7:19 PM, Simon Glass wrote:
> Then I wonder why malloc() is failing? Is it because there is too much
In the example I sent I only allocate 64 bytes. malloc() does fail
even if I decrease this number.
> being allocated, or is the simple
Just suck the ugly ifdef around eeprom_init() call into eeprom_init()
function itself. This puts all of the ifdef mess into one place.
Signed-off-by: Marek Vasut
Cc: Simon Glass
Cc: Tom Rini
Cc: Heiko Schocher
---
Pull this macro to the beginning of the cmd_eeprom.c and remove
another nasty ifdef from the code. Note that this is legal, since
udelay(0) changes the behavior only such that it pings the WDT if
WDT is enabled and otherwise does not wait.
Signed-off-by: Marek Vasut
Cc: Simon
Now that the only user of CONFIG_SYS_EEPROM_X40430 was removed,
remove this unused code from cmd_eeprom.c
Signed-off-by: Marek Vasut
Cc: Tom Rini
Cc: Simon Glass
Cc: Heiko Schocher
---
common/cmd_eeprom.c | 94
Hi Albert,
On 9 November 2015 at 17:20, Albert ARIBAUD wrote:
> board_init_f_mem() alters the C runtime environment's
> stack it ls actually already using. This is not a valid
> C runtime environment and may conflict with the C compiler's
> expectations.
>
> Split
On Tue, Nov 10, 2015 at 09:14:38AM -0500, Tom Rini wrote:
> A few config files have been added without updating MAINTAINERS.
>
> Reported-by: Albert ARIBAUD
> Signed-off-by: Tom Rini
Applied to u-boot/master, thanks!
--
Tom
signature.asc
On Fri, Nov 06, 2015 at 12:44:01PM +, Måns Rullgård wrote:
> A number of headers define functions as "extern inline" which is
> causing problems with gcc5. The reason is that starting with
> version 5.1, gcc defaults to the standard C99 semantics for the
> inline keyword.
>
> Under the
On Tue, Nov 10, 2015 at 7:29 PM, Simon Glass wrote:
> Are you able to check what is happening in malloc_simple()? It is a
> really simple function.
Yes, I turned on debug inside malloc_simple() and it returns NULL:
U-Boot SPL 2015.10-00523-ge490ad2-dirty (Nov 10 2015 -
On Tuesday, November 04, 2014 at 05:01:47 PM, Andreas Bießmann wrote:
> This rewrite uses lately promoted eeprom_init(int) function to choose the
> right I2C bus when writing data to the EEPROM.
>
> Signed-off-by: Andreas Bießmann
> Cc: Marek Vasut
From: Vagrant Cascadian
Switch Novena to distro bootcmd, so it can be used with debian easily.
Signed-off-by: Vagrant Cascadian
Signed-off-by: Marek Vasut
Cc: Sean Cross
Cc: Stefano Babic
---
The kernel_addr_r should be set to the same value as CONFIG_LOADADDR,
get rid of the duplication.
Signed-off-by: Marek Vasut
Cc: Sean Cross
Cc: Stefano Babic
---
include/configs/novena.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
On Tue, Nov 10, 2015 at 5:16 AM, wrote:
> From: Shaohui Xie
>
> The phy can share driver with other aquantia PHYs, so we only added PHY
> ID.
>
> Signed-off-by: Shaohui Xie
Acked-by: Joe Hershberger
Hi Fabio,
On 10 November 2015 at 14:47, Fabio Estevam wrote:
> On Tue, Nov 10, 2015 at 7:29 PM, Simon Glass wrote:
>
>> Are you able to check what is happening in malloc_simple()? It is a
>> really simple function.
>
> Yes, I turned on debug inside
Remove this function as it's no longer used.
Signed-off-by: Marek Vasut
Cc: Tom Rini
Cc: Simon Glass
Cc: Heiko Schocher
---
common/cmd_eeprom.c | 19 ---
include/common.h| 3 ---
2 files changed, 22
Pull out the code computing the EEPROM address into separate function
so that it's not duplicated.
Signed-off-by: Marek Vasut
Cc: Simon Glass
Cc: Tom Rini
Cc: Heiko Schocher
---
common/cmd_eeprom.c | 64
Pull out the code which computes the length of the transfer
into separate code and clean it up a little. This again trims
down the code duplication.
Signed-off-by: Marek Vasut
Cc: Simon Glass
Cc: Tom Rini
Cc: Heiko Schocher
Dear York,
In message <5642490c.9090...@freescale.com> you wrote:
>
> >> +- CONFIG_FSL_PPA_RESERVED_DRAM_SIZE
> >> + If defined, this is reserved in highest address as secure memory
> >
> > What is Freescale-specific about the concept of reserving memory for a
> > secure
> > monitor?
>
> The
On Tue, 2015-11-10 at 11:44 -0800, York Sun wrote:
>
> On 11/10/2015 11:31 AM, Scott Wood wrote:
> > On Tue, 2015-11-10 at 11:17 -0800, York Sun wrote:
> > > Primary Protected Application (PPA) is the base of TrustZone for
> > > Freescale Layerscape SoCs. It needs to run in secure memory while
>
Hi Hans,
On 9 November 2015 at 12:25, Simon Glass wrote:
> Hi Hans,
>
> On 9 November 2015 at 00:22, Hans de Goede wrote:
>> Hi,
>>
>> On 09-11-15 07:48, Simon Glass wrote:
>>>
>>> Each scan of the USB bus may return different results. Existing
>>>
The 10m50 devboard becomes the new golden reference design of
Nios II Linux. So change README.nios2 to use 10m50 as template.
Signed-off-by: Thomas Chou
---
v3
use 10m50 as template.
doc/README.nios2 | 14 +++---
1 file changed, 7 insertions(+), 7 deletions(-)
Add 3c120 and 10m50 devboards MAINTAINERS
Signed-off-by: Thomas Chou
---
board/altera/nios2/MAINTAINERS | 13 +
1 file changed, 13 insertions(+)
create mode 100644 board/altera/nios2/MAINTAINERS
diff --git a/board/altera/nios2/MAINTAINERS
Rename board nios2-generic to 3c120_devboard. Since nios2 is
converted to driver model and device tree control of u-boot,
the nios2-generic board directory is removed. We can rename
the board back to a real board name. Now the boards maintained
in u-boot mainline are the same as Linux kernel,
On Mon, Nov 09, 2015 at 08:14:34PM -0500, Tom Rini wrote:
> After consulting with some of the SPDX team, the conclusion is that
> Makefiles are worth adding SPDX-License-Identifier tags too, and most of
> ours have one. This adds tags to ones that lack them and converts a few
> that had full (or
Hello Simon,
On Tue, 10 Nov 2015 13:04:50 -0700, Simon Glass
wrote:
> I'm hoping we don't have to bring back this assembler.
What we need in ASM is just the part that actually alters the stack
(i.e., changes the SP of the architecture) so that no C function has to
do it.
>
From: "Edgar E. Iglesias"
Code is taken from Linux kernel driver.
Signed-off-by: Edgar E. Iglesias
Signed-off-by: Michal Simek
---
Changes in v2:
- Add missing function declaration to phy.h
- Remove BIT macro and
Enable TI phy for Xilinx ZynqMP platform.
Signed-off-by: Michal Simek
---
include/configs/xilinx_zynqmp.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/include/configs/xilinx_zynqmp.h b/include/configs/xilinx_zynqmp.h
index 36c11009fc3d..574f788500bf 100644
---
some rockchip soc will not include lib/timer.c in SPL stage,
so implement timer driver for some soc can use us delay function in SPL.
Signed-off-by: Lin Huang
Acked-by: Simon Glass
---
Changes in v1: None
Changes in v2:
- add udelay function
Changes in
This series patch bring up rk3036 uboot, since rk3036 only 4K size
SRAM for SPL, so in SPL stage only support timer, uart, sdram driver,
and back to bootrom when finish ddr initial, and boot up second stage
from bootrom.You can boot to command line(mmc info etc) for now use
this patchset.
Jeffy
since different rockchip SOC have different size of SRAM,
So the size SYS_MALLOC_F_LEN may different, so move this
config to rk3288 own Kconfig
Signed-off-by: Lin Huang
Acked-by: Simon Glass
---
Changes in v1: None
Changes in v2: None
Changes in v3: None
since different rockchip soc need different spl file,
so rename board-spl.c.
Signed-off-by: Lin Huang
Acked-by: Simon Glass
---
Changes in v1: None
Changes in v2: None
Changes in v3: None
Changes in v4: None
Changes in v5: None
some rockchips soc will not use uclass in SPL stage,
so define config to decide whether to build common.c
Signed-off-by: Lin Huang
Acked-by: Simon Glass
---
Changes in v1: None
Changes in v2: None
Changes in v3: None
Changes in v4: None
Changes in v5:
show how to packet rk3036 uboot image and boot from SD
Signed-off-by: Lin Huang
---
Changes in v1: None
Changes in v2: None
Changes in v3: None
Changes in v4:
- fix some spell error
Changes in v5:
- Adviced by Simon:
- add evb rk3036 board to supported boards
From: Jeffy Chen
The Rockchip boot ROM could load & run an initial spl loader,
and continue to load a second level boot-loader(which stored
right after the initial loader) when it returns.
Modify idblock generation code to support it.
Signed-off-by: Jeffy Chen
GRF is the gereral register file. Add header files with register definitions.
Signed-off-by: Lin Huang
Acked-by: Simon Glass
---
Changes in v1:
- clean copyright announcement
Changes in v2:
- move some macro to grf_rk3036.h
Changes in v3: None
Changes in
Since rk3036 device tree file still in reviewing, bring it from
https://patchwork.kernel.org/patch/7203371/ and add some aliases
we need in uboot
Signed-off-by: Lin Huang
Acked-by: Simon Glass
---
Changes in v1:
- clean copyright announcement
Changes in
Add SPL Kconfig for REGMAP and SYSCON, so REGMAP and SYSCON can
remove from SPL stage.
Signed-off-by: Lin Huang
---
Changes in v1: None
Changes in v2: None
Changes in v3:
- fix compile error
Changes in v4: None
Changes in v5: None
configs/chromebook_jerry_defconfig | 2 ++
Signed-off-by: Lin Huang
Acked-by: Simon Glass
---
Changes in v1: None
Changes in v2:
- modify code suggest by Simon
Changes in v3: None
Changes in v4: None
Changes in v5: None
drivers/serial/serial_rockchip.c | 1 +
1 file changed, 1 insertion(+)
diff
Add a driver for setting up and modifying the various PLLs, peripheral
clocks and mmc clocks on RK3036
Signed-off-by: Lin Huang
Acked-by: Simon Glass
---
Changes in v1:
- clean copyright announcement
Changes in v2:
- move some macro to cru_rk3036.h
Hi,
With commit 7ae8350f67eea("ti: armv7: Move SPL SDRAM init to the right
place, drop unused CONFIG_SPL_STACK") QSPI XIP boot appears to be broken
on AM437x SK EVM.
Following UART initialization code (as indicated by TODO) causes the XIP
boot failure.
In arch/arm/cpu/armv7/am33xx/board.c:
@@
add rk3036 sdram driver so we can set up sdram in SPL
Signed-off-by: Lin Huang
---
Changes in v1: None
Changes in v2: None
Changes in v3:
- fix some code style error
Changes in v4:
- modify code advice by Simon Glass
Changes in v5:
- Advice by Simon:
- move some global
add early uart driver so we can print debug message in
SPL stage
Signed-off-by: Lin Huang
---
Changes in v1: None
Changes in v2: None
Changes in v3:
- pass uart base address to rk_uart_init() function
Changes in v4: None
Changes in v5: None
rk3036 mmc do not have internal dma, so we use fifo mode when read
and write data, we get the fifo mode and fifo depth property from
dts, pass to dw_mmc driver.
Signed-off-by: Lin Huang
---
arch/arm/dts/rk3036.dtsi | 1 +
drivers/mmc/rockchip_dw_mmc.c | 28
rk3036 only 4K size SRAM for SPL, so only support
timer, uart, sdram driver in SPL stage, when finish
initial sdram, back to bootrom.And in rk3036 sdmmc and
debug uart use same iomux, so if you want to boot from
sdmmc, you must disable debug uart.
Signed-off-by: Lin Huang
This add some basic files required to allow the board to dispaly
serial message and can run command(mmc info etc)
Signed-off-by: Lin Huang
---
Changes in v1:
- clean copyright announcement
Changes in v2:
- get sdram info from evb_rk3036.c
Changes in v3:
- delete some config
From: Jeffy Chen
Our chips may have different sram size limits and chip tag, so
we need to add configs for that.
Signed-off-by: Jeffy Chen
---
Changes in v1: None
Changes in v2: None
Changes in v3: None
Changes in v4: None
Changes in v5:
-
Add a driver which support pin multiplexing setup for rk3036
Signed-off-by: Lin Huang
Acked-by: Simon Glass
---
Changes in v1:
- clean copyright announcement
Changes in v2: None
Changes in v3:
- fix some coding style error
Changes in v4: None
Changes in
We can reset the Soc using some CRU (clock/reset unit) register.
Add support for this.
Signed-off-by: Lin Huang
Acked-by: Simon Glass
---
Changes in v1:
- clean copyright announcement
Changes in v2:
- only build reset_rk3036.c in NON-SPL stage
Changes in
Add a driver that provides access to system controllers
Signed-off-by: Lin Huang
Acked-by: Simon Glass
---
Changes in v1:
- clean copyright announcement
Changes in v2:
- only build syscon_rk3036.c on NON-SPL stage
Changes in v3: None
Changes in v4: None
some soc(rk3036 etc) use dw_mmc but do not have internal dma,
so we implement fifo mode to read and write data.
Signed-off-by: Lin Huang
---
drivers/mmc/dw_mmc.c | 81 +++-
include/dwmmc.h | 5
2 files changed, 72
Hello,
An all-ARM buildman on current ARM or mainline ToT (commit
7bdf75ca) causes the following warnings:
WARNING: no status info for 'am335x_gp_evm'
WARNING: no maintainers for 'am335x_gp_evm'
WARNING: no status info for 'dra74_evm'
WARNING: no maintainers for 'dra74_evm'
WARNING: no status
This reverts commit 5ba534d247d418e09c5b4fe5fb7fa780aac08e49.
This commit causes cgtqmx6eval to not boot anymore:
U-Boot SPL 2015.10-00527-g8800bee (Nov 09 2015 - 21:23:54)
mxc_spi: SPI Slave not allocated !
Signed-off-by: Fabio Estevam
---
arch/arm/lib/crt0.S |
On Tue, Nov 10, 2015 at 11:02:56AM +0100, Michal Simek wrote:
> From: "Edgar E. Iglesias"
>
> Code is taken from Linux kernel driver.
Which kernel tag / git hash? Makes future re-syncs for bug fixes
easier.
--
Tom
signature.asc
Description: Digital signature
From: "Edgar E. Iglesias"
Code is taken from Linux kernel driver (v4.2).
Signed-off-by: Edgar E. Iglesias
Signed-off-by: Michal Simek
---
Changes in v3:
- Add kernel version tag to the commit message - reported by
1 - 100 of 156 matches
Mail list logo