Hi Marek,
On 13.11.2015 08:13, Marek Vasut wrote:
> On Friday, November 13, 2015 at 07:11:18 AM, Stefan Roese wrote:
>> Hi Philipp,
>>
>> On 12.11.2015 18:23, Philipp Rosenberger wrote:
>>> The Cyclone V Hard Processor System Technical Reference Manual in the
>>> chapter about the Reset Manager
On Friday, November 13, 2015 at 09:02:43 AM, Philipp Rosenberger wrote:
> Hi Marek,
>
> On 13.11.2015 08:13, Marek Vasut wrote:
> > On Friday, November 13, 2015 at 07:11:18 AM, Stefan Roese wrote:
> >> Hi Philipp,
> >>
> >> On 12.11.2015 18:23, Philipp Rosenberger wrote:
> >>> The Cyclone V Hard
Binary ANDing a value with 0 and comparing it against 0 always
yields true, I guess that's not intended here.
Use the proper mask value for the memory region type bit.
Signed-off-by: Andre Przywara
---
drivers/pci/pci_common.c | 2 +-
1 file changed, 1 insertion(+), 1
Hi Andre,
On Fri, Nov 13, 2015 at 6:06 PM, Andre Przywara wrote:
> Binary ANDing a value with 0 and comparing it against 0 always
> yields true, I guess that's not intended here.
> Use the proper mask value for the memory region type bit.
>
> Signed-off-by: Andre Przywara
On Fri, Nov 13, 2015 at 8:46 AM, Bin Meng wrote:
> commit c3c016c "sf: Add SPI NOR protection mechanism" introduced
> flash_lock()/flash_unlock()/flash_is_locked() methods for SPI flash,
> but not every flash driver supplies these. We should test these
> methods against NULL
Hi Bin,
On 13/11/15 10:34, Bin Meng wrote:
> Hi Andre,
>
> On Fri, Nov 13, 2015 at 6:06 PM, Andre Przywara
> wrote:
>> Binary ANDing a value with 0 and comparing it against 0 always
>> yields true, I guess that's not intended here.
>> Use the proper mask value for the
On a Juno r1 the PCI controller init routine outputs the rather boring
ATR entry information.
Do this only with DEBUG defined to avoid cluttering the user's
terminal.
Signed-off-by: Andre Przywara
---
board/armltd/vexpress64/pcie.c | 2 +-
1 file changed, 1 insertion(+),
Replace __attribute__((no_instrument_function)) with notrace from
.
Signed-off-by: Bin Meng
Acked-by: Simon Glass
---
Changes in v3: None
Changes in v2: None
arch/x86/lib/tsc_timer.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff
This adds driver model timer support to x86 tsc timer driver.
Signed-off-by: Bin Meng
Acked-by: Simon Glass
---
Changes in v3: None
Changes in v2: None
arch/x86/lib/tsc_timer.c | 65
1 file changed, 65
Convert all x86 boards to use driver model tsc timer.
Signed-off-by: Bin Meng
Acked-by: Simon Glass
---
Changes in v3:
- Really remove "counter-64bit" property from tsc_timer.dtsi
Changes in v2:
- Remove "counter-64bit" property
Now that we have converted all x86 boards to use driver model timer,
remove these legacy timer codes in the tsc driver.
Note this also removes the TSC_CALIBRATION_BYPASS Kconfig option,
as it is not needed with driver model.
Signed-off-by: Bin Meng
Acked-by: Simon Glass
Hi Albert,
On 2015年11月13日 14:41, Albert ARIBAUD wrote:
Hello Thomas,
On Thu, 12 Nov 2015 13:59:28 +0800, Thomas Chou
wrote:
Hi Albert,
- /* Update stack- and frame-pointers */
- mov sp, r2
- mov fp, sp
Just a sec here on second thought.
I
Hello
Nishanth Menon wrote:
> Header files can be located in a generic location without needing to
> reference them with ../common/
>
> board/mpl/common/{ => include/board-common}/common_util.h (100%)
> rename board/mpl/common/{ => include/board-common}/isa.h (100%)
Correct me if I'm missing
Hi Tom,
Thanks for coming back to this.
On 12 November 2015 at 20:58, Tom Rini wrote:
> On Mon, Oct 26, 2015 at 11:00:22AM +, Ryan Harkin wrote:
>
>> This patch makes the 2nd DRAM bank available on Juno only and not on
>> other vexpress64 targets, eg. the FVP models.
>>
From: Daniel Hellstrom
Signed-off-by: Daniel Hellstrom
Signed-off-by: Francois Retief
---
arch/sparc/cpu/leon3/Makefile | 2 +-
arch/sparc/cpu/leon3/memcfg.c | 237 +++
From: Daniel Hellstrom
Signed-off-by: Daniel Hellstrom
Signed-off-by: Francois Retief
---
arch/sparc/cpu/leon3/ambapp.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/arch/sparc/cpu/leon3/ambapp.c
Signed-off-by: Francois Retief
---
arch/sparc/cpu/leon3/cpu_init.c | 5 -
arch/sparc/cpu/leon3/serial.c | 27 ++-
configs/grsim_defconfig | 4
drivers/serial/Kconfig | 8
4 files changed, 42 insertions(+),
From: Daniel Hellstrom
Signed-off-by: Daniel Hellstrom
Signed-off-by: Francois Retief
---
arch/sparc/cpu/leon3/cpu_init.c | 10 ++-
arch/sparc/cpu/leon3/interrupts.c | 7 +-
arch/sparc/cpu/leon3/prom.c | 7 +-
Add an initr function in the board_r.c file for the AMBA Plug
command. Add a Kconfig entry for the ambapp command and remove all
CONFIG_CMD_AMBAPP defines from the board configuration headers.
Add a Kconfig entry to display the AMBA Plug information
on startup. This option is off by default.
Signed-off-by: Francois Retief
---
arch/sparc/cpu/leon2/start.S | 60 ++--
arch/sparc/cpu/leon3/start.S | 60 ++--
2 files changed, 82 insertions(+), 38 deletions(-)
diff --git
Update the GRSIM board with the memory settings for the evaluation
version of TSIM. This free version of TSIM is used for testing.
Signed-off-by: Francois Retief
---
configs/grsim_defconfig | 1 +
include/configs/grsim.h | 57
As the environment variables "serial#" and "ethaddr" need to be
overwriten by the users, CONFIG_ENV_OVERWRITE is defined to disable
the write protection. Anybody can change or delete these parameters.
Signed-off-by: Alison Wang
---
include/configs/ls2085a_common.h | 3
Hi Bin,
On 2015年11月13日 16:11, Bin Meng wrote:
This series enhances timer uclass driver to support 64-bit counter
value, and convert tsc timer to driver model to be used by all x86
boards.
As a result of dm conversion, the TSC_CALIBRATION_BYPASS Kconfig
option is no longer needed, and the TSC
On Thu, Nov 12, 2015 at 12:25 AM, Jagan Teki wrote:
> On 11 November 2015 at 15:13, Fabio Estevam wrote:
>> On Wed, Nov 11, 2015 at 12:56 AM, Simon Glass wrote:
>>
>>> It crashes reading the environment:
>>>
>>> U-Boot
Since we have timer uclass to get clock frequency for us, remove
the custom version in the altera timer driver.
Signed-off-by: Bin Meng
Acked-by: Thomas Chou
Acked-by: Simon Glass
---
Changes in v3: None
Changes in v2: None
There are timers with a 64-bit counter value but current timer
uclass driver assumes a 32-bit one. Modify timer_get_count()
to ask timer driver to always return a 64-bit counter value,
and provide an inline helper function timer_conv_64() to handle
the 32-bit/64-bit conversion automatically.
Every timer device needs to have a valid clock frequency and it
can be specified in the device tree. Use pre_probe() to get this
in the timer uclass driver.
Signed-off-by: Bin Meng
Acked-by: Thomas Chou
Acked-by: Simon Glass
---
This series enhances timer uclass driver to support 64-bit counter
value, and convert tsc timer to driver model to be used by all x86
boards.
As a result of dm conversion, the TSC_CALIBRATION_BYPASS Kconfig
option is no longer needed, and the TSC frequency can be specified
in the board device
Hi Albert,
On Wed, Nov 11, 2015 at 2:30 AM, Albert ARIBAUD
wrote:
> board_init_f_mem() alters the C runtime environment's
> stack it ls actually already using. This is not a valid
> C runtime environment.
>
> Split board_init_f_mem into C functions which do not
> alter
This is not referenced anywhere. Remove it, as well as
tsc_base_kclocks and tsc_prev in the global data.
Signed-off-by: Bin Meng
Acked-by: Simon Glass
---
Changes in v3: None
Changes in v2: None
arch/x86/cpu/cpu.c | 18 --
This changes 'Timer' to 'timer' at several places.
Signed-off-by: Bin Meng
Acked-by: Thomas Chou
Reviewed-by: Simon Glass
---
Changes in v3: None
Changes in v2:
- Rebase on u-boot-dm/master
- Change 'Timer' to 'timer' in the
We should use device tree to pass the clock frequency of the timer
instead of hardcoded in the driver codes.
Signed-off-by: Bin Meng
---
Changes in v3: None
Changes in v2:
- New patch to use device tree to pass the clock frequency
arch/sandbox/dts/sandbox.dts | 1 +
To group all dm timer drivers together, move tsc timer to
drivers/timer directory.
Signed-off-by: Bin Meng
Acked-by: Simon Glass
---
Changes in v3: None
Changes in v2: None
arch/x86/lib/Makefile | 1 -
drivers/timer/Kconfig
wandboard and mx6cuboxi have warnings because BOOT_DELAY
is defined twice.
Signed-off-by: Stefano Babic
CC: Vagrant Cascadian
CC: Otavio Salvador
CC: Fabio Estevam
---
include/configs/mx6cuboxi.h | 2 +-
This patch series is a backlog of preparation work for upcomming
generic board changes.
I first want to get these reviewed and submitted to mainline before
sending out more patches.
Daniel Hellstrom (4):
sparc: leon3: Reimplemented AMBA Plug scanning routines.
sparc: leon3: Added memory
Signed-off-by: Francois Retief
---
MAINTAINERS| 2 +-
doc/git-mailrc | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/MAINTAINERS b/MAINTAINERS
index bf60c67..b3a45cc 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -370,7 +370,7 @@ T: git
Update the LEON2/3 serial driver to make use of the readl and writel
macros as well as the WATCHDOG_RESET() macro.
Add readl/writel and friends to the asm/io.h file.
Introduce the gd->arch.uart variable to store register address.
Lastly, remove baudrate scaler macro variables from board config.
From: Francois Retief
Fixes broken search and replaced license changes in
files cpu/leon3/start.S and include/asm/winmacro.h
from commit 1a4596601fd395f3afb8f82f3f840c5e00bdd57a
Signed-off-by: Francois Retief
---
arch/sparc/cpu/leon3/start.S
Signed-off-by: Francois Retief
---
arch/sparc/config.mk | 14 ++
1 file changed, 10 insertions(+), 4 deletions(-)
diff --git a/arch/sparc/config.mk b/arch/sparc/config.mk
index d615f29..43faad4 100644
--- a/arch/sparc/config.mk
+++ b/arch/sparc/config.mk
@@
On the km8321 boards is CONFIG_SYS_DDRCDR not defined, which leads to
the DDRCDR not being configured at startup and still containing the
reset value.
The required settings for our km8321 hardware designs are different than
the reset value and must be set with CONFIG_SYS_DDRCDR, that is used
by
From: Holger Brunck
128kByte and 3,986MB may be in the future too little for kernel the fdt
blob respectively the kernel image. So increase the reserved areas here,
we have the space for this.
Signed-off-by: Holger Brunck
Signed-off-by:
If a DTB is found with cramfsls, the bootscript continues as expected.
If none is found, the cramfsloadfdt and boot subbootcmds are updated to
not load the DTB from cramfs and not pass it to the kernel. The kernel
thus must have an appended DTB otherwise the boot will fail.
This is required for
From: Tobias Müller
Search for the kernel and DTBs in a folder named PRODUCTNAME (found in the IVM)
at the TFTP server instead of the u-boot boardname.
Signed-off-by: Tobias Müller
Signed-off-by: Valentin Longchamp
From: Holger Brunck
When loading the dtb file via tftp we should load the one which matches
boardId and hwKey and not a common one for the boardname. We have boards
were different hwKeys are used and then we may load an incorrect dtb
file. If no fdt_bid_kwkey.dtb file
From: Holger Brunck
To prevent u-boot to stop accidently e.g. due to line noise on the
serial line, we now use the option CONFIG_AUTOBOOT_KEYED. We choose the
key for this.
Signed-off-by: Holger Brunck
Signed-off-by: Valentin Longchamp
Hi,
On 12-11-15 19:09, Vishnu Patekar wrote:
Add support for A83T dram. Register are different from sun8i A33.
init code is similar to A33 dram init.
hope we'll shift duplicate code in dram_sun8i_*
to dram helper in future.
Signed-off-by: Vishnu Patekar
This one
Hi,
On 12-11-15 19:09, Vishnu Patekar wrote:
Allwinner A83T is new octa-core cortex-a7 SOC.
This adds the basic dtsi, the clocks differs from
earlier sun8i SOCs.
This is not yet included in kernel.
Signed-off-by: Vishnu Patekar
---
arch/arm/dts/sun8i-a83t.dtsi
From: Holger Brunck
On mgcoge3ne we also want to start the test application if the testpin
is asserted. But we don't have a full POST test support yet. So simply
add a function to read the testpin value.
Signed-off-by: Holger Brunck
This is the last part of the changes for the Keymile boards. This series
contains all the changes that are common to all boards and architectures
(that's why they are sent as an independant series) and mostly target
our environment scripts.
Holger Brunck (2):
km/common: stop u-boot only if
On Sat, Nov 14, 2015 at 12:52 AM, Hans de Goede wrote:
> Hi,
>
> On 12-11-15 19:09, Vishnu Patekar wrote:
>>
>> This patch series adds basic support for Allwinner A83T SOC.
>>
>> Allwinner A83T is octa-core cortex-a7 based SoC.
>> It's clock control unit and prcm, pinmux are
From: Holger Brunck
commit 0a4f88b98 removed the usage of our setports function, but the
function itself were not removed. So toss it it's dead code.
Signed-off-by: Holger Brunck
Signed-off-by: Valentin Longchamp
From: Holger Brunck
The get_pin and set_pin funciton was only used for pins on Port D and
therefore the value was hard coded in the function. Enhance this with a
parameter, that we are able to use this functions for other ports too.
Signed-off-by: Holger Brunck
The impedance settings have been changed with commit
2ea8ae99595ca11dd228726e854ebc6268208601 (whose goal was to set
the internal voltage level to the DDR2 value - and not DDR1).
There was no other good reason to set them to nominal strength than
"the others do it like that" according to Ludger.
For consistency with all the other km83xx plaforms, this should also be
defined for km8309. The same settings as for km8321 are taken.
Signed-off-by: Valentin Longchamp
---
include/configs/km/km8309-common.h | 6 ++
1 file changed, 6 insertions(+)
diff
On 11/13/2015 06:40 AM, Alexey Brodkin wrote:
Hi Stephen,
On Thu, 2015-11-12 at 16:00 -0700, Stephen Warren wrote:
On 11/12/2015 02:56 PM, Alexey Brodkin wrote:
Up until now there was no need in those stubs.
But since following commit compilation of U-Boot on ARC is broken:
commit
Hi,
On 12-11-15 19:09, Vishnu Patekar wrote:
AXP818 is rsb based PMIC and used on Allwinner A83T H8 Homlet dev board.
It's registers are different and calculating reg config is different than
that of earlier axp power ICs.
DCDC1, DCDC2, DCDC3 and DCDC5 is implemented at the moment.
all other
Hi Tom,
The following changes since commit 9ac4fc82071ce346e3885118242ff45d22f69b82:
board_init: Change the logic to setup malloc_base (2015-11-12 20:34:07 -0500)
are available in the git repository at:
git://git.denx.de/u-boot-x86.git master
for you to fetch changes up to
On Fri, Nov 13, 2015 at 09:06:45AM -0500, Tom Rini wrote:
> On Fri, Nov 13, 2015 at 11:30:43AM +0100, Simon Guinot wrote:
> > Hi Nishanth,
> >
> > On Thu, Nov 12, 2015 at 11:43:37PM -0600, Nishanth Menon wrote:
> > > Header files can be located in a generic location without
> > > needing to
On 11/12/2015 09:57 AM, Simon Glass wrote:
This series converts all Tegra boards to use driver model for PCI. The net
effect should be no change in functionality.
I applied this series on top of current u-boot/master.
On Jetson TK1 (T124), I see the following errors when U-Boot starts:
Net:
Hi,
On 12-11-15 19:09, Vishnu Patekar wrote:
Add basic clocks pll1, pll5, and some default values from allwinner u-boot.
Signed-off-by: Vishnu Patekar
This one looks good as is.
Regards,
Hans
---
arch/arm/cpu/armv7/sunxi/Makefile | 4 +
Hi,
On 12-11-15 19:09, Vishnu Patekar wrote:
When smp is enabled for A83T, intermittent hang is observed after booting
kernel.
for now do not enable the smp for CPU0. This has to be fixed.
Also, fixed the space at line start warning at these two lines.
Signed-off-by: Vishnu Patekar
Hi,
On 12-11-15 19:09, Vishnu Patekar wrote:
Currently, there no display support for A83T.
Signed-off-by: Vishnu Patekar
Please merge this one into the "sunxi: Add Machine Support for A83T SOC"
commmit.
Regards,
Hans
---
board/sunxi/Kconfig | 1 +
1 file
From: Holger Brunck
We use CONFIG_OF_LIBFDT and CONFIG_OF_BOARD_SETUP on all our powerpc
targets, so there is no need to check these defines within our C code.
Signed-off-by: Holger Brunck
Signed-off-by: Valentin Longchamp
The ODT parameters for km8360 set the ODT_WR_ACS bit in u-boot KM-2011.09
that is used in the release bootpackage for kmcoge5ne. During the
transition from the kmeter1 to km8360 and with the migration to
KM-2012.10 (commit 0f2b721c80fa50c8e09548f0ad1b4210d2197bf9), this
was changed to
It should be after the u-boot reserved sectors and before the env
sectors, since the solution used for kmvect1 (tell the linker to put the
firmware into the u-boot produced binary, at the end of the area) should
be the exception.
The #define is only "conditional" so that we can still support
Hi,
On 12-11-15 19:09, Vishnu Patekar wrote:
Enabled support for AXP818 in SPL and u-boot.
DCDC1, DCDC2, DCDC3 and DCSC5 are enabled.
Signed-off-by: Vishnu Patekar
---
arch/arm/cpu/armv7/sunxi/Makefile | 1 +
arch/arm/cpu/armv7/sunxi/pmic_bus.c | 15
From: Holger Brunck
We use the same settings for open firmware defines on all our powerpc
targets, so move them from the CPU specific headers to the common
powerpc header.
Signed-off-by: Holger Brunck
Signed-off-by: Valentin Longchamp
From: Christoph Dietrich
This board is similar to TUXX1, but it has differend FPGAs.
Signed-off-by: Christoph Dietrich
Signed-off-by: Andreas Huber
Signed-off-by: Valentin Longchamp
This board uses the same CPU (8309) as VECT1. The memory however is
different since it has NAND Flash, the NOR Flash partitioning is
different and of course the FPGAs as well.
Signed-off-by: Valentin Longchamp
Signed-off-by: Christoph Dietrich
From: Bagavathiannan Palanisamy
Setting dip_switch 3 and 4 also will run bootloader in COGE3 and COGE6
It is required remove local mgmt IP address, when DIP Switch PIN3 is
enabled. DIP Switch 4 also enabled to avoid u-boot update in future
for DIP switch
The hardcoded value are bad, since the address could change between
different boards.
Furthermore, the relevant #defines are set only if #undefined here, so
that they can be changed by some boards if required.
Signed-off-by: Valentin Longchamp
---
On 13 November 2015 at 11:25, Andre Przywara wrote:
> On a Juno r1 the PCI controller init routine outputs the rather boring
> ATR entry information.
> Do this only with DEBUG defined to avoid cluttering the user's
> terminal.
Good idea.
>
> Signed-off-by: Andre Przywara
Signed-off-by: Valentin Longchamp
---
board/keymile/km82xx/km82xx.c | 2 +-
board/keymile/km83xx/km83xx.c | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/board/keymile/km82xx/km82xx.c b/board/keymile/km82xx/km82xx.c
index 9e285ec..c2a7a5f
Hi,
On 12-11-15 19:09, Vishnu Patekar wrote:
This patch series adds basic support for Allwinner A83T SOC.
Allwinner A83T is octa-core cortex-a7 based SoC.
It's clock control unit and prcm, pinmux are different from previous sun8i
series.
Its processor cores are arragned in two clusters 4 cores
Hi,
On 12-11-15 19:09, Vishnu Patekar wrote:
Add dts and defconfig for h8homletv2 board.
H8Homlet Proto v2.0 Board is A83T Dev Board by Allwinner.
It has UART, ethernet, USB, HDMI, etc ports on it.
A83T patches are tested on this board.
For FEL mode it needs USB A-A(Male) cable. I used uart0
A few bugfixes have been done for the km_kirkwood bards in the last
months and this series collects them all to be sumbitted to mainline.
Furthermore, support for 3 new Keymile ppc boards are added:
- kmvect1_p1a: based on 8309, first hw revision of kmvect1
- kmtepr2: based on a 8321, this is
From: Holger Brunck
This first boards have the simple switch connected to a PRST line of the
PRIO3. This is not allowed because it releases the PRIO3 watchdog in
u-boot which causes problems with the bootloader application. This is
fixed in the newer HW releases. To be
From: Stephen Warren
The Linux kernel, from which checkpatch originates, contains function
ether_addr_copy() to copy Ethernet MAC addresses, and checkpatch warns
that it should be used in preference to memcpy() where appropriate.
U-Boot doesn't contain ether_addr_copy(), so
Hi,
On 12-11-15 19:09, Vishnu Patekar wrote:
On A83T, PB9,PB10 are UART0 pins.
On allwinner A83T Dev board(h8homlet), this uart0 serial connector
is exposed.
Signed-off-by: Vishnu Patekar
This one looks good as is.
Regards,
Hans
---
Hi,
On 12-11-15 19:09, Vishnu Patekar wrote:
Allwinner A83T is octa-core cortex-a7 SOC.
This enables support for A83T.
Signed-off-by: Vishnu Patekar
---
arch/arm/cpu/armv7/sunxi/cpu_info.c | 2 ++
board/sunxi/Kconfig | 11 ++-
Hi Lin,
On 10 November 2015 at 03:24, Lin Huang wrote:
> This add some basic files required to allow the board to dispaly
> serial message and can run command(mmc info etc)
>
> Signed-off-by: Lin Huang
> ---
> Changes in v1:
> - clean copyright
Hi Lin,
On 10 November 2015 at 03:24, Lin Huang wrote:
> rk3036 mmc do not have internal dma, so we use fifo mode when read
> and write data, we get the fifo mode and fifo depth property from
> dts, pass to dw_mmc driver.
>
> Signed-off-by: Lin Huang
>
+Pantelis (mmc maintainer)
Hi Lin,
On 10 November 2015 at 03:24, Lin Huang wrote:
> some soc(rk3036 etc) use dw_mmc but do not have internal dma,
> so we implement fifo mode to read and write data.
>
> Signed-off-by: Lin Huang
> ---
>
On 10 November 2015 at 03:24, Lin Huang wrote:
> Add SPL Kconfig for REGMAP and SYSCON, so REGMAP and SYSCON can
> remove from SPL stage.
>
> Signed-off-by: Lin Huang
> ---
> Changes in v1: None
> Changes in v2: None
> Changes in v3:
> - fix compile
Congatec has several MX6 boards based on quad, dual, dual-lite and solo.
Add SPL support so that all the variants can be supported
Signed-off-by: Otavio Salvador
---
Changes in v5:
- Add missing CONFIG_BOARD_LATE_INIT
- Fix checkpatch error
- Use erase/write as update
Add MMC and SPI DFU support.
Signed-off-by: Otavio Salvador
---
Changes in v5: None
Changes in v4: None
include/configs/cgtqmx6eval.h | 10 ++
1 file changed, 10 insertions(+)
diff --git a/include/configs/cgtqmx6eval.h b/include/configs/cgtqmx6eval.h
index
Tested basic fastboot commands, such as:
On the U-boot prompt:
=> fastboot 0
On the host PC:
$ fastboot getvar bootloader-version -i 0x0525
bootloader-version: U-Boot 2015.10-rc2-09654-g8f41d27
finished. total time: 0.000s
$ fastboot reboot -i 0x0525 --> board reboots fine.
Signed-off-by:
Congatec boards boot from SPI NOR, so it makes more sense to use
SPI NOR to store the environment variables.
Signed-off-by: Otavio Salvador
---
Changes in v5: None
Changes in v4: None
include/configs/cgtqmx6eval.h | 18 ++
1 file changed, 14
We should also take MX6D option in consideration when defining
imx_iomux_v3_setup_pad().
Signed-off-by: Otavio Salvador
---
Changes in v5: None
Changes in v4: None
arch/arm/include/asm/imx-common/iomux-v3.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff
Similarly to Linux kernel it's nice to have generic driver for
EHCI-compatible host controllers.
This implementation is very minimalistic and doesn't have any
platform-specific glue code nor phy-related operations.
For example this allows usage of USB-storage devices with
Synopsys DesignWare
With this change Synopsys DesignWare SDP board is switched to driver
model for both serial port (serial_dw) and Ethernet (Designware GMAC).
This simplifies include/configs/axs101.h and allows for reuse of Linux's
Device Tree description.
For simplicity Linux's .dts files are not blindly copied
Hi Lin,
On 10 November 2015 at 03:24, Lin Huang wrote:
> add rk3036 sdram driver so we can set up sdram in SPL
>
> Signed-off-by: Lin Huang
> ---
> Changes in v1: None
> Changes in v2: None
> Changes in v3:
> - fix some code style error
> Changes in v4:
Hi Lin,
On 10 November 2015 at 03:24, Lin Huang wrote:
> add early uart driver so we can print debug message in
> SPL stage
>
> Signed-off-by: Lin Huang
> ---
> Changes in v1: None
> Changes in v2: None
> Changes in v3:
> - pass uart base address to
Hi Lin,
On 10 November 2015 at 03:24, Lin Huang wrote:
> From: Jeffy Chen
>
> Our chips may have different sram size limits and chip tag, so
> we need to add configs for that.
>
> Signed-off-by: Jeffy Chen
> ---
>
Hi Lin,
On 10 November 2015 at 03:24, Lin Huang wrote:
> rk3036 only 4K size SRAM for SPL, so only support
> timer, uart, sdram driver in SPL stage, when finish
> initial sdram, back to bootrom.And in rk3036 sdmmc and
> debug uart use same iomux, so if you want to boot from
Hi Lin,
On 10 November 2015 at 03:24, Lin Huang wrote:
> This series patch bring up rk3036 uboot, since rk3036 only 4K size
> SRAM for SPL, so in SPL stage only support timer, uart, sdram driver,
> and back to bootrom when finish ddr initial, and boot up second stage
> from
On 11 November 2015 at 19:23, Bin Meng wrote:
> On Thu, Nov 12, 2015 at 10:19 AM, Marek Vasut wrote:
>> On Thursday, November 12, 2015 at 02:16:05 AM, Thomas Chou wrote:
>>> Hi Marek,
>>
>> Hi!
>>
>>> On 2015年11月11日 23:54, Marek Vasut wrote:
>>> > On Wednesday,
Hi Alexey,
On 12 November 2015 at 14:56, Alexey Brodkin
wrote:
> Up until now there was no need in those stubs.
>
> But since following commit compilation of U-Boot on ARC is broken:
> >8--
> commit
Hi Stephen,
On 13 November 2015 at 09:41, Stephen Warren wrote:
> On 11/12/2015 09:57 AM, Simon Glass wrote:
>>
>> This series converts all Tegra boards to use driver model for PCI. The net
>> effect should be no change in functionality.
>
>
> I applied this series on top
On 11 November 2015 at 06:39, Thomas Chou wrote:
> Add CMD_GPIO to Kconfig and run tools/moveconfig.py .
>
> Signed-off-by: Thomas Chou
> ---
> v2
> run tools/moveconfig.py.
Reviewed-by: Simon Glass
1 - 100 of 196 matches
Mail list logo