DDR Errata A008378 only exists on LS102x Rev1, it has been
fixed on LS102x Rev2.
Signed-off-by: Shengzhou Liu
---
drivers/ddr/fsl/arm_ddr_gen3.c | 11 +++
drivers/ddr/fsl/fsl_ddr_gen4.c | 9 ++---
2 files changed, 17 insertions(+), 3 deletions(-)
diff
Hi Tom,
> On Fri, Nov 13, 2015 at 07:42:08AM +0100, Lukasz Majewski wrote:
>
> > This code is not processing any data to serial console output and
> > hence can be replaced with puts.
> >
> > Signed-off-by: Lukasz Majewski
>
> No, printf is fine, always. We went over
On Wed, 18 Nov 2015 18:40:48 -0500
Tom Rini wrote:
> On Fri, Nov 13, 2015 at 07:42:12AM +0100, Lukasz Majewski wrote:
>
> > This commit adds support for "gpt verify" command, which verifies
> > correctness of on-board stored GPT partition table.
> > As the optional parameter
Hi Fabio,
On 19 November 2015 at 02:50, Fabio Estevam wrote:
> Hi Jagan,
>
> On Tue, Nov 17, 2015 at 4:07 AM, Jagan Teki wrote:
>> On 14 November 2015 at 00:19, Otavio Salvador
>> wrote:
>>> Add SPI NOR support:
>>>
>>> => sf
On 16 November 2015 at 09:01, Bin Meng wrote:
> flash->flags for SST flash should be updated for both DM and non-DM
> flash drivers.
>
> Signed-off-by: Bin Meng
> ---
Applied to u-boot-spi/master
thanks!
--
Jagan.
Add get_svr_ver_major() and get_svr_ver_minor() helper.
Signed-off-by: Shengzhou Liu
---
arch/arm/cpu/armv7/ls102xa/cpu.c | 14 ++
arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h | 3 +++
2 files changed, 17 insertions(+)
diff --git
On Mi, 2015-11-18 at 09:34 -0200, Fabio Estevam wrote:
> Hi Jörg,
>
> On Wed, Nov 18, 2015 at 6:44 AM, Jörg Krause
> wrote:
>
> > I think this is not the right thing to do here. It is true that the
> > AR8035 ethernet chip of the RioTboard needs the clock to be
On 19 November 2015 at 12:35, Mugunthan V N wrote:
> Add compatible for spansion 32MiB spi flash s25fl256s1.
>
> Signed-off-by: Mugunthan V N
> ---
> drivers/mtd/spi/sf_probe.c | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git
On 11/19/2015 10:00 AM, Stephen Warren wrote:
On 11/19/2015 07:45 AM, Simon Glass wrote:
Hi Stephen,
On 14 November 2015 at 23:53, Stephen Warren
wrote:
This tool aims to test U-Boot by executing U-Boot shell commands
using the
console interface. A single top-level
On 19 November 2015 at 09:40, Stephen Warren wrote:
> On 11/18/2015 07:05 AM, Marcel Ziswiler wrote:
>>
>> The address range check may overflow if the memory region is located at
>> the top of the 32-bit address space. This can e.g. be seen on TK1 if
>> using the E1000
On Thu, Nov 19, 2015 at 7:02 PM, Otavio Salvador
wrote:
> Congatec boards boot from SPI NOR, so it makes more sense to use
> SPI NOR to store the environment variables.
>
> Signed-off-by: Otavio Salvador
Reviewed-by: Fabio Estevam
On Thu, Nov 19, 2015 at 7:02 PM, Otavio Salvador
wrote:
> Add SPI NOR support:
>
> => sf probe
> SF: Detected SST25VF032B with page size 256 Bytes, erase size 4 KiB, total 4
> MiB
>
> Signed-off-by: Otavio Salvador
Reviewed-by: Fabio Estevam
On 11/19/2015 04:45 PM, Marek Vasut wrote:
> On Thursday, November 19, 2015 at 10:35:47 PM, dingu...@opensource.altera.com
> wrote:
>> From: Dinh Nguyen
>>
>> Update Makefile to build Arria 10.
>>
>> Signed-off-by: Dinh Nguyen
>>
On 19 November 2015 at 06:48, Thomas Chou wrote:
> Add generic binding to unify ns16550 drivers. There are
> several drivers using almost the same code, such as serial_dw,
> serial_keystone, serial_omap, serial_ppc, serial_rockchip,
> serial_tegra.c, and serial_x86. But each
Add MMC and SPI DFU support.
Signed-off-by: Otavio Salvador
---
Changes in v6: None
Changes in v5: None
Changes in v4: None
include/configs/cgtqmx6eval.h | 10 ++
1 file changed, 10 insertions(+)
diff --git a/include/configs/cgtqmx6eval.h
On Tue, 3 Nov 2015 11:14:49 -0500
sayotte.t...@gmail.com wrote:
> From: Stephane Ayotte
>
> This patch adds an option to skip the registration of LCD stdio ouput for
> boards that want to show different text on LCD than on serial output (or
> the active stdout selected by
Hi Tom,
On 19 November 2015 at 09:28, Tom Rini wrote:
> On Thu, Nov 19, 2015 at 07:24:45AM -0700, Simon Glass wrote:
>> +Tom
>>
>> Hi Lin,
>>
>> On 18 November 2015 at 22:49, hl wrote:
>> > Hi Simon,
>> >
>> >
>> >
>> > On 19/11/15 12:44, Simon Glass
On 19 November 2015 at 06:48, Thomas Chou wrote:
> Since commit 220e8021af96 ("nios2: convert altera_jtag_uart to
> driver model"), the default debug uart was changed. Most people
> use ns16550 UART, so restore it as default.
>
> Signed-off-by: Thomas Chou
On 19 November 2015 at 06:48, Thomas Chou wrote:
> Change map_sysmem() to map_physmem(,,MAP_NOCACHE). Though map_sysmem()
> can be used to map system memory, it might be wrong to use it for I/O
> ports. The map_physmem() serves the same purpose to translate physical
>
Hello Stephane,
On Thu, 19 Nov 2015 08:41:44 -0500
Stephane Ayotte wrote:
...
> Does this patch have a chance to get to the release even if it has missed
> RC1?
yes, I've queued it in my tree.
Thanks,
Anatolij
___
U-Boot
On Thu, Nov 19, 2015 at 7:02 PM, Otavio Salvador
wrote:
> Congatec has several MX6 boards based on quad, dual, dual-lite and solo.
>
> Add SPL support so that all the variants can be supported
>
> Signed-off-by: Otavio Salvador
Reviewed-by:
On Thu, Nov 19, 2015 at 7:02 PM, Otavio Salvador
wrote:
> We should also take MX6D option in consideration when defining
> imx_iomux_v3_setup_pad().
>
> Signed-off-by: Otavio Salvador
Reviewed-by: Fabio Estevam
On Thu, Nov 19, 2015 at 7:02 PM, Otavio Salvador
wrote:
> Add MMC and SPI DFU support.
>
> Signed-off-by: Otavio Salvador
Reviewed-by: Fabio Estevam
___
U-Boot mailing
Congatec has several MX6 boards based on quad, dual, dual-lite and solo.
Add SPL support so that all the variants can be supported
Signed-off-by: Otavio Salvador
---
Changes in v6: None
Changes in v5:
- Add missing CONFIG_BOARD_LATE_INIT
- Fix checkpatch error
- Use
Congatec boards boot from SPI NOR, so it makes more sense to use
SPI NOR to store the environment variables.
Signed-off-by: Otavio Salvador
---
Changes in v6: None
Changes in v5: None
Changes in v4: None
include/configs/cgtqmx6eval.h | 18 ++
1 file
We should also take MX6D option in consideration when defining
imx_iomux_v3_setup_pad().
Signed-off-by: Otavio Salvador
---
Changes in v6: None
Changes in v5: None
Changes in v4: None
arch/arm/include/asm/imx-common/iomux-v3.h | 2 +-
1 file changed, 1 insertion(+), 1
Add SPI NOR support:
=> sf probe
SF: Detected SST25VF032B with page size 256 Bytes, erase size 4 KiB, total 4 MiB
Signed-off-by: Otavio Salvador
---
Changes in v6:
- use ifdef CONFIG_MXC_SPI (Jagan)
Changes in v5: None
Changes in v4: None
Tested basic fastboot commands, such as:
On the U-boot prompt:
=> fastboot 0
On the host PC:
$ fastboot getvar bootloader-version -i 0x0525
bootloader-version: U-Boot 2015.10-rc2-09654-g8f41d27
finished. total time: 0.000s
$ fastboot reboot -i 0x0525 --> board reboots fine.
Signed-off-by:
On Thu, Nov 19, 2015 at 7:02 PM, Otavio Salvador
wrote:
> Tested basic fastboot commands, such as:
>
> On the U-boot prompt:
>
> => fastboot 0
>
> On the host PC:
>
> $ fastboot getvar bootloader-version -i 0x0525
> bootloader-version: U-Boot 2015.10-rc2-09654-g8f41d27
>
From: Dinh Nguyen
Update Makefile to build Arria 10.
Signed-off-by: Dinh Nguyen
---
arch/arm/mach-socfpga/Makefile | 7 +--
arch/arm/mach-socfpga/arria10/Makefile | 7 +++
2 files changed, 12 insertions(+), 2
From: Dinh Nguyen
For now, sdram_a10.c will only have sdram_init() function, but this
will get populated in the near future with more functionality.
Also add the structures for the SDRAM controller on Arria10.
Signed-off-by: Dinh Nguyen
On Thu, Nov 19, 2015 at 07:37:07AM +0100, Heiko Schocher wrote:
> Hello Tom,
>
> please pull from u-boot-ubi master
>
> The following changes since commit 736d1746fb7b8f7cd70657a4a72db2b6bd8de40e:
>
> itest: add missing break statements to evalexp() (2015-11-18 15:29:00 -0500)
>
> are
From: Dinh Nguyen
Add the defines for the reset manager and some basic reset functionality.
Signed-off-by: Dinh Nguyen
---
arch/arm/mach-socfpga/arria10/reset_manager_a10.c | 83 +++
From: Dinh Nguyen
Add the base address map for Arria10.
Signed-off-by: Dinh Nguyen
---
.../include/mach/socfpga_a10_base_addrs.h | 45 ++
1 file changed, 45 insertions(+)
create mode 100644
On Thu, Nov 19, 2015 at 01:05:25PM -0700, Simon Glass wrote:
> Hi Tom,
>
> On 19 November 2015 at 09:28, Tom Rini wrote:
> > On Thu, Nov 19, 2015 at 07:24:45AM -0700, Simon Glass wrote:
> >> +Tom
> >>
> >> Hi Lin,
> >>
> >> On 18 November 2015 at 22:49, hl
On Thu, Nov 19, 2015 at 01:21:29PM +0100, Michal Simek wrote:
> Hi,
>
> please pull these patches to your tree. I have added there 3 dm patches
> which were Acked-by Simon which fixing manual relocation which is used
> by Microblaze (others are probably without DM now).
>
> Thanks,
> Michal
>
On Thu, Nov 19, 2015 at 03:09:59PM +0100, Michal Simek wrote:
> Hi Tom,
>
> please pull these changes to your tree. Network patches have been Ack by
> Joe. mkimage, mii patches were reviewed by you.
>
> There is one problem with U-Boot SPL for Zynq because one patch break it
> (not compilation)
On Thu, Nov 19, 2015 at 12:46:58PM +0100, Stefan Roese wrote:
> On 19.11.2015 12:19, Nikita Kiryanov wrote:
> >Hi Tom,
> >
> >On Wed, Nov 18, 2015 at 05:33:20PM -0500, Tom Rini wrote:
> >>On Sun, Nov 08, 2015 at 05:11:51PM +0200, Nikita Kiryanov wrote:
> >>
> >>>Introduce spl_boot_list array,
On Thu, Nov 19, 2015 at 01:19:39PM +0200, Nikita Kiryanov wrote:
> Hi Tom,
>
> On Wed, Nov 18, 2015 at 05:33:20PM -0500, Tom Rini wrote:
> > On Sun, Nov 08, 2015 at 05:11:51PM +0200, Nikita Kiryanov wrote:
> >
> > > Introduce spl_boot_list array, which defines a list of boot devices
> > > that
On Thursday, November 19, 2015 at 10:35:47 PM, dingu...@opensource.altera.com
wrote:
> From: Dinh Nguyen
>
> Update Makefile to build Arria 10.
>
> Signed-off-by: Dinh Nguyen
> ---
> arch/arm/mach-socfpga/Makefile | 7
On Thursday, November 19, 2015 at 10:35:38 PM, dingu...@opensource.altera.com
wrote:
> From: Dinh Nguyen
>
> Add the base address map for Arria10.
>
> Signed-off-by: Dinh Nguyen
> ---
> .../include/mach/socfpga_a10_base_addrs.h
On Thursday, November 19, 2015 at 10:35:40 PM, dingu...@opensource.altera.com
wrote:
> From: Dinh Nguyen
>
> Add the defines for the reset manager and some basic reset functionality.
>
> Signed-off-by: Dinh Nguyen
> ---
>
On Thursday, November 19, 2015 at 10:35:43 PM, dingu...@opensource.altera.com
wrote:
> From: Dinh Nguyen
>
> Add config for the Arria10 SoC Development Kit.
>
> Signed-off-by: Dinh Nguyen
> ---
>
On Thursday, November 19, 2015 at 10:35:42 PM, dingu...@opensource.altera.com
wrote:
> From: Dinh Nguyen
>
> Add miscellaneous functions(arch_early_init_r, print_cpuinfo,
> overwrite_console, enable_caches, and cpu_mmc_init). Also, the Arria10
> has a firewall
From: Dinh Nguyen
Add a defconfig file for Arria10, which does not include enabling SPL.
Signed-off-by: Dinh Nguyen
---
configs/socfpga_arria10_defconfig | 11 +++
1 file changed, 11 insertions(+)
create mode 100644
From: Dinh Nguyen
Signed-off-by: Dinh Nguyen
---
arch/arm/Kconfig | 4 ++--
arch/arm/mach-socfpga/Kconfig | 10 ++
2 files changed, 12 insertions(+), 2 deletions(-)
diff --git a/arch/arm/Kconfig
From: Dinh Nguyen
Add config for the Arria10 SoC Development Kit.
Signed-off-by: Dinh Nguyen
---
include/configs/socfpga_arria10_socdk.h | 292
1 file changed, 292 insertions(+)
create mode
From: Dinh Nguyen
Add system manager defines for Arria10.
Signed-off-by: Dinh Nguyen
---
.../mach-socfpga/include/mach/system_manager_a10.h | 157 +
1 file changed, 157 insertions(+)
create mode 100644
From: Dinh Nguyen
Add minimal support for the Arria10 SoCDK.
Signed-off-by: Dinh Nguyen
---
board/altera/arria10-socdk/Kconfig | 18 ++
board/altera/arria10-socdk/Makefile | 9 +
On Thu, Nov 19, 2015 at 11:16:40PM +0530, Jagan Teki wrote:
> Hi Tom,
>
> Please pull this PR.
>
> thanks!
> Jagan.
>
> The following changes since commit 3d4825446e4258192e1f2302d691a8c0c82a0975:
>
> Prepare v2016.01-rc1 (2015-11-16 20:29:51 -0500)
>
> are available in the git repository
On Mon, Nov 16, 2015 at 08:15:50AM -0300, Ariel D'Alessandro wrote:
> No UART driver was specified in defconfig, thus
> DEBUG_UART_ALTERA_JTAGUART was incorrectly selected by default since
> commit 220e8021af96741bd7149ca9895e1f0c8a38d0bb added a new Altera UART
> driver.
>
> Signed-off-by:
From: Dinh Nguyen
Hi,
This patchset adds the foundation support for Arria10. The series builds for
the Altera Arria10 SoCDK, but is not entirely functional on the hardware yet.
This series really just add the defines, build and Kconfig layout for Arria10.
There
On Thursday, November 19, 2015 at 10:35:39 PM, dingu...@opensource.altera.com
wrote:
Hi!
[...]
> +/* Input buffer enable */
> +#define INPUT_BUF_DISABLE(0)
> +#define INPUT_BUF_1P8V (1)
> +#define INPUT_BUF_2P5V3V (2)
You can drop those parenthesis around the number
>
Hi Tom,
On Wed, Nov 18, 2015 at 05:33:20PM -0500, Tom Rini wrote:
> On Sun, Nov 08, 2015 at 05:11:51PM +0200, Nikita Kiryanov wrote:
>
> > Introduce spl_boot_list array, which defines a list of boot devices
> > that SPL will try before hanging. By default this list will consist
> > of only
On 16 November 2015 at 23:20, Lin Huang wrote:
> rk3036 mmc do not have internal dma, so we use fifo mode when read
> and write data, we get the fifo mode and fifo depth property from
> dts, pass to dw_mmc driver.
>
> Signed-off-by: Lin Huang
> ---
>
On Thursday, November 19, 2015 at 11:58:26 AM, Anand Moon wrote:
> Hi Ted, Stephen,
>
>
>
>
>
> On Tuesday, November 17, 2015 12:48 PM, Ted wrote:
> Hi Stephen,
>
> I am investigating how to modify this driver by Marek's comments, and will
> send you new patch ASAP.
>
On 19.11.2015 12:19, Nikita Kiryanov wrote:
Hi Tom,
On Wed, Nov 18, 2015 at 05:33:20PM -0500, Tom Rini wrote:
On Sun, Nov 08, 2015 at 05:11:51PM +0200, Nikita Kiryanov wrote:
Introduce spl_boot_list array, which defines a list of boot devices
that SPL will try before hanging. By default this
Hi,
please pull these patches to your tree. I have added there 3 dm patches
which were Acked-by Simon which fixing manual relocation which is used
by Microblaze (others are probably without DM now).
Thanks,
Michal
The following changes since commit 736d1746fb7b8f7cd70657a4a72db2b6bd8de40e:
Hi Simon,
On 19/11/15 22:24, Simon Glass wrote:
+Tom
Hi Lin,
On 18 November 2015 at 22:49, hl wrote:
Hi Simon,
On 19/11/15 12:44, Simon Glass wrote:
Hi Lin,
On 17 November 2015 at 18:19, hl wrote:
Hi Simon,
On 18/11/15 01:38, Simon Glass
Applied to u-boot-dm.
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Applied to u-boot-dm.
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Applied to u-boot-dm.
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Applied to u-boot-dm.
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Applied to u-boot-dm.
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Hi Simon,
On Fri, Nov 20, 2015 at 11:09 AM, Simon Glass wrote:
> Hi,
>
> I'm wondering what might come next for U-Boot x86 support.
>
> The PCI conversion to driver model is coming along nicely. The ACPI
> support is only partially there but it is a good start.
>
> What else?
Applied to u-boot-dm.
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The 3.4 kernel from the Allwinner SDK is clocking AHB1 at 200MHz
on Allwinner H3 and using PLL6 as the clock source (PLL6/3).
This can be verified by reading the value of the AHB1_APB1_CFG_REG
register via /dev/mem. It always reads as 0x3180 regardless of
the current cpufreq operating point. So
Hi Ted, Stephen,
On Tuesday, November 17, 2015 12:48 PM, Ted wrote:
Hi Stephen,
I am investigating how to modify this driver by Marek's comments, and will send
you new patch ASAP.
Thanks~
BRs
Ted
Just wanted to share why
Hi Simon,
On Fri, Nov 20, 2015 at 10:34 AM, Simon Glass wrote:
> Hi,
>
> I haven't been able to connect for quite a few hours. Is anyone else
> having a problem?
>
Just tried, and I am able to connect patchwork.
Regards,
Bin
___
This series converts all Tegra boards to use driver model for PCI. The net
effect should be no change in functionality.
A few additional features are added to make this possible:
- Helper functions to support accessing 8- and 16-bit values within a 32-bit
word
- Fixing a build error for
At present we add a new resource entry for every range entry. But some range
entries refer to configuration regions. To make this work, avoid adding two
regions of the same type. The later ranges will overwrite the earlier
(configuration) ones.
There does not seem to be a way to distinguish the
Provide a few functions to support using 32-bit access to emulate 8- and
16-bit access.
Signed-off-by: Simon Glass
Reviewed-by: Stephen Warren
---
Changes in v5: None
Changes in v4: None
Changes in v3: None
Changes in v2: None
drivers/pci/pci-uclass.c |
This is not supported with driver model, so print a message instead of
generating a build error. Rescanning PCI is not yet implemented.
This function will be implemented later once some additional PCI driver
model improvements are merged. It was confirmed on the mailing list
that no one on the
Rebased to master and:
Applied to u-boot-dm.
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Applied to u-boot-dm.
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Applied to u-boot-dm.
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Hi Albert,
On 13 November 2015 at 19:35, Simon Glass wrote:
> On 9 November 2015 at 14:36, Albert ARIBAUD wrote:
>> Hello Simon,
>>
>> On Mon, 9 Nov 2015 12:24:55 -0800, Simon Glass wrote:
>>> On 9 November 2015 at 06:19, Albert
This function looks up the controller and returns a pointer to each region
type.
Signed-off-by: Simon Glass
Acked-by: Stephen Warren
---
Changes in v5: None
Changes in v4: None
Changes in v3: None
Changes in v2: None
drivers/pci/pci-uclass.c | 30
Applied to u-boot-dm.
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Applied to u-boot-dm.
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Applied to u-boot-dm.
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Applied to u-boot-dm.
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Applied to u-boot-dm.
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Applied to u-boot-dm.
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Applied to u-boot-dm.
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Hi Ted/Stephen,
On Tuesday, November 17, 2015 12:48 PM, Ted wrote:
Hi Stephen,
I am investigating how to modify this driver by Marek's comments, and will send
you new patch ASAP.
Thanks~
BRs
Ted
從: Stephen Warren
Hi Marek,
On 19 November 2015 at 16:42, Marek Vasut wrote:
> On Thursday, November 19, 2015 at 11:58:26 AM, Anand Moon wrote:
> > Hi Ted, Stephen,
> >
> >
> >
> >
> >
> > On Tuesday, November 17, 2015 12:48 PM, Ted wrote:
> > Hi Stephen,
> >
> > I am
Hi Bin,
On 19 November 2015 at 19:48, Bin Meng wrote:
> Hi Simon,
>
> On Fri, Nov 20, 2015 at 10:34 AM, Simon Glass wrote:
>> Hi,
>>
>> I haven't been able to connect for quite a few hours. Is anyone else
>> having a problem?
>>
>
> Just tried, and I am
Applied to u-boot-dm.
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SDRAM doesn't always start at 0. Adjust the region mapping so that it works
on platforms where SDRAM is somewhere else.
This needs testing on other platforms.
Signed-off-by: Simon Glass
---
Changes in v5: None
Changes in v4: None
Changes in v3: None
Changes in v2:
- Rename
Applied to u-boot-dm.
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Applied to u-boot-dm.
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Applied to u-boot-dm.
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On Thu, Nov 19, 2015 at 1:58 PM, Fabio Estevam wrote:
> Hi Peng,
>
> Just noticed that mx6ulevk is not booting with latest U-boot:
>
> U-Boot SPL 2016.01-rc1-00078-g736d174 (Nov 19 2015 - 13:45:19)
> Trying to boot from MMC
> spl: mmc block read error
> SPL: failed to boot
On 11/19/2015 01:57 AM, Shengzhou Liu wrote:
> DDR Errata A008378 only exists on LS102x Rev1, it has been
> fixed on LS102x Rev2.
Shengzhou,
I have different document for this erratum. We will discuss internally.
York
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On Thu, Nov 19, 2015 at 07:24:45AM -0700, Simon Glass wrote:
> +Tom
>
> Hi Lin,
>
> On 18 November 2015 at 22:49, hl wrote:
> > Hi Simon,
> >
> >
> >
> > On 19/11/15 12:44, Simon Glass wrote:
> >>
> >> Hi Lin,
> >>
> >>
> >> On 17 November 2015 at 18:19, hl
Hi,
I haven't been able to connect for quite a few hours. Is anyone else
having a problem?
Regards,
Simon
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Hi,
I'm wondering what might come next for U-Boot x86 support.
The PCI conversion to driver model is coming along nicely. The ACPI
support is only partially there but it is a good start.
What else? More platforms? Other features? Better support for existing
platforms?
Regards,
Simon
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