Argument boot_flags of board_init_f() should be set to 0 as
$a0 may be utilized in lowlevel_init() or mips_cache_reset()
or previous stage boot-loader.
Signed-off-by: Purna Chandra Mandal
---
Changes in v2:
- add comment in same line as of the asm instruction
- add
On 18 January 2016 at 19:52, Simon Glass wrote:
> Add a test for the 'bmp' command. Test both the uncompressed and compressed
> versions of the file, since they use different code paths.
>
> Signed-off-by: Simon Glass
> Acked-by: Anatolij Gustschin
On 18 January 2016 at 19:52, Simon Glass wrote:
> Test that text is displayed correctly when the console is rotated.
>
> Signed-off-by: Simon Glass
> Acked-by: Anatolij Gustschin
> ---
>
> Changes in v2: None
>
> configs/sandbox_defconfig |
On Thu, Jan 21, 2016 at 07:39:07AM +0100, Heiko Schocher wrote:
> Hello Tom,
>
> please pull from u-boot-i2c.git
>
> The following changes since commit 57e5ecaf755d5301cd33683788e4b8432938bbbe:
>
> iocon / bamboo: Drop CONFIG_SYS_LONGHELP (2016-01-20 15:25:00 -0500)
>
> are available in the
Tom Rini writes:
>> > style does not comply with U-Boot but I think it is best to leave alone to
>> > permit the source to be synced later if needed.
>> >
>> > The only change is to fix a reference to fabs() which should route through
>> > a macro to allow U-Boot to provide
On Wed, Jan 20, 2016 at 08:31:30PM +, Måns Rullgård wrote:
> I'm having a problem with u-boot 2016.01 failing to detect the FPGA on
> my Altera Cyclone V SoC Development Kit. On startup, it simply prints
> "FPGA: Not Altera chip ID" (the ID having been read as all-zero). No
> amount of
On Thursday, January 21, 2016 at 05:20:33 PM, Måns Rullgård wrote:
> Tom Rini writes:
> > On Wed, Jan 20, 2016 at 08:31:30PM +, Måns Rullgård wrote:
> >> I'm having a problem with u-boot 2016.01 failing to detect the FPGA on
> >> my Altera Cyclone V SoC Development Kit.
On Fri, Jan 15, 2016 at 06:06:12AM +0100, Alexander Graf wrote:
> After booting has finished, EFI allows firmware to still interact with the OS
> using the "runtime services". These callbacks live in a separate address
> space,
> since they are available long after U-Boot has been overwritten by
> > style does not comply with U-Boot but I think it is best to leave alone to
> > permit the source to be synced later if needed.
> >
> > The only change is to fix a reference to fabs() which should route through
> > a macro to allow U-Boot to provide its own version.
>
> This seems to be using
Tom Rini writes:
> On Wed, Jan 20, 2016 at 08:31:30PM +, Måns Rullgård wrote:
>
>> I'm having a problem with u-boot 2016.01 failing to detect the FPGA on
>> my Altera Cyclone V SoC Development Kit. On startup, it simply prints
>> "FPGA: Not Altera chip ID" (the ID having
On 01/21/2016 07:44 AM, Ashish Kumar wrote:
>> a/include/configs/ls2080a_common.h b/include/configs/ls2080a_common.h
>> index a503934..9ab5d97 100644
>> --- a/include/configs/ls2080a_common.h
>> +++ b/include/configs/ls2080a_common.h
>> @@ -18,6 +18,8 @@
>> /* Errata fixes */
>> #define
On 01/20/2016 11:31 PM, ying.zh...@freescale.com wrote:
> From: Ying Zhang
>
> The fuse status register provides the values from on-chip
> voltage ID efuses programmed at the factory.
> These values define the voltage requirements for
> the chip. u-boot reads FUSESR and
On Thu, Jan 21, 2016 at 02:48:11PM +0800, ub...@andestech.com wrote:
> Hi Tom,
>
> Please pull the following patch from u-boot-nds32 into your tree.
> Thanks!
>
> The following changes since commit 077678eb0c226e52a1f90edabd3369ab26065b32:
>
> Merge git://git.denx.de/u-boot-dm (2016-01-12
2016-01-20 13:35 GMT+09:00 Simon Glass :
> Hi Masahiro,
>
> On 18 January 2016 at 22:15, Masahiro Yamada
> wrote:
>> 2015-12-28 23:20 GMT+09:00 Simon Glass :
>>> Hi Masahiro,
>>>
>>> On 18 December 2015 at 04:15, Masahiro Yamada
Am 21.01.2016 um 15:32 schrieb Purna Chandra Mandal:
> Argument boot_flags of board_init_f() should be set to 0 as
> $a0 may be utilized in lowlevel_init() or mips_cache_reset()
> or previous stage boot-loader.
>
> Signed-off-by: Purna Chandra Mandal
>
> ---
>
>
Fix 32 vs 64 bit load/store instructions. Access CP0_WATCHHI as
32 Bit register. Use 64 Bit register access for clearing gd_data
and copying U-Boot.
Signed-off-by: Daniel Schwierzeck
---
arch/mips/cpu/start.S | 22 +++---
1 file changed, 11
Hi,
On 01/11/2016 06:20 PM, Vishnu Patekar wrote:
This adds LPDDR3 support for A83T and support for Banana Pi M3 which has LPDDR3.
These patches are based on u-boot-sunxi next branch.
These patches tesed on Banana-pi M3. DCDC5 voltage is kept as 1.2V
changes from v1 -> v2
1. introduce
On 01/21/2016 03:50 AM, Lukasz Majewski wrote:
Hi Stephen,
From: Stephen Warren
Add a test of DFU functionality to the Python test suite. The test
starts DFU in U-Boot, waits for USB device enumeration on the host,
executes dfu-util multiple times to test various transfer
Hi,
On 01/06/2016 08:13 AM, Chen-Yu Tsai wrote:
Secure Memory Touch Arbiter is the same thing as the TrustZone
Protection Controller found on A31/A31s.
Access to many peripherals on the H3 can be controlled by the SMTA,
and the settings default to secure access only.
This patch supports the
Hi,
On 01/06/2016 08:13 AM, Chen-Yu Tsai wrote:
Hi everyone,
This series enables PSCI support for the H3. Like other Allwinner SoCs,
the implementation only supports PSCI 0.1, specifically only secondary
CPU boot/hotplug.
Patch 1 supports the SMTA (previously called TZPC) TrustZone hardware
On Thu, Jan 21, 2016 at 02:11:13PM -0500, Tom Rini wrote:
> On Thu, Jan 21, 2016 at 11:35:01AM +0100, Ladislav Michl wrote:
>
> > Enable CONFIG_CMD_SETEXPR, useful when passing initramfs end address:
> > $ fatload mmc 0:1 $rdaddr root.cpio.gz
> > $ setexpr rdendaddr $rdaddr + $filesize
> > $ fdt
On Thu, Jan 21, 2016 at 08:56:15PM +0100, Ladislav Michl wrote:
> On Thu, Jan 21, 2016 at 02:11:13PM -0500, Tom Rini wrote:
[...]
> > OK, but why do that instead of 'bootz $loadaddr $rdaddr $fdtaddr' ?
>
> => bootz $loadaddr $rdaddr $fdtaddr
> Wrong Ramdisk Image Format
> Ramdisk image is corrupt
Please see inline
Regards
Ashish
-Original Message-
From: york sun [mailto:york@nxp.com]
Sent: Tuesday, January 19, 2016 10:34 PM
To: Ashish Kumar ; u-boot@lists.denx.de
Subject: Re: [PATCH] ARMv8:ls2-2080a: Implement core ERRATA 829520, 833471
On
Hi Marek,
On 21 January 2016 at 02:04, Marek Vasut wrote:
> On Wednesday, January 20, 2016 at 09:10:07 PM, Anand Moon wrote:
>> Hi Ted / Marek / Stephen,
>>
>> On 20 January 2016 at 22:22, Stephen Warren wrote:
>> > On 01/19/2016 11:24 PM, Ted Chen wrote:
Add lpuart support using the driver model.
Signed-off-by: Wenbin Song
---
Changes in v4:
- No change
---
arch/arm/dts/Makefile | 1 +
arch/arm/dts/fsl-ls1043a-qds-lpuart.dts | 16 ++
arch/arm/dts/fsl-ls1043a-qds.dtsi | 4 +++
> -Original Message-
> From: Tom Rini [mailto:tr...@konsulko.com]
> Sent: Tuesday, January 19, 2016 11:59 PM
> To: Yangbo Lu
> Cc: york sun; Andy Fleming; U-Boot list
> Subject: Re: [U-Boot] [v2] mmc: fsl_esdhc: fix mmc read/write error on
> T4080
>
> On Mon, Jan 18, 2016 at 07:18:59AM
Move new /chosen node out of the board device tree.
Signed-off-by: Wenbin Song
---
Changes in v4:
- No change
---
arch/arm/dts/Makefile| 2 +-
arch/arm/dts/fsl-ls1043a-qds-duart.dts | 16
From: Shaohui Xie
Set Board Configuration Register to select the lpuart pins of various
muxes.
Signed-off-by: Shaohui Xie
Signed-off-by: Mingkai Hu
---
Changes in v4:
- remove the blank line and ending period
-
From: Hou Zhiqiang
Signed-off-by: Hou Zhiqiang
---
V2
- No change.
board/freescale/ls1043ardb/ls1043ardb.c | 11 +++
include/configs/ls1043ardb.h| 9 +
2 files changed, 20 insertions(+)
diff --git
From: Hou Zhiqiang
The FSL Primary Protected Application (PPA) is a software component
loaded during boot which runs in TrustZone and remains resident
after boot.
Signed-off-by: Hou Zhiqiang
---
Tested on LS1043A RDB board
V2:
- Added
From: Hou Zhiqiang
This function assume that the d-cache and MMU has been enabled earlier,
so it just created MMU table in main memory. But the assumption is not
always correct, for example, the early setup is done in EL3, while
enable_caches() is called when the PE
From: Hou Zhiqiang
This function assume that the d-cache and MMU has been enabled earlier,
so it just created MMU table in main memory. But the assumption is not
always correct, for example, the early setup is done in EL3, while
enable_caches() is called when the PE
According to SD spec, CMD12, CMD52 for writing I/O abort in CCCR need
to be set an Abort command type when they are sent. So, we remove all
chip-specific #ifdefs and make it available for all platforms.
Signed-off-by: Yangbo Lu
---
Changes for v2:
- Removed fix for
On 01/17/2016 01:42 AM, Aneesh Bansal wrote:
> Chain of Trust is enabled for ARM platforms (LS1021 and LS1043).
> In board_late_init(), fsl_setenv_chain_of_trust() is called which
> will perform the following:
> - If boot mode is non-secure, return (No Change)
> - If boot mode is secure, set the
On 01/20/2016 09:43 PM, Gong Qianyu wrote:
> From: Gong Qianyu
>
> In current driver everytime we memcpy 4 bytes to the dest memory
> regardless of the remaining length.
> This patch adds checking the remaining length before memcpy.
> If the length is shorter than 4
The testpattern of the lcd was only working in 8bit mode(2x3 tiles in
different colors). With this patch now 8bit and 16bit is supported.
In 16bit mode there are 2x4 tiles in different colors.
The number of LCD-colors is defined in the include/configs/.h
br,
Andy
From
On 01/20/2016 09:42 PM, Gong Qianyu wrote:
> From: Gong Qianyu
>
> This patch fixes the following compile warning:
> drivers/spi/fsl_qspi.c: In function 'fsl_qspi_probe':
> drivers/spi/fsl_qspi.c:937:15:
> warning: cast to pointer from integer of different size
>
From: Stephen Warren
find_ram_base() is a shared utility function, not a core part of the
U-Boot console interaction.
Signed-off-by: Stephen Warren
---
These two patches depend on my previous series starting with:
test/py: fix timeout to be absolute
From: Stephen Warren
This tests:
- dhcp (if indicated by boardenv file).
- Static IP network setup (if provided by boardenv file).
- Ping.
- TFTP get.
Signed-off-by: Stephen Warren
---
test/py/tests/test_net.py | 153
On Thu, Jan 21, 2016 at 08:30:36AM -0700, Simon Glass wrote:
> Hi Tom,
>
> This includes the lpuart and TI driver-model model conversion, clock
> improvements, the new Python-based test infrastructure and a
> video/console uclass initially implemented for sandbox.
>
>
> The following changes
From: Stephen Warren
PCI controllers should be enumerated at startup so that PCI devices
such as Ethernet controllers are available at startup. Fix board_init_r()
not to skip calling pci_init() when CONFIG_DM_PCI is defined, and provide
an implementation of pci_init() for the
Add support for TPM ST33ZP24 family with i2c.
For i2c we are relying only on DM_I2C.
Reviewed-by: Simon Glass
Signed-off-by: Christophe Ricard
---
Changes in v2:
- Adding Reviewed-by: Simon Glass
README | 7 +
I2C protocol is not standardize for TPM 1.2.
TIS prococol is define by the Trusted Computing Group and potentially
available on several TPMs.
tpm_tis_infineon.h header is not generic enough.
Rename tpm_tis_infineon.h to tpm_tis.h and move infineon specific
defines/variables to tpm_tis_infineon.c
Hi Simon,
After a first tentative in August 2015:
http://lists.denx.de/pipermail/u-boot/2015-August/222596.html
I finally found some spare time for a new round to send a new version patch
version bringing support for ST33ZP24 TPM 1.2 with i2c and spi support.
I have been able to follow all
TPM_TIS_LPC is connected to the LPC bus, not I2C.
Reviewed-by: Simon Glass
Signed-off-by: Christophe Ricard
---
Changes in v2:
- Adding Reviewed-by: Simon Glass
drivers/tpm/Kconfig | 2 +-
1 file changed, 1 insertion(+), 1
Hi Simon,
Please find in this serie one bug fix and a typo cleanup.
This series is only adding mention to your review
Best Regards
Christophe
Changes in v2:
- Adding Reviewed-by: Simon Glass
Christophe Ricard (2):
tpm: Fix fault in case CONFIG_DM_TPM is set without any
In case CONFIG_DM_TPM was set without any TPM chipset configured a fault
was generated (NULL pointer access).
Reviewed-by: Simon Glass
Signed-off-by: Christophe Ricard
---
Changes in v2:
- Adding Reviewed-by: Simon Glass
Add support for TPM ST33ZP24 spi.
The ST33ZP24 does have a spi interface.
The transport protocol is proprietary.
For spi we are relying only on DM_SPI.
Reviewed-by: Simon Glass
Signed-off-by: Christophe Ricard
---
Changes in v2:
- Adding
On Tue, 2016-01-19 at 06:28 +, Dongsheng Wang wrote:
> Hi Scott,
>
> > On Mon, 2016-01-18 at 12:27 +0800, Dongsheng Wang wrote:
> > > From: Wang Dongsheng
> > >
> > > Based on PSCI v1.0, implement interface for ls102xa SoC:
> > > psci_version,
> > > psci_features,
>
On 01/21/2016 01:09 AM, Gong Qianyu wrote:
> 1.Add fixup for fman clock.
> 2.Add fdt_fixup_fman_firmware() to insert the Fman ucode firmware into
> the device tree.
>
> Signed-off-by: Gong Qianyu
> ---
> arch/arm/cpu/armv8/fsl-layerscape/fdt.c | 121
>
On Thu, 2016-01-14 at 04:26 +, Qianyu Gong wrote:
> > -Original Message-
> > From: Scott Wood [mailto:o...@buserror.net]
> > Sent: Thursday, January 14, 2016 8:21 AM
> > To: Qianyu Gong ; u-boot@lists.denx.de
> > Cc: b07...@freescale.com; b48...@freescale.com;
> >
On Thu, 2016-01-14 at 18:06 +, york sun wrote:
> On 01/05/2016 09:00 PM, Prabhakar Kushwaha wrote:
> > kernel_size env variable is defined as 0x2800, it is beyond NOR
> > flash.
> >
> > Update kernel_size with 40MB kernel size.
> >
> > Signed-off-by: Prabhakar Kushwaha
It is convenient to be able to see the status of all regulators in a list.
Add this feature to the 'reg status' command.
Signed-off-by: Simon Glass
---
Changes in v9: None
Changes in v2: None
common/cmd_regulator.c | 66 ++
1
Add a function which produces a flags word from a few common PIN_CONFIG
settings. This is useful for simple pinctrl drivers that don't need to worry
about drive strength, etc.
Signed-off-by: Simon Glass
---
Changes in v9: None
Changes in v2: None
There is sort-of race condition when a pinctrl device is probed. The pinctrl
function is called which may end up using the same device as is being
probed. This results in operations being used before the device is actually
probed.
For now, disallow pinctrl operations on pinctrl devices while
We can use the new clk_get_by_index() function to get the correct clock.
Signed-off-by: Simon Glass
---
Changes in v9: None
Changes in v2:
- Update call to clk_get_by_index()
drivers/i2c/rk_i2c.c | 38 ++
1 file changed, 22 insertions(+),
This hangs when activated (by probing the PMIC). Disable it for now until we
understand the root cause.
Signed-off-by: Simon Glass
---
Changes in v9: None
Changes in v2: None
arch/arm/dts/rk3288-veyron.dtsi | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff
Some rockchip SoCs include video output (VOP). Add a driver to support this.
It can output via a display driver (UCLASS_DISPLAY) and currently HDMI and
eDP are supported.
Signed-off-by: Simon Glass
---
Changes in v2: None
arch/arm/include/asm/arch-rockchip/vop_rk3288.h |
At present the low-level init is skipped on rockchip. Among other things
this means that the instruction cache is left disabled. Fix this.
Signed-off-by: Simon Glass
---
Changes in v2: None
arch/arm/mach-rockchip/board.c| 4
These should match the datasheet naming. Adjust them.
Signed-off-by: Simon Glass
---
Changes in v2: None
arch/arm/include/asm/arch-rockchip/cru_rk3288.h | 58 -
drivers/clk/clk_rk3288.c| 39 -
2 files changed,
Fix spaces in two comments in this file.
Signed-off-by: Simon Glass
---
Changes in v2: None
arch/arm/mach-rockchip/rk3288/sdram_rk3288.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/mach-rockchip/rk3288/sdram_rk3288.c
Turn on the EC and enable the keyboard.
Signed-off-by: Simon Glass
---
Changes in v9:
- Rebase to upstream/master
Changes in v2: None
arch/arm/dts/rk3288-veyron-chromebook.dtsi | 4
configs/chromebook_jerry_defconfig | 8
The current DisplayPort uclass is too specific. The operations it provides
are shared with other types of output devices, such as HDMI and LVDS LCD
displays.
Generalise the uclass so that it can be used with these devices as well.
Adjust the uclass to handle the EDID reading and conversion to
We can make use of the device tree to configure pinctrl settings. Add this
support for the driver so we can use it in U-Boot proper.
Signed-off-by: Simon Glass
---
Changes in v9: None
Changes in v2: None
drivers/pinctrl/rockchip/pinctrl_rk3288.c | 230
This is a shortcut to obtaining a register address. Use it where possible, to
simplify the code.
Signed-off-by: Simon Glass
---
Changes in v2: None
arch/arm/mach-rockchip/rk3288/sdram_rk3288.c | 17 +++--
1 file changed, 3 insertions(+), 14 deletions(-)
diff
Hi,
On 15 January 2016 at 18:18, Simon Glass wrote:
> Hi,
>
> On 15 January 2016 at 08:42, Daniel Schwierzeck
> wrote:
>> Am Freitag, den 15.01.2016, 09:42 -0500 schrieb Tom Rini:
>>> On Fri, Jan 15, 2016 at 10:20:43AM +0800, Jeffy Chen wrote:
On 13 January 2016 at 19:19, Jeffy Chen wrote:
> Add default android gpt partition table for kylin board.
>
> Use "gpt write mmc 0 $partitions" to apply.
>
> Signed-off-by: Jeffy Chen
> Acked-by: Simon Glass
> Reviewed-by:
On 14 January 2016 at 10:17, Simon Glass wrote:
> On 13 January 2016 at 19:19, Jeffy Chen wrote:
>> We will save boot mode flag in grf's os_reg[4], if fastboot
>> requested or fastboot key pressed, try to enter fastboot mode
>> at preboot stage.
>>
On 13 January 2016 at 19:19, Jeffy Chen wrote:
> Call dm_scan_fdt_node() in rk3036 pinctrl uclass binding.
>
> Signed-off-by: Jeffy Chen
> Acked-by: Simon Glass
> Reviewed-by: Tom Rini
> ---
>
>
Hi,
On 12 January 2016 at 02:30, Bhuvanchandra DV
wrote:
> Hi Bin,
>
>
> On 01/12/2016 12:21 PM, Bin Meng wrote:
>>
>> Hi Bhuvanchandra,
>>
>> On Tue, Jan 12, 2016 at 2:43 PM, Bhuvanchandra DV
>> wrote:
>>>
>>> Hi Bin,
>>>
>>>
>>> On
On 14 January 2016 at 10:17, Simon Glass wrote:
> On 13 January 2016 at 19:19, Jeffy Chen wrote:
>> There's a 64K reserved area at the end of the first 4M.
>> Store env there, so we can use fastboot to flash it.
>>
>> Signed-off-by: Jeffy Chen
On 20 January 2016 at 15:15, Stephen Warren wrote:
> From: Stephen Warren
>
> Currently, Spawn.expect() imposes its timeout solely upon receipt of new
> data, not on its overall operation. In theory, this could cause the
> timeout not to fire if U-Boot
On 21 January 2016 at 04:26, Lukasz Majewski wrote:
> Hi Stephen,
>
>> From: Stephen Warren
>>
>> Enhance the UMS test to optionally mount a partition and read/write a
>> file to it, validating that the content written and read back are
>> identical.
Hi,
On 21 January 2016 at 18:39, Bin Meng wrote:
> Hi Stephen,
>
> On Fri, Jan 22, 2016 at 7:35 AM, Stephen Warren wrote:
>> From: Stephen Warren
>>
>> PCI controllers should be enumerated at startup so that PCI devices
>> such as
Hi Stephen,
On 20 January 2016 at 15:15, Stephen Warren wrote:
> From: Stephen Warren
>
> Add various common utility functions. These will be used by a forthcoming
> re-written UMS test, and a brand-new DFU test.
>
> Signed-off-by: Stephen Warren
Hi Bin,
On 21 January 2016 at 21:06, Bin Meng wrote:
> Hi Simon,
>
> On Fri, Jan 22, 2016 at 12:03 PM, Simon Glass wrote:
>> Hi Bin,
>>
>> On 21 January 2016 at 20:53, Bin Meng wrote:
>>> On Fri, Jan 22, 2016 at 11:36 AM, Simon Glass
On Thu, Jan 21, 2016 at 04:35:33PM -0700, Stephen Warren wrote:
> From: Stephen Warren
>
> PCI controllers should be enumerated at startup so that PCI devices
> such as Ethernet controllers are available at startup. Fix board_init_r()
> not to skip calling pci_init() when
At present we use the same peripheral ID for clocks and pinctrl. While this
works it is probably better to use the device tree clock binding ID for
clocks. We can use the clk_get_by_index() function to find this.
Update the clock drivers and the code that uses them.
Signed-off-by: Simon Glass
Implement this so that the GPIO command will be able to report whether a
GPIO is used for input or output.
Signed-off-by: Simon Glass
---
Changes in v9: None
Changes in v2: None
drivers/pinctrl/rockchip/pinctrl_rk3288.c | 68 +++
1 file changed,
To reduce the SPL image size, drop the LED features. Jerry does not have
an LED and we can leave out GPIO support also.
Signed-off-by: Simon Glass
---
Changes in v9: None
Changes in v2: None
configs/chromebook_jerry_defconfig | 5 -
include/configs/chromebook_jerry.h |
Some video bridges will not have GPIOs to control reset, etc. Allow these
to be optional.
Signed-off-by: Simon Glass
---
Changes in v2: None
drivers/video/bridge/video-bridge-uclass.c | 11 +++
1 file changed, 7 insertions(+), 4 deletions(-)
diff --git
Enable HDMI output and a console on firefly.
Signed-off-by: Simon Glass
---
Changes in v2: None
configs/firefly-rk3288_defconfig | 7 +++
include/configs/firefly-rk3288.h | 9 -
2 files changed, 15 insertions(+), 1 deletion(-)
diff --git
LCD panels normally have a backlight which can be controlled to illuminate
the LCD contents. Add a uclass to support this. Initially it only has a
method to enable the backlight.
Signed-off-by: Simon Glass
---
Changes in v2: None
drivers/video/Makefile | 1 +
Now that we have a pretty good GPIO driver, enable the 'gpio' command on all
rockchip boards.
Signed-off-by: Simon Glass
---
Changes in v2: None
include/configs/rk3288_common.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/include/configs/rk3288_common.h
On 19 January 2016 at 21:35, Simon Glass wrote:
> On 18 January 2016 at 21:55, Masahiro Yamada
> wrote:
>> This commit intends to implement "fixed-clock" as in Linux.
>> (drivers/clk/clk-fixed-rate.c in Linux)
>>
>> If you need a very simple
On 21 January 2016 at 15:27, Christophe Ricard
wrote:
> Add support for TPM ST33ZP24 spi.
>
> The ST33ZP24 does have a spi interface.
> The transport protocol is proprietary.
>
> For spi we are relying only on DM_SPI.
>
> Reviewed-by: Simon Glass
>
On 21 January 2016 at 15:19, Christophe Ricard
wrote:
> TPM_TIS_LPC is connected to the LPC bus, not I2C.
>
> Reviewed-by: Simon Glass
> Signed-off-by: Christophe Ricard
> ---
>
> Changes in v2:
> - Adding Reviewed-by:
On 21 January 2016 at 15:27, Christophe Ricard
wrote:
> Add support for TPM ST33ZP24 family with i2c.
>
> For i2c we are relying only on DM_I2C.
>
> Reviewed-by: Simon Glass
> Signed-off-by: Christophe Ricard
> ---
>
>
> -Original Message-
> From: Scott Wood
> Sent: Friday, January 22, 2016 3:30 AM
> To: Qianyu Gong ; u-boot@lists.denx.de;
> r58...@freescale.com
> Cc: mingkai...@freescale.com; jt...@openedev.com; b48...@freescale.com;
> shaohui@freescale.com;
USB protocol allows for 16 IN and 16 OUT endpoints (USB 2.0 Spec,
8.3.2.2 Endpoint Field). A function may have an EP 1 for both IN and OUT,
so these two should be kept separate. As EPs are either BULK or INTERRUPT
(or ISO), it is fine to have one array per direction for all transfer
types (also
This is defined in the device tree in Linux. Copy over the settings so that
this can be used instead of hard-coding the reset line.
Signed-off-by: Simon Glass
---
Changes in v9: None
Changes in v2: None
arch/arm/dts/rk3288-veyron.dtsi| 15 +++
Some devices need special sequences to be used when starting up. Add a
uclass for this. Drivers can be added to provide specific features as
needed.
Signed-off-by: Simon Glass
---
Changes in v9: None
Changes in v2: None
drivers/misc/Kconfig | 18 ++
The currect PMIC debugging is a little confusing. Adjust it so that it is
clear whether the operation succeeded or failed. Also, avoid creating a new
error return value when a perfectly good one is already available.
Signed-off-by: Simon Glass
---
Changes in v9: None
Changes
For some boards the pmic interface is useful but the regulator interface
(which comes with it) is too large. Allow them to be separated such that
SPL can decide which it needs.
Signed-off-by: Simon Glass
---
Changes in v9: None
Changes in v2: None
drivers/power/pmic/Kconfig
This saves some code space in SPL which is useful on jerry.
Signed-off-by: Simon Glass
---
Changes in v9: None
Changes in v2: None
arch/arm/mach-rockchip/rk3288-board-spl.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/mach-rockchip/rk3288-board-spl.c
Add regulator support for the RK808 PMIC. It integrated 4 BUCKs and 8 LDOs
all of which are supported by this driver.
Signed-off-by: Simon Glass
---
Changes in v9: None
Changes in v2: None
drivers/power/regulator/Kconfig | 9 ++
drivers/power/regulator/Makefile | 1 +
The correct pinctrl is handled automatically so we don't need to do it in
the driver. The exception is when we want to use a different chip select
(other than 0). But this isn't used at present.
Signed-off-by: Simon Glass
---
Changes in v9: None
Changes in v2: None
Some Rockchip SoCs support HDMI output. Add a display driver for this so
that these displays can be used on supported boards.
Unfortunately this driver is not fully functional. It cannot reliably read
EDID information over HDMI. This seems to be due to the clocks being
incorrect - the I2C bus
Some regulators will not implement any operations (e.g. fixed regulators).
This is not an error, so allow the autoset process to continue when one
of these regulators is found.
Signed-off-by: Simon Glass
---
Changes in v9: None
Changes in v2: None
This function should return 0 or 1, not a mask. Fix it.
Signed-off-by: Simon Glass
---
Changes in v9: None
Changes in v2: None
drivers/gpio/rk_gpio.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpio/rk_gpio.c b/drivers/gpio/rk_gpio.c
index
101 - 200 of 311 matches
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