Ok to push
From: Ruchika Gupta
Sent: Friday, January 22, 2016 4:42 AM
To: u-boot@lists.denx.de; york sun; Ulises Cardenas
Cc: Ruchika Gupta; Saksham Jain; Ruchika Gupta
Subject: [PATCH] drivers/crypto/fsl : Allocate output ring with
On 26/01/2016 15:01, Ye Li wrote:
> Wrong checking for the base_addr paramter with LCDIF1 and LCDIF2. Always
> enter the -EINVAL return.
>
> Signed-off-by: Ye Li
> ---
> arch/arm/cpu/armv7/mx6/clock.c |4 ++--
> 1 files changed, 2 insertions(+), 2 deletions(-)
>
> diff
On 26/01/2016 15:01, Ye Li wrote:
> The checking with max frequency supported is not correct, because the temp
> is calculated by max pre and post dividers. We can decrease any divider to
> meet the max frequency limitation. Actually, the calculation below the codes
> is doing this way to find
On 01/02/2016 17:24, Fabio Estevam wrote:
> From: Fabio Estevam
>
> As mx6slevk has only one Ethernet port, we don't need
> to declare CONFIG_ETHPRIME, so just remove it.
>
> Signed-off-by: Fabio Estevam
> ---
> include/configs/mx6slevk.h | 1 -
Hi Ye,
On 01/02/2016 03:41, Ye Li wrote:
> The i.MX6SX and i.MX6UL has two ENET controllers, add support for reading
> MAC address from fuse for ENET2.
>
> Signed-off-by: Ye Li
> ---
Applied to u-boot-imx, thanks !
Best regards,
Stefano Babic
--
Refactored data structure for CAAM's job ring and Secure Memory
to support i.MX7.
The new memory map use macros to resolve SM's offset by version.
This will solve the versioning issue caused by the new version of
secure memory of i.MX7
Signed-off-by: Ulises Cardenas
---
Hi Ye,
On 01/02/2016 03:41, Ye Li wrote:
> Initial version for mx6sx SABREAUTO board support with features:
> PMIC, QSPI, NAND flash, SD/MMC, USB, Ethernet, I2C, IO Expander.
>
> Signed-off-by: Ye Li
> ---
> Changes for v3:
> - None
> Changes for v2:
> - None
>
>
On 01/29/2016 01:11 PM, Simon Glass wrote:
> Hi Stephen,
>
> On 29 January 2016 at 11:48, Stephen Warren wrote:
>> On 01/29/2016 11:23 AM, Simon Glass wrote:
>>>
>>> Hi Stephen,
>>>
>>> On 28 January 2016 at 22:08, Stephen Warren wrote:
On
Hi Peng,
On 17/12/2015 05:43, Peng Fan wrote:
> Some boards support booting from different SD card slots.
> For example, mx6dpsabresd board supports booting from SD2,
> SD3, EMMC4, using different boot switch. And the index
> numbers are SD2(0), SD3(1), EMMC4(2).
> But CONFIG_SYS_MMC_ENV_DEV is
On 26/01/2016 15:09, Ye Li wrote:
> The i.MX6SX SABRESD board supports MCIMX28LCD (800x480x24) at LCDIF1
> port, enable this display feature by adding relevant BSP codes
> and configurations.
>
> Signed-off-by: Ye Li
> ---
> board/freescale/mx6sxsabresd/mx6sxsabresd.c | 61
>
On 25/01/2016 04:38, Bin Meng wrote:
> Currently when building mxsboot on certain machines it reports:
>
> HOSTCC tools/mxsboot
> tools/mxsboot.c: In function 'mx28_create_sd_image':
> tools/mxsboot.c:560: warning: implicit declaration of function 'htole32'
> /tmp/cchLIV6q.o: In
From: Stephen Warren
Invoke each "ut"-based unit test as a separate pytest.
Now that the DM unit test runs under test/py, remove the manual shell
script that invokes it.
Signed-off-by: Stephen Warren
---
v2:
- Only run "ut"-based tests, not other
From: Stephen Warren
This information may be useful for both debugging, and processes that want
to perform simple forms of introspection on the U-Boot binary, such as
determining the set of "ut" subtests that are compiled in.
Signed-off-by: Stephen Warren
On 27/01/2016 06:01, Bhuvanchandra DV wrote:
> Changes since v3:
> - Add missing space in device tree.
> - Reorder the patchset to avoid broken state.
>
> Changes since v2:
> - Split the patch for updating the license string.
> - Reorder the patchset to avoid broken state.
>
> Changes since
On 01/02/2016 14:15, Fabio Estevam wrote:
> From: Fabio Estevam
>
> Since commit 59370f3fcd1350 ("net: phy: delay only if reset handler is
> registered") Ethernet is no longer functional.
>
> This commit does not have an issue in itself, but it revelead a problem
> with
On 01/02/2016 14:19, Fabio Estevam wrote:
> From: Fabio Estevam
>
> According to the LAN8720 datasheet tpurstd (time that reset line should
> stay asserted) is 25ms.
>
> So do as suggested by the LAN8720 datasheet.
>
> Signed-off-by: Fabio Estevam
On 30/01/2016 04:53, Peng Fan wrote:
> From: Ye Li
>
> The BOOTCFG value used by bmode for SABRESD eMMC boot are actually for SD
> card.
> Fixed the value to correct one.
>
> Signed-off-by: Ye Li
> Signed-off-by: Peng Fan
> Reviewed-by:
Hi Bin,
On 2 February 2016 at 08:02, Bin Meng wrote:
> Hi Albert,
>
> On Tue, Feb 2, 2016 at 5:53 PM, Albert ARIBAUD
> wrote:
>> Hello Bin and Simon,
>>
>> On Tue, 2 Feb 2016 15:25:48 +0800, Bin Meng wrote:
>>> Hi Simon,
>>>
On Wed, Feb 3, 2016 at 12:01 AM, Jagan Teki wrote:
> On 1 February 2016 at 21:49, Simon Glass wrote:
>> On 1 February 2016 at 02:40, Bin Meng wrote:
>>> The ICH SPI controller supports two variants, one of which is ICH7
>>> compatible
On Tue, Feb 2, 2016 at 11:55 PM, Jagan Teki wrote:
> On 1 February 2016 at 21:49, Simon Glass wrote:
>> On 1 February 2016 at 02:40, Bin Meng wrote:
>>> At present ich spi driver gets the controller version information via
>>> pch, but
On Tue, Feb 2, 2016 at 11:54 PM, Jagan Teki wrote:
> On 1 February 2016 at 21:49, Simon Glass wrote:
>> On 1 February 2016 at 02:40, Bin Meng wrote:
>>>
>>> This cleans up the ich spi driver a little bit:
>>> - Remove struct
On Tue, Feb 2, 2016 at 12:19 AM, Simon Glass wrote:
> On 1 February 2016 at 02:40, Bin Meng wrote:
>> Implement get_gpio_base op for bd82x6x, pch7 and pch9 drivers.
>>
>> Signed-off-by: Bin Meng
>> ---
>>
>>
On Tue, Feb 2, 2016 at 12:19 AM, Simon Glass wrote:
> On 1 February 2016 at 02:40, Bin Meng wrote:
>> x86 GPIO registers are accessed via I/O port whose base address is
>> configured in a PCI configuration register on the PCH device. Add
>> an op
On Tue, Feb 2, 2016 at 12:19 AM, Simon Glass wrote:
> On 1 February 2016 at 02:40, Bin Meng wrote:
>> Unprotecting SPI flash is now handled in the SPI controller driver,
>> via a call to the PCH driver. Drop the ad-hoc version.
>>
>> Signed-off-by: Bin Meng
On Tue, Feb 2, 2016 at 12:19 AM, Simon Glass wrote:
> On 1 February 2016 at 02:40, Bin Meng wrote:
>> pch_get_version op was only used by the ich spi controller driver,
>> and does not really provide a good identification of pch controller
>> so far, since
On Tue, Feb 2, 2016 at 12:19 AM, Simon Glass wrote:
> On 1 February 2016 at 02:40, Bin Meng wrote:
>> On some newer chipset (eg: BayTrail), there is an IO base address
>> register on the PCH device which configures the base address of a
>> memory-mapped I/O
On Tue, Feb 2, 2016 at 12:19 AM, Simon Glass wrote:
> On 1 February 2016 at 02:40, Bin Meng wrote:
>> Unprotecting SPI flash is now handled in the SPI controller driver,
>> via a call to the PCH driver. Drop the ad-hoc version.
>>
>> Signed-off-by: Bin Meng
On Tue, Feb 2, 2016 at 12:19 AM, Simon Glass wrote:
> On 1 February 2016 at 02:40, Bin Meng wrote:
>> Spell out 'sbase' to 'spi_base' so that it looks clearer.
>>
>> Signed-off-by: Bin Meng
>> ---
>>
>> arch/x86/cpu/ivybridge/bd82x6x.c
On Tue, Feb 2, 2016 at 12:20 AM, Simon Glass wrote:
> On 1 February 2016 at 02:40, Bin Meng wrote:
>> asm/arch/gpio.h is not needed anymore as we get the GPIO base from
>> PCH driver.
>>
>> Signed-off-by: Bin Meng
>> ---
>>
>>
On Tue, Feb 2, 2016 at 12:20 AM, Simon Glass wrote:
> On 1 February 2016 at 02:40, Bin Meng wrote:
>> Once we get udevice of IGD and SDVO, we can use its udevice to
>> access PCI configuration space with dm_pci_write_config32().
>>
>> Signed-off-by: Bin
On Tue, Feb 2, 2016 at 12:20 AM, Simon Glass wrote:
> On 1 February 2016 at 02:40, Bin Meng wrote:
>> Now that we have irq router's udevice passed as a parameter, it's
>> time to start using the DM PCI API instead of those legacy ones.
>>
>> Signed-off-by:
On Tue, Feb 2, 2016 at 12:20 AM, Simon Glass wrote:
> On 1 February 2016 at 02:40, Bin Meng wrote:
>> At present this GPIO driver still uses the legacy PCI API. Now that
>> we have proper PCH drivers we can use those to obtain the information
>> we need.
On Tue, Feb 2, 2016 at 12:20 AM, Simon Glass wrote:
> On 1 February 2016 at 02:40, Bin Meng wrote:
>> There is no need to parse PCH's property as we have already
>> a DM PCI API dm_pci_get_bdf() that can handle this.
>>
>> Signed-off-by: Bin Meng
On Tue, Feb 2, 2016 at 12:20 AM, Simon Glass wrote:
> On 1 February 2016 at 02:40, Bin Meng wrote:
>> IOBASE is now obtained from PCH driver, drop this property.
>>
>> Signed-off-by: Bin Meng
>> ---
>>
>> arch/x86/dts/minnowmax.dts |
On Tue, Feb 2, 2016 at 12:20 AM, Simon Glass wrote:
> On 1 February 2016 at 02:40, Bin Meng wrote:
>> So far disable_igd() does not have any return value, but we may need
>> that in the future.
>>
>> Signed-off-by: Bin Meng
>> ---
>>
>>
On Tue, Feb 2, 2016 at 12:19 AM, Simon Glass wrote:
> On 1 February 2016 at 02:40, Bin Meng wrote:
>> IO_BASE is only seen on PCH9 device, implement the get_io_base op.
>>
>> Signed-off-by: Bin Meng
>> ---
>>
>> drivers/pch/pch9.c | 17
On Tue, Feb 2, 2016 at 12:20 AM, Simon Glass wrote:
> On 1 February 2016 at 02:40, Bin Meng wrote:
>> At present irq_router is declared as a static struct irq_router in
>> arch/x86/cpu/irq.c. Since it's a driver control block, it makes sense
>> to move it
On Tue, Feb 2, 2016 at 12:20 AM, Simon Glass wrote:
> On 1 February 2016 at 02:40, Bin Meng wrote:
>> Now that we have converted all x86 codes to use DM PCI APIs,
>> drop those legacy ones.
>>
>> Signed-off-by: Bin Meng
>>
>> ---
>>
>>
On Tue, Feb 2, 2016 at 12:20 AM, Simon Glass wrote:
> On 1 February 2016 at 02:40, Bin Meng wrote:
>> Use pci_[read|write]_config intead of x86_pci_[read|write]_config.
>>
>> Signed-off-by: Bin Meng
>> ---
>>
>>
On Tue, Feb 2, 2016 at 12:20 AM, Simon Glass wrote:
> On 1 February 2016 at 02:40, Bin Meng wrote:
>> Drop legacy PCI APIs usage in pci_assign_irqs() as well.
>>
>> Signed-off-by: Bin Meng
>> ---
>>
>> arch/x86/cpu/pci.c | 6 +++---
>>
On Tue, Feb 2, 2016 at 12:20 AM, Simon Glass wrote:
> Hi Bin,
>
> On 1 February 2016 at 02:40, Bin Meng wrote:
>> With recent DM PCI changes to vesa_fb driver, external graphics
>> card does not work any more. This is because: after setting the
>> function
Hi Simon,
On Wed, Feb 3, 2016 at 12:31 PM, Simon Glass wrote:
> Hi Bin,
>
> On 2 February 2016 at 08:02, Bin Meng wrote:
>> Hi Albert,
>>
>> On Tue, Feb 2, 2016 at 5:53 PM, Albert ARIBAUD
>> wrote:
>>> Hello Bin and Simon,
>>>
Hi there,
i can osberve same strange thing on Xilinx ZYNQ.
But really strange is:
I'm having a couple of USB-sticks on my desk, about 5pcs.
Exactly one of them is working without any trouble.
My testfile is ~16MB, with the magic usb-stick i can read the whole 16MB
without errors.
With all
On 24.11.2015 09:34, Josh Wu wrote:
> Also if minimum ecc requirment is bigger then what we support, then just
> use our maxium pmecc support.
> But it is not safe, so we'll output a warning about this.
>
> Signed-off-by: Josh Wu
Reviewed-by: Andreas Bießmann
We should count skipped blocks in when calculating write offset.
Signed-off-by: Jeffy Chen
---
common/image-sparse.c | 31 ---
1 file changed, 8 insertions(+), 23 deletions(-)
diff --git a/common/image-sparse.c b/common/image-sparse.c
Hello,
On 01/29/2016 07:23 PM, Simon Glass wrote:
Hi Przymyslaw,
On 15 January 2016 at 09:35, Stephen Warren wrote:
On 01/15/2016 03:41 AM, Przemyslaw Marczak wrote:
Hello Simon,
On 01/14/2016 06:17 PM, Simon Glass wrote:
Hi Przemyslaw, Stephen,
On 13 January
Hi Simon,
On Mon, Feb 01, 2016 at 05:05:18PM -0700, Simon Glass wrote:
>Hi Peng,
>
>On 31 January 2016 at 22:38, Peng Fan wrote:
>> Introudce i.MX7 pinctrl driver support.
>> For now only i.MX7D supported.
>> There are two iomux controllers in i.MX7D, iomuxc and
On 24.11.2015 09:34, Josh Wu wrote:
> 1. add the pmecc register mapping for sama5d2.
> 2. add the pmecc error location register mapping for sama5d2.
> 3. add some new field that is different from old ip.
> 4. add sama5d2 pmecc ip version number.
>
> Signed-off-by: Josh Wu
Hi Wenyou,
On 02.02.2016 03:31, Wenyou Yang wrote:
> To reduce the duplicated code, add a new file to accommodate
> the peripheral's and system's clock handle code, shared with
> the SoCs with different ARM core.
>
> Signed-off-by: Wenyou Yang
> Tested-by: Heiko Schocher
On 01.02.2016 11:18, Wenyou Yang wrote:
> The sama5d2 Xplained SPL supports the boot medias: spi flash
> and SD Card.
>
> Signed-off-by: Wenyou Yang
Reviewed-by: Andreas Bießmann
> ---
> This patch is base on [U-Boot] [PATCH v3 0/3] arm:
Hi Simon,
On Mon, Feb 01, 2016 at 05:05:05PM -0700, Simon Glass wrote:
>Hi Peng,
>
>On 31 January 2016 at 22:38, Peng Fan wrote:
>> Introduce pinctrl for i.MX6
>> 1. pinctrl-imx.c is for common usage. It's used by i.MX6/7.
>> 2. Add PINCTRL_IMX PINCTRL_IMX6 Kconfig entry.
On Tue, Feb 02, 2016 at 03:45:02AM +0100, Alexander Graf wrote:
> When an EFI application runs, it has access to a few descriptor and callback
> tables to instruct the EFI compliant firmware to do things for it. The bulk
> of those interfaces are "boot time services". They handle all object
>
On 01/27/2016 07:26 PM, Måns Rullgård wrote:
> writes:
>
>> From: Dinh Nguyen
>>
>> The picoseconds to register value divisor(ps_to_regval) should be 60 and not
>> 200. Linux has KSZ9031_PS_TO_REG defined to be 60 as well. 60 is
Hi
9c11135 image: fix getenv_bootm_size() function breaks the bootz
command for me on a custom hardware (very similar to mx6sxsabresd but
with only 256MB RAM). I don't have bootm_size or bootm_low defined.
After reading zImage and dtb from serial flash I run
=> bootz 0x8080 - 0x8300
Hi Albert,
On Tue, Feb 2, 2016 at 5:53 PM, Albert ARIBAUD
wrote:
> Hello Bin and Simon,
>
> On Tue, 2 Feb 2016 15:25:48 +0800, Bin Meng wrote:
>> Hi Simon,
>>
>> On Tue, Feb 2, 2016 at 11:58 AM, Simon Glass wrote:
>> > +Bin
Hello Bin and Simon,
On Tue, 2 Feb 2016 15:25:48 +0800, Bin Meng wrote:
> Hi Simon,
>
> On Tue, Feb 2, 2016 at 11:58 AM, Simon Glass wrote:
> > +Bin (sorry, meant to copy you before)
> >>> For non-FSP devices we don't init the RAM until much later -
>
Hello Masahiro,
On Tue, 2 Feb 2016 15:45:13 +0900, Masahiro Yamada
wrote:
> This macro is referenced from common/spl/spl.c
Nitpick: not a macro, but an enum value.
Amicalement,
--
Albert.
___
U-Boot mailing list
Hi Heiko,
Please find below comments.
> With the new dfu_mtd layer, now dfu supports reading/writing
> to mtd partitions, found on mtd devices. With this approach
> it is also possible to read/write to concatenated mtd
> devices.
>
> Signed-off-by: Heiko Schocher
>
> ---
> This
enable net driver model for k2l evm as keystone_net supports
driver model
Signed-off-by: Mugunthan V N
Reviewed-by: Tom Rini
Acked-by: Joe Hershberger
---
configs/k2l_evm_defconfig | 1 +
1 file changed, 1 insertion(+)
diff
enable net driver model for k2e evm as keystone_net supports
driver model
Signed-off-by: Mugunthan V N
Reviewed-by: Tom Rini
Acked-by: Joe Hershberger
---
configs/k2e_evm_defconfig | 1 +
1 file changed, 1 insertion(+)
diff
Creating a branch with a Series-notes and running buildman
on that branch results in a buildman error of the form
"TypeError: cannot concatenate 'str' and 'list' objects".
This "series" fixes that by initializing series.notes as an
array, not a scalar. This is a single and short patch which
would
This enum is referenced from common/spl/spl.c.
Signed-off-by: Masahiro Yamada
---
Changes in v2:
- s/macro/enum/
arch/arm/include/asm/spl.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/include/asm/spl.h b/arch/arm/include/asm/spl.h
index
2016-02-02 19:03 GMT+09:00 Albert ARIBAUD :
> Hello Masahiro,
>
> On Tue, 2 Feb 2016 15:45:13 +0900, Masahiro Yamada
> wrote:
>> This macro is referenced from common/spl/spl.c
>
> Nitpick: not a macro, but an enum value.
>
> Amicalement,
Dear Wenyou Yang,
Wenyou Yang writes:
>The sama5d2 Xplained SPL supports the boot medias: spi flash
>and SD Card.
>
>Signed-off-by: Wenyou Yang
>Reviewed-by: Andreas Bießmann
>---
>This patch is base on [U-Boot] [PATCH
Dear Wenyou Yang,
Wenyou Yang writes:
>To remove the unnecessary #ifdef-endif, use the mpddrc IP version
>to check whether or not the interleaved decoding type is supported.
>
>Signed-off-by: Wenyou Yang
>Reviewed-by: Andreas Bießmann
Hello Simon,
> >> Hmm, actually I've had to drop this as it breaks 'Series-version'.
> >> That currently does not expect a list.
> >
> > Hmm, I can't reproduce this here. How do you trigger the Series-version
> > break?
>
> I created a commit with a Series-version: in it. Then, running patman
>
Hi Andreas,
> -Original Message-
> From: Andreas Bießmann [mailto:andreas.de...@googlemail.com]
> Sent: 2016年2月2日 16:23
> To: Yang, Wenyou ; U-Boot Mailing List b...@lists.denx.de>
> Cc: Heiko Schocher ; andreas.de...@googlemail.com
> Subject: Re:
A patman series with a 'Series-notes' section causes
buildman to crash with:
self.series.notes += self.section
TypeError: cannot concatenate 'str' and 'list' objects
Fix by initializing series.notes as a one-element array
rather than a scalar.
Signed-off-by: Albert ARIBAUD
Hi Tom,
I want to use this patch as a prerequisite of my next patch series.
This patch is trivial enough, so can you apply it to u-boot/master soon?
Or, may I include this in my series?
2016-02-02 15:45 GMT+09:00 Masahiro Yamada :
> This macro is referenced from
Add keystone net DT support for k2g evm.
Signed-off-by: Mugunthan V N
Reviewed-by: Tom Rini
Acked-by: Joe Hershberger
---
arch/arm/dts/k2g-evm.dts| 12
arch/arm/dts/k2g-netcp.dtsi | 151
enable net driver model for k2g evm as keystone_net supports
driver model
Signed-off-by: Mugunthan V N
Reviewed-by: Tom Rini
Acked-by: Joe Hershberger
---
configs/k2g_evm_defconfig | 1 +
1 file changed, 1 insertion(+)
diff
Dear Josh Wu,
Josh Wu writes:
>1. add the pmecc register mapping for sama5d2.
>2. add the pmecc error location register mapping for sama5d2.
>3. add some new field that is different from old ip.
>4. add sama5d2 pmecc ip version number.
>
>Signed-off-by: Josh Wu
Dear Wenyou Yang,
Wenyou Yang writes:
>The DDR3-SDRAM initialization sequence is implemented in
>accordance with the DDR3-SRAM/DDR3L-SDRAM initialization section
>described in the SAMA5D2 datasheet.
>
>Add registers and definitions of mpddrc controller, which is used
>to
Dear Josh Wu,
Josh Wu writes:
>Also if minimum ecc requirment is bigger then what we support, then just
>use our maxium pmecc support.
>But it is not safe, so we'll output a warning about this.
>
>Signed-off-by: Josh Wu
>Acked-by: Scott Wood
Dear Wenyou Yang,
Wenyou Yang writes:
>Add struct atmel_mpddrc_config to accommodate the mpddrc register
>configurations, not using the mpddrc register map structure,
>struct atmel_mpddrc, in order to increase readability and reduce
>run-time memory use.
>
>Signed-off-by:
Set free_count to zero before walking through ai->erase list
in wl_init().
As U-Boot has no workqueue/threads, it immediately calls
erase_worker(), which increase for each erased block
free_count. Without this patch, free_count gets after
this initialized to zero in wl_init(), so the free_count
Adopt keystone_net driver to adopt device driver model
Signed-off-by: Mugunthan V N
Reviewed-by: Tom Rini
---
drivers/net/keystone_net.c | 473 +
1 file changed, 433 insertions(+), 40 deletions(-)
diff --git
remove board_eth_init when CONFIG_DM_ETH is defined
Signed-off-by: Mugunthan V N
Reviewed-by: Tom Rini
Acked-by: Joe Hershberger
---
board/ti/ks2_evm/board.c | 2 ++
1 file changed, 2 insertions(+)
diff --git
enable net driver model for k2hk evm as keystone_net supports
driver model
Signed-off-by: Mugunthan V N
Reviewed-by: Tom Rini
Acked-by: Joe Hershberger
---
configs/k2hk_evm_defconfig | 1 +
1 file changed, 1 insertion(+)
diff
This patch series enables keystone net to adopt driver model. This
has been tested on the following evms (logs [1]) by tftp zImage
from server.
* k2hk evm
* k2l evm
* k2e evm
* k2g evm
Also pushed a branch for testing [2]
Changes from v2:
* Added driver remove to cleanup MDIO allocations
* added
When Micrel phy is selected without CONFIG_PHY_MICREL_KSZ9031 or
CONFIG_PHY_MICREL_KSZ9021 there is a build error. Fixing this
by adding proper ifdefs
drivers/net/phy/micrel.c:370:39: error: array type has incomplete element type
static const struct ksz90x1_reg_field ksz9031_ctl_grp[] =
Hello Lukasz,
Am 02.02.2016 um 11:06 schrieb Lukasz Majewski:
Hi Heiko,
Please find below comments.
With the new dfu_mtd layer, now dfu supports reading/writing
to mtd partitions, found on mtd devices. With this approach
it is also possible to read/write to concatenated mtd
devices.
Hello,
I'm using U-Boot on a custom i.MX6 board and I'm having problems while
reading (large) files from USB thumb drives.
I wouldn't really mind if this only happened with some specific USB
device, but the problem occurs with 3 out of 4 tested thumb drives while
loading a 100M test file.
The
Ping!
On 01/27/2016 10:31 AM, Bhuvanchandra DV wrote:
Changes since v3:
- Add missing space in device tree.
- Reorder the patchset to avoid broken state.
Changes since v2:
- Split the patch for updating the license string.
- Reorder the patchset to avoid broken state.
Changes since v1:
-
On Tue, Feb 02, 2016 at 02:41:09AM +, york sun wrote:
> Tom,
>
> The following changes since commit 8cdae1dacde7dbe74d53a8ac1a05761a53c4f191:
>
> video: Correct 'tor' typo in comment (2016-01-30 10:58:47 +0100)
>
> are available in the git repository at:
>
>
On Tue, Feb 02, 2016 at 12:52:49PM +0100, Andreas Bießmann wrote:
> Hi Tom,
>
> please pull these changes into u-boot/master ... eventually before tagging
> rc1 ;)
>
> Andreas
>
> The following changes since commit 9e4de7fd4acc8f99b6d383c711d21c0159849629:
>
> Merge branch 'master' of
On 25 January 2016 at 22:33, Bhuvanchandra DV
wrote:
> Remove the legacy way of enabling UART, GPIO and SPI on Vybrid
> based boards since these driver's now only supports DT mode.
>
> Signed-off-by: Bhuvanchandra DV
Reviewed-by: Jagan
On Tuesday, February 02, 2016 at 05:28:42 PM, Fabio Estevam wrote:
> Adding Marek in case he has any ideas.
>
> On Tue, Feb 2, 2016 at 8:35 AM, Schrempf Frieder
>
> wrote:
> > Hello,
> >
> > I'm using U-Boot on a custom i.MX6 board and I'm having problems while
> >
> Am 02.02.2016 um 18:28 schrieb Tom Rini :
>
>> On Tue, Feb 02, 2016 at 03:55:17PM +, Mark Rutland wrote:
>>> On Tue, Feb 02, 2016 at 03:45:10AM +0100, Alexander Graf wrote:
>>> On arm64, boards can declare that they want to run with dcache disabled.
>>>
>>> However,
Hello
Simon Glass wrote:
> I'm sorry if you have not heard about this before. I sent out an email
> to all maintainers some months ago.
> You are listed as the maintainer of a few boards which use the
> serial_s3c24x0.c serial driver. We are trying to convert all of these
> drivers to driver
Adding Marek in case he has any ideas.
On Tue, Feb 2, 2016 at 8:35 AM, Schrempf Frieder
wrote:
> Hello,
>
> I'm using U-Boot on a custom i.MX6 board and I'm having problems while
> reading (large) files from USB thumb drives.
> I wouldn't really mind if this only
This function is for local use in the file.
Signed-off-by: Masahiro Yamada
---
arch/arm/mach-uniphier/boot-mode/boot-mode-proxstream2.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/mach-uniphier/boot-mode/boot-mode-proxstream2.c
This block provides clock and reset control for peripherals such as
UART, I2C, IC card, etc.
Signed-off-by: Masahiro Yamada
---
arch/arm/dts/uniphier-common32.dtsi| 6 ++
arch/arm/dts/uniphier-ph1-ld4.dtsi | 6 ++
Specify clocks properties to the EHCI nodes.
Signed-off-by: Masahiro Yamada
---
arch/arm/dts/uniphier-ph1-ld4.dtsi | 3 +++
arch/arm/dts/uniphier-ph1-pro4.dtsi | 2 ++
arch/arm/dts/uniphier-ph1-sld3.dtsi | 4
arch/arm/dts/uniphier-ph1-sld8.dtsi | 3 +++
4
Masahiro Yamada (13):
ARM: uniphier: change stack pointer address for SPL
ARM: uniphier: create early page table at run-time
ARM: uniphier: add missing static qualifier
ARM: uniphier: support USB boot mode for ProXstream2 / PH1-LD6b SoC
clk: uniphier: add Media I/O clock driver for
This is a system control block mainly used for clock and reset control.
Signed-off-by: Masahiro Yamada
---
arch/arm/dts/uniphier-common32.dtsi| 8
arch/arm/dts/uniphier-ph1-ld4.dtsi | 4
arch/arm/dts/uniphier-ph1-pro4.dtsi| 4
Currently, what this driver does is just to set the base address and
reset/clock handling. The latter is cared by the clock driver now.
There is nothing special for this EHCI controller.
I want to use the generic-ehci driver rather than bothering to convert
this driver to Driver Model.
On Tuesday, February 02, 2016 at 01:11:38 PM, Masahiro Yamada wrote:
> Currently, what this driver does is just to set the base address and
> reset/clock handling. The latter is cared by the clock driver now.
> There is nothing special for this EHCI controller.
>
> I want to use the generic-ehci
This block provides clock and reset control for MIO (Media I/O)
hardware blocks such as USB2.0, SD card, eMMC, etc.
Signed-off-by: Masahiro Yamada
---
arch/arm/dts/uniphier-common32.dtsi| 6 ++
arch/arm/dts/uniphier-ph1-ld4.dtsi | 6 ++
These pin mux settings are cared by the pinctrl driver.
Remove the ad-hoc code.
Signed-off-by: Masahiro Yamada
---
arch/arm/mach-uniphier/pinctrl/pinctrl-ph1-ld4.c | 9 -
arch/arm/mach-uniphier/pinctrl/pinctrl-ph1-pro4.c | 7 ---
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