On 05/23/2016 04:49 AM, Zhiqiang Hou wrote:
> From: Hou Zhiqiang
>
> If the PSCI and PPA is ready, skip the fixup for spin-table and
> waking secondary cores. If not, change SMP method to spin-table,
> and the device node of PSCI will be removed.
I don't see how you change
On 05/19/2016 01:23 AM, Hongbo Zhang wrote:
> On Wed, May 18, 2016 at 6:39 PM, Andre Przywara
> wrote:
>> Hi,
>>
>> On 18/05/16 10:10, macro.wav...@gmail.com wrote:
>>> From: Hongbo Zhang
>>>
>> ...
>>
>>> static int fdt_psci(void *fdt)
>>> {
On 14 May 2016 at 14:03, Simon Glass wrote:
> Enable CONFIG_BLK to move to using driver model for block devices. This
> affects MMC booting in SPL, as well as MMC access in U-Boot proper.
>
> Signed-off-by: Simon Glass
> ---
>
>
On 14 May 2016 at 14:03, Simon Glass wrote:
> This small change tidies up the code slightly.
>
> Signed-off-by: Simon Glass
> ---
>
> drivers/mmc/mmc.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
Applied to u-boot-dm.
Hi Tom,
This improves the driver-model block support in MMC, brings in a
mailbox uclass and fixes/improves a few minor things in the rockchip
support.
The following changes since commit 6523dbf7cce8d8c903346f756e0e41e46ce6d6b9:
Merge branch 'master' of git://git.denx.de/u-boot-mips
On 15 May 2016 at 02:21, Alexander Graf wrote:
>
>
> On 14.05.16 22:03, Simon Glass wrote:
>> This code does not currently build with driver model enabled for block
>> devices. Update it to correct this.
>>
>> Signed-off-by: Simon Glass
>
> Reviewed-by:
On 14 May 2016 at 14:03, Simon Glass wrote:
> Add support for using driver model for block devices in this driver.
>
> Signed-off-by: Simon Glass
> ---
>
> drivers/mmc/dw_mmc.c | 42 --
> include/dwmmc.h | 7
On 14 May 2016 at 14:03, Simon Glass wrote:
> Allow driver model to be used for block devices in SPL.
>
> Signed-off-by: Simon Glass
> ---
>
> common/spl/spl_mmc.c | 9 -
> 1 file changed, 4 insertions(+), 5 deletions(-)
Applied to u-boot-dm.
On 14 May 2016 at 14:03, Simon Glass wrote:
> Update sdhci.c so that it works with driver model enabled for block devices.
>
> Signed-off-by: Simon Glass
> ---
>
> drivers/mmc/sdhci.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
Applied to
On 14 May 2016 at 14:03, Simon Glass wrote:
> Allow driver model to be used for block devices in the rockchip mmc driver.
>
> Signed-off-by: Simon Glass
> ---
>
> drivers/mmc/rockchip_dw_mmc.c | 31 +++
> 1 file changed, 31
On 14 May 2016 at 14:03, Simon Glass wrote:
> Update the MMC environment code so that it works with driver-model enabled
> for block devices.
>
> Signed-off-by: Simon Glass
> ---
>
> common/env_mmc.c | 8
> 1 file changed, 4 insertions(+), 4
On 14 May 2016 at 14:03, Simon Glass wrote:
> When these functions are not compiled in, we still need to declare the
> correct function signature to avoid a build warnings in SPL. Fix this.
>
> Signed-off-by: Simon Glass
> ---
>
> drivers/mmc/mmc_private.h
On 14 May 2016 at 14:03, Simon Glass wrote:
> This is not currently used and saves a little over 1KB of SPL image size.
>
> Signed-off-by: Simon Glass
> ---
>
> include/configs/rk3288_common.h | 1 -
> 1 file changed, 1 deletion(-)
Applied to u-boot-dm.
On 14 May 2016 at 14:03, Simon Glass wrote:
> While we consider whether to drop use of DT in SPL, remove some unwanted
> properties. This reduces SPL size by about 250 bytes.
>
> Signed-off-by: Simon Glass
> ---
>
> configs/firefly-rk3288_defconfig | 2 +-
>
On 14 May 2016 at 14:03, Simon Glass wrote:
> Enable this option to correct display artifacts when a write-back cache is
> in use.
>
> Signed-off-by: Simon Glass
> ---
>
> drivers/video/rockchip/rk_vop.c | 1 +
> 1 file changed, 1 insertion(+)
Applied to
On 14 May 2016 at 14:02, Simon Glass wrote:
> We need a correct name (rk3288, rk3036) so check this to avoid a crash
> later.
>
> Signed-off-by: Simon Glass
> ---
>
> tools/rkimage.c | 7 +--
> 1 file changed, 1 insertion(+), 6 deletions(-)
Applied to
On 14 May 2016 at 14:02, Simon Glass wrote:
> We don't need an int since no value is over 80. This saves a small amount of
> SPL space (about 44 bytes).
>
> Signed-off-by: Simon Glass
> ---
>
> drivers/mmc/mmc.c | 2 +-
> 1 file changed, 1 insertion(+), 1
On 14 May 2016 at 14:02, Simon Glass wrote:
> This function is no longer used.
>
> Signed-off-by: Simon Glass
> ---
>
> drivers/mmc/mmc.c | 9 -
> include/mmc.h | 1 -
> 2 files changed, 10 deletions(-)
Applied to u-boot-dm.
On 14 May 2016 at 14:02, Simon Glass wrote:
> All boards that use MMC define CONFIG_GENERIC_MMC now, so we can drop this
> old code.
>
> Signed-off-by: Simon Glass
> ---
>
> cmd/mmc.c | 62
> ---
>
On 14 May 2016 at 14:02, Simon Glass wrote:
> This adds to code size and is not needed, since hang() will print a message.
>
> Signed-off-by: Simon Glass
> ---
>
> drivers/misc/reset-uclass.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
Applied
On 16 May 2016 at 03:29, Stefan Roese wrote:
>
> On 14.05.2016 22:02, Simon Glass wrote:
>>
>> - Rename 'w' to 'width' to make it more obvious what it is used for
>> - Use bool and int types instead of char to avoid register-masking on
>> 32-bit machines
>>
>> Signed-off-by: Simon
On 16 May 2016 at 03:31, Stefan Roese wrote:
> On 14.05.2016 22:02, Simon Glass wrote:
>>
>> Add a simple version of this function for SPL. It does not check the
>> buffer
>> size as this would add to the code size.
>>
>> Signed-off-by: Simon Glass
>
>
>
Hi Tom,
Here's a rebased version of the last pull request.
The following changes since commit 6523dbf7cce8d8c903346f756e0e41e46ce6d6b9:
Merge branch 'master' of git://git.denx.de/u-boot-mips (2016-05-25
20:22:48 -0400)
are available in the git repository at:
On 05/14/2016 01:32 AM, Prabhakar Kushwaha wrote:
> QorIQ LS1012A Development System (LS1012AQDS) is a high-performance
> development platform, with a complete debugging environment.
> The LS1012AQDS board supports the QorIQ LS1012A processor and is
> optimized to support the high-bandwidth DDR3L
Am 27.05.2016 um 16:40 schrieb Marek Vasut:
> On 05/27/2016 04:34 PM, Paul Burton wrote:
>> On Fri, May 27, 2016 at 04:32:26PM +0200, Marek Vasut wrote:
>>> On 05/27/2016 12:36 PM, Paul Burton wrote:
On Thu, May 26, 2016 at 06:10:38PM +0200, Marek Vasut wrote:
>> diff --git
On Fri, May 27, 2016 at 04:40:07PM +0200, Marek Vasut wrote:
> > Hi Marek,
>
> Hi!
Hi again Marek :)
> > We're already using the cache size auto-detection on Malta, and on 2
> > other FPGA-based boards internally. I've submitted v2 which preserves
> > CONFIG_SYS_CACHELINE_SIZE as a synonym of
On Fri, May 27, 2016 at 04:36:21PM +0200, Marek Vasut wrote:
> > The problem is that then both that function & its callers would need to
> > know about the types of cache ops, and there'd need to be some mapping
> > from flags to the actual cache op values (of which there'll be a couple
> > more
Hi Stephen,
On 25 May 2016 at 11:57, Stephen Warren wrote:
>
> On 05/23/2016 09:39 AM, Simon Glass wrote:
>>
>> On 14 May 2016 at 13:33, Simon Glass wrote:
>>>
>>> On 13 May 2016 at 15:50, Stephen Warren wrote:
From:
On 05/27/2016 12:30 PM, Paul Burton wrote:
> On Thu, May 26, 2016 at 06:13:17PM +0200, Marek Vasut wrote:
>> On 05/26/2016 05:58 PM, Paul Burton wrote:
>>> The various cache maintenance routines perform a number of loops over
>>> cache lines. Rather than duplicate the code for performing such
On 05/27/2016 04:34 PM, Paul Burton wrote:
> On Fri, May 27, 2016 at 04:32:26PM +0200, Marek Vasut wrote:
>> On 05/27/2016 12:36 PM, Paul Burton wrote:
>>> On Thu, May 26, 2016 at 06:10:38PM +0200, Marek Vasut wrote:
> diff --git a/arch/mips/lib/cache.c b/arch/mips/lib/cache.c
> index
On Fri, May 27, 2016 at 04:32:26PM +0200, Marek Vasut wrote:
> On 05/27/2016 12:36 PM, Paul Burton wrote:
> > On Thu, May 26, 2016 at 06:10:38PM +0200, Marek Vasut wrote:
> >>> diff --git a/arch/mips/lib/cache.c b/arch/mips/lib/cache.c
> >>> index 7482005..7695325 100644
> >>> ---
On 05/27/2016 12:36 PM, Paul Burton wrote:
> On Thu, May 26, 2016 at 06:10:38PM +0200, Marek Vasut wrote:
>>> diff --git a/arch/mips/lib/cache.c b/arch/mips/lib/cache.c
>>> index 7482005..7695325 100644
>>> --- a/arch/mips/lib/cache.c
>>> +++ b/arch/mips/lib/cache.c
>>> @@ -9,7 +9,7 @@
>>>
On 05/18/2016 02:29 PM, Prabhakar Kushwaha wrote:
-Original Message-
From: U-Boot [mailto:u-boot-boun...@lists.denx.de] On Behalf Of
Alexander Graf
Sent: Friday, May 13, 2016 5:52 PM
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH 1/5] ls2080: Exit dpaa only right before exiting U-
Traditionally the DFU support is available only
as part 2nd stage boot loader(u-boot) and DFU
is not supported in SPL.
The SPL-DFU feature is useful for boards which has
only USB inteface and do not have external interface
like ethernet or MMC/SD to boot the board.
This patch add DFU support in
Traditionally the DFU support is available only
as part 2nd stage boot loader(u-boot) and DFU
is not supported in SPL.
The SPL-DFU feature is useful for boards which has
only USB inteface and do not have external interface
like ethernet or MMC/SD to boot the board.
This patch adds DFU support in
On 05/27/2016 03:31 PM, Daniel Schwierzeck wrote:
> Those wrappers for linker symbols were once used in the MIPS
> specific board.c implementation. Since the migration to generic
> board.c, those wrappers are dead code and can be removed.
>
> Signed-off-by: Daniel Schwierzeck
On 05/27/2016 03:39 PM, Ravi Babu wrote:
> Traditionally the DFU support is available only
> as part 2nd stage boot loader(u-boot) and DFU
> is not supported in SPL.
>
> The SPL-DFU feature is useful for boards which has
> only USB inteface and do not have external interface
> like ethernet or
Add generic spl-dfu function in common-spl, specific
implemention for configuring dfu memory device is
done in platform board specific source file.
Signed-off-by: Ravi Babu
---
common/spl/spl.c | 11 +++
include/spl.h|1 +
2 files changed, 12 insertions(+)
Adding SPL-DFU support for dra7x platform. The DFU
support for dra7x includes QSPI, MMC/SD and eMMC
memory devices. The SPL-DFU memory devices can be
selected through meunconfig->Boot Images.
Signed-off-by: Ravi Babu
---
board/ti/dra7xx/evm.c | 20
Adding support functions to run dfu commands
with support for eMMC/MMC/SD memory device.
Signed-off-by: Ravi Babu
---
drivers/dfu/dfu.c | 28
drivers/dfu/dfu_mmc.c | 28
include/dfu.h |8
3
Add tune Kconfig option for MIPS 34kc.
Signed-off-by: Daniel Schwierzeck
---
arch/mips/Kconfig | 3 +++
arch/mips/Makefile | 1 +
2 files changed, 4 insertions(+)
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index abaeaf0..a929452 100644
---
Adding ext4/fat filesytem support for SPL-DFU to
write ext4/fat files to eMMC, MMC/SD device
Signed-off-by: Ravi Babu
---
cmd/Makefile|9 +
common/Makefile |4 +++-
fs/Makefile | 12 +++-
3 files changed, 23 insertions(+), 2 deletions(-)
diff
Hey all,
So, when I said a few months back that we would try doing a 2 month
release cycle, I planned things out until the v2016.07 release, since
that coincided with the old schedule. As I was looking at the
ReleaseCycle page today I didn't want to give anyone the wrong
impression so I've added
Those wrappers for linker symbols were once used in the MIPS
specific board.c implementation. Since the migration to generic
board.c, those wrappers are dead code and can be removed.
Signed-off-by: Daniel Schwierzeck
---
arch/mips/include/asm/u-boot-mips.h | 21
The various cache maintenance routines perform a number of loops over
cache lines. Rather than duplicate the code for performing such loops,
abstract it out into a new cache_loop macro which performs an arbitrary
number of cache ops on a range of addresses. This reduces duplication in
the existing
Allow L1 Icache & L1 Dcache line size to be specified separately, since
there's no architectural mandate that they be the same. The
[id]cache_line_size functions are tidied up to take advantage of the
fact that the Kconfig entries are always present to simply check them
for zero rather than
This short series cleans up the MIPS cache code in preparation for
introducing support for L2 cache support. It's hopefully a useful
standalone cleanup as-is, so I'll submit it now.
Applies atop u-boot-mips/next as of 43aaa7696cd7.
Paul Burton (3):
MIPS: Move cache sizes to Kconfig
MIPS:
Move details of the L1 cache line sizes & total sizes into Kconfig,
defaulting to 0. A new CONFIG_SYS_CACHE_SIZE_AUTO Kconfig entry is
introduced to allow platforms to select auto-detection of cache sizes,
and it defaults to being enabled if none of the cache sizes are set by
the configuration
On 05/26/2016 01:39 PM, Alexey Brodkin wrote:
> Hi Marek,
Hi!
> On Fri, 2016-04-15 at 15:49 +0200, Marek Vasut wrote:
>> On 04/15/2016 03:00 PM, Alexey Brodkin wrote:
>>> Cache management functions should be implemented per arch or platform and so
>>> that they match requirements of underlying
On 05/27/2016 03:21 PM, Daniel Schwierzeck wrote:
>
>
> Am 27.05.2016 um 14:42 schrieb Marek Vasut:
>> On 05/27/2016 02:09 PM, Daniel Schwierzeck wrote:
>>>
>>>
>>> Am 26.05.2016 um 20:43 schrieb Marek Vasut:
From: Paul Burton
Add header with SPL boot mode
Am 27.05.2016 um 14:42 schrieb Marek Vasut:
> On 05/27/2016 02:09 PM, Daniel Schwierzeck wrote:
>>
>>
>> Am 26.05.2016 um 20:43 schrieb Marek Vasut:
>>> From: Paul Burton
>>>
>>> Add header with SPL boot mode and type definitions.
>>>
>>> Signed-off-by: Marek Vasut
On 05/27/2016 12:03 PM, Daniel Schwierzeck wrote:
>
>
> Am 26.05.2016 um 17:17 schrieb Marek Vasut:
>> On 05/26/2016 03:28 PM, Daniel Schwierzeck wrote:
>>> Provide a default linker script for SPL binaries. Start address
>>> and size of text section and BSS section are configurable. All
>>>
On 05/27/2016 07:14 AM, Sriram Dash wrote:
>> -Original Message-
>> From: Marek Vasut [mailto:ma...@denx.de]
>> Sent: Thursday, May 26, 2016 5:51 PM
>> To: Sriram Dash ; u-boot@lists.denx.de
>> Cc: york sun ; albert.u.b...@aribaud.net; Rajesh Bhagat
On 05/27/2016 07:14 AM, Sriram Dash wrote:
>> -Original Message-
>> From: Marek Vasut [mailto:ma...@denx.de]
>> Sent: Thursday, May 26, 2016 5:49 PM
>> To: Sriram Dash ; u-boot@lists.denx.de
>> Cc: york sun ; albert.u.b...@aribaud.net; Rajesh Bhagat
On 05/27/2016 02:09 PM, Daniel Schwierzeck wrote:
>
>
> Am 26.05.2016 um 20:43 schrieb Marek Vasut:
>> From: Paul Burton
>>
>> Add header with SPL boot mode and type definitions.
>>
>> Signed-off-by: Marek Vasut
>> Cc: Daniel Schwierzeck
Am 26.05.2016 um 20:43 schrieb Marek Vasut:
> From: Paul Burton
>
> Add header with SPL boot mode and type definitions.
>
> Signed-off-by: Marek Vasut
> Cc: Daniel Schwierzeck
> Cc: Paul Burton
>
> -Original Message-
> From: York Sun [mailto:york@nxp.com]
> Sent: Thursday, May 19, 2016 4:28 AM
> To: Shengzhou Liu ; u-boot@lists.denx.de
> Subject: Re: [U-Boot] [PATCH v2] armv8/ls2080ardb: Update DDR timing to
> support more UDIMMs
> >
>
> Shengzhou,
>
Am 26.05.2016 um 18:12 schrieb Marek Vasut:
> On 05/26/2016 05:58 PM, Paul Burton wrote:
>> Allow L1 Icache & L1 Dcache line size to be specified separately, since
>> there's no architectural mandate that they be the same. The
>> [id]cache_line_size functions are tidied up to take advantage of
Am 26.05.2016 um 15:49 schrieb Paul Burton:
> Both real Malta boards & emulators that mimic Malta (eg. QEMU) can
> support MIPS64 CPUs. Allow MIPS64 builds of U-Boot for such boards,
> which enables the user to make use of the whole 64 bit address space.
>
> Signed-off-by: Paul Burton
Am 26.05.2016 um 15:49 schrieb Paul Burton:
> Fix the pcnet driver to build safely on 64 bit platforms, in preparation
> for allowing MIPS64 builds for Malta boards.
>
> Signed-off-by: Paul Burton
> ---
>
> Changes in v2: None
>
> drivers/net/pcnet.c | 18
Am 26.05.2016 um 15:49 schrieb Paul Burton:
> Use CPHYSADDR to implement the virt_to_phys function for converting from
> a virtual to a physical address for MIPS32, much as is already done for
> MIPS64. This allows for virt_to_phys to work regardless of whether the
> address being translated is
Am 26.05.2016 um 15:49 schrieb Paul Burton:
> Now that MIPS virt_to_phys can handle kseg1 addresses on MIPS32, stop
> manually converting addresses to their kseg0 equivalents in the pcnet
> driver.
>
> Signed-off-by: Paul Burton
>
> ---
>
> Changes in v2:
> - New
Am 26.05.2016 um 18:32 schrieb Paul Burton:
> If dev->iobase is 64 bits wide then writing the value of the BAR into a
> pointer to iobase will not work on big endian systems, where the BAR
> value will incorrectly get written to the upper 32 bits of the 64 bit
> variable. Fix this by reading the
On Thu, May 26, 2016 at 06:10:38PM +0200, Marek Vasut wrote:
> > diff --git a/arch/mips/lib/cache.c b/arch/mips/lib/cache.c
> > index 7482005..7695325 100644
> > --- a/arch/mips/lib/cache.c
> > +++ b/arch/mips/lib/cache.c
> > @@ -9,7 +9,7 @@
> > #include
> > #include
> >
> > -#ifdef
On Thu, May 26, 2016 at 06:13:17PM +0200, Marek Vasut wrote:
> On 05/26/2016 05:58 PM, Paul Burton wrote:
> > The various cache maintenance routines perform a number of loops over
> > cache lines. Rather than duplicate the code for performing such loops,
> > abstract it out into a new cache_loop
When a payload calls our memory allocator with the exact address hint, we
happily allocate memory from completely unpopulated regions. Payloads however
expect this to only succeed if they would be allocating from free conventional
memory.
This patch makes the logic behind those checks a bit more
Am 26.05.2016 um 17:17 schrieb Marek Vasut:
> On 05/26/2016 03:28 PM, Daniel Schwierzeck wrote:
>> Provide a default linker script for SPL binaries. Start address
>> and size of text section and BSS section are configurable. All
>> sections are arranged in a way that only relevant sections are
Simplify board file by enabling CMD_NAND via Kconfig.
Signed-off-by: Michal Simek
---
configs/xilinx_zynqmp_ep_defconfig | 1 +
configs/xilinx_zynqmp_zc1751_xm016_dc2_defconfig | 1 +
include/configs/xilinx_zynqmp.h | 1 -
3 files
The device tree overlays are a good way to deal with user-modifyable
boards or boards with some kind of an expansion mechanism where we can
easily plug new board in (like the BBB or the raspberry pi).
However, so far, the usual mechanism to deal with it was to have in Linux
some driver detecting
The device tree overlays are a good way to deal with user-modifyable
boards or boards with some kind of an expansion mechanism where we can
easily plug new board in (like the BBB, the Raspberry Pi or the CHIP).
Add a new function to merge overlays with a base device tree.
Signed-off-by: Maxime
This adds a bunch of unit tests for the "fdt apply" command.
They've all been run successfully in the sandbox. However, as you still
require an out-of-tree dtc with overlay support, this is disabled by
default.
Signed-off-by: Maxime Ripard
---
Makefile
vsprintf.h doesn't include the stdarg.h file, which means that it relies on
the files that include vsprintf.h to include stdarg.h as well.
Add an explicit include to avoid build errors when simply including that
file.
Signed-off-by: Maxime Ripard
---
Implement a macro based on fdt_first_property_offset and
fdt_next_property_offset that provides a convenience to iterate over all
the properties of a given node.
Signed-off-by: Maxime Ripard
---
include/libfdt.h | 24
1 file changed, 24
Having dashes as a separator in the DTB name is a quite common practice.
However, the current code to generate objects from DTBs assumes the
separator is an underscore, leading to a compilation error when building a
device tree with dashes.
Replace all the dashes in the DTB name to generate the
Add a function to retrieve the highest phandle in a given device tree.
Signed-off-by: Maxime Ripard
---
include/libfdt.h| 13 +
lib/libfdt/fdt_ro.c | 15 +++
2 files changed, 28 insertions(+)
diff --git a/include/libfdt.h
The libfdt overlay support introduces a bunch of new includes and
functions.
Make sure we are able to build it by adding the needed glue.
Signed-off-by: Maxime Ripard
---
include/libfdt_env.h | 7 +++
1 file changed, 7 insertions(+)
diff --git
Hi,
The device tree overlays are a great solution to the issue raised by
the bunch expandable boards we find everywhere these days, like the
Beaglebone, Raspberry Pi or CHIP.
However, most of the time, the overlays are applied through a
mechanism involving the firmware request interface in
The current code only checks if the fdt subcommand is fdt addr by checking
whether it starts with 'a'.
Since this is a pretty widely used letter, narrow down that check a bit.
Signed-off-by: Maxime Ripard
---
cmd/fdt.c | 2 +-
1 file changed, 1 insertion(+), 1
> -Original Message-
> From: Teddy Reed [mailto:teddy.r...@gmail.com]
> Sent: Friday, May 27, 2016 3:46 AM
> To: Sumit Garg
> Cc: U-Boot Mailing List ; Ruchika Gupta
>
> Subject: Re: [U-Boot] [PATCH v2 1/2] powerpc/mpc85xx:
>-Original Message-
>From: Marek Vasut [mailto:ma...@denx.de]
>Sent: Thursday, May 26, 2016 5:49 PM
>To: Sriram Dash ; u-boot@lists.denx.de
>Cc: york sun ; albert.u.b...@aribaud.net; Rajesh Bhagat
>
>Subject: Re: [PATCH 2/5]
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