Hi,
> On Aug 18, 2017, at 6:31 PM, Robert Nelson wrote:
>
>> On Fri, Aug 18, 2017 at 4:28 PM, Vikas MANOCHA wrote:
>> Hi Bo,
>>
>>> -Original Message-
>>> From: Bo Shen [mailto:voice.s...@gmail.com]
>>> Sent: Thursday, August 17, 2017
On Tue, Aug 15, 2017 at 03:21:15PM +0200, Wolfgang Denk wrote:
> Dear Tom,
>
> In message <20170815113952.GE20467@bill-the-cat> you wrote:
> >
> > What CONFIG_STANDALONE_LOAD_ADDR is, is the location that we want
> > hello_world, or other example stand alone applications loaded into
> > memory
On Fri, Aug 18, 2017 at 4:28 PM, Vikas MANOCHA wrote:
> Hi Bo,
>
>> -Original Message-
>> From: Bo Shen [mailto:voice.s...@gmail.com]
>> Sent: Thursday, August 17, 2017 10:07 PM
>> To: Robert Nelson ; Vikas MANOCHA
>>
On Thu, Aug 17, 2017 at 10:09:10AM +0200, Wolfgang Denk wrote:
> Dear Tom,
>
> a quick check reveals that we have a very large number (4,300+) files
> in the U-Boot tree have no SPDX license tags, or - even worse - no
> license information at all.
>
> I think this should be cleaned up. And I
Tested-by: Pau Pajuelo
2017-08-17 3:09 GMT+02:00 Ladislav Michl :
> From: Pau Pajuelo
>
> Update igep00x0 code with the following features:
> - Add board and revision detection for the boards:
> - IGEP0020-RF
> - IGEP0020-RC
> -
Tested-by: Pau Pajuelo
2017-08-17 3:06 GMT+02:00 Ladislav Michl :
> Avoid cluttering board file with CONFIG_SPL_BUILD ifdefs
> by moving SPL related functions into separate file.
>
> Signed-off-by: Ladislav Michl
> ---
>
Hi ladis,
2017-08-17 3:05 GMT+02:00 Ladislav Michl :
> Hi Pau,
>
> code with your patch "igep00x0: merge igep0020 and igep0030 defconfigs to
> igep00x0_defconfig" applied no longer fits to sram (and patch even does
> not apply anymore), so here's an update:
> - move spl
On 08/18/2017 01:37 AM, Madalin Bucur wrote:
> Signed-off-by: Madalin Bucur
> ---
> board/freescale/ls1043aqds/eth.c | 1 +
> board/freescale/ls1046aqds/eth.c | 1 +
> 2 files changed, 2 insertions(+)
>
Together with https://patchwork.ozlabs.org/patch/803094/, this
On 08/18/2017 01:36 AM, Madalin Bucur wrote:
> The old logic always enabled the TX-delay when the phy-mode was set to
> PHY_INTERFACE_MODE_RGMII. With this patch we enable the TX delay for
> PHY_INTERFACE_MODE_RGMII_ID and PHY_INTERFACE_MODE_RGMII_TXID and
> disable it for
Hi Bo,
> -Original Message-
> From: Bo Shen [mailto:voice.s...@gmail.com]
> Sent: Thursday, August 17, 2017 10:07 PM
> To: Robert Nelson ; Vikas MANOCHA
>
> Cc: U-Boot-Denx ; Christophe PRIOUZEAU
>
Hi Simon
On Fri, Jul 28, 2017 at 1:27 PM, Jaehoon Chung wrote:
> Dear Simon,
>
> On 07/05/2017 04:31 AM, Simon Glass wrote:
>> At present SCSI support for driver model works only with PCI controllers.
>>
>> This series makes the following changes:
>>
>> - Adjusts
Hi Hannes,
On Friday 18 Aug 2017 10:07:19 Hannes Schmelzer wrote:
> Laurent Pinchart schrieb am 04.08.2017 23:23:19:
>
> Hi Laurent,
>
> as told a few days ago i'm now coming back to this issue.
Thank you.
> > (I'm not subscribed to the list, please keep me CC'ed on replies)
>
> subscribing
On 07/19/2017 03:34 PM, Arun Parameswaran wrote:
> Added the AFE (Analog Front End) settings for stability to the
> Broadcom Cygnus phy. This improves the time take to perform
> auto negotiation.
>
> Signed-off-by: Arun Parameswaran
> ---
>
Hi,
W dniu 18.08.2017 o 14:45, Philipp Tomsich pisze:
On Thu, 17 Aug 2017, Paweł Jarosz wrote:
Add basic Rockchip nand driver.
Driver in current state has 16, 24, 40, 60 per 1024B BCH/ECC ability
and 8 bit asynchronous flash interface support. Other features will
come later.
On 08/18/2017 10:16 AM, Marek Vasut wrote:
> On 08/17/2017 09:31 AM, Ran Wang wrote:
>> USB High Speed (HS) EYE Height Adjustment
>> USB HS speed eye diagram fails with the default value at
>> many corners, particularly at a high temperature
>>
>> Optimal eye at TXREFTUNE value to 1001 is
On 08/18/2017 06:12 PM, York Sun wrote:
> +Marek
>
> Marek,
>
> This patch set is to add errata workarounds for FSL SoCs, not to USB
> driver. I intend to merge them for next release.
It'd be nice to see the patch too ...
> On 08/17/2017 12:48 AM, Ran Wang wrote:
>> USB High Speed (HS) EYE
On 08/17/2017 09:31 AM, Ran Wang wrote:
> USB High Speed (HS) EYE Height Adjustment
> USB HS speed eye diagram fails with the default value at
> many corners, particularly at a high temperature
>
> Optimal eye at TXREFTUNE value to 1001 is observed, change
> set the same value.
>
>
> The description for eMMC/SDIO/SDMMC src is not correct,
> update the CRU_CLKSEL11_CON value definition according to TRM.
>
> Signed-off-by: Kever Yang
> Acked-by: Philipp Tomsich
> Reviewed-by: Philipp Tomsich
> The DRAM start address is not 0, so need to update the last bank size
> as:
> DRAM start addr + DRAM_SIZE - last bank start addr
>
> Signed-off-by: Kever Yang
> Acked-by: Philipp Tomsich
> Reviewed-by: Philipp Tomsich
> There are two same gmac node, remove one.
>
> Signed-off-by: Kever Yang
> Reviewed-by: Simon Glass
> Reviewed-by: Philipp Tomsich
> Acked-by: Philipp Tomsich
> ---
>
> The dts from kernel is using rk3228-pinctrl as compatible name,
> need to sync with it to make the driver work.
>
> Signed-off-by: Kever Yang
> Reviewed-by: Philipp Tomsich
> Acked-by: Philipp Tomsich
> Fix the IOMUX setting for SDcard CMD pin at the same time.
>
> Signed-off-by: Kever Yang
> Reviewed-by: Philipp Tomsich
> Acked-by: Philipp Tomsich
> ---
>
> Changes in v2: None
>
>
> fdtdec.h is included, but not used in rk3399-board-spl.c: remove the
> '#include'-statement.
>
> Signed-off-by: Philipp Tomsich
> Acked-by: Philipp Tomsich
> ---
>
> arch/arm/mach-rockchip/rk3399-board-spl.c | 1 -
> Remove a comment claiming that this driver only supports the RK3288,
> as we also use it on the RK3368, RK3399 and (most likely) on other
> variants.
>
> Signed-off-by: Philipp Tomsich
> ---
>
> drivers/gpio/rk_gpio.c | 1 -
> 1 file changed, 1
> This adds OF_LIVE and BOOTSTAGE support for the RK3368-uQ7 and
> regenerates the defconfig (picking up a few changes/reorderings) from
> upstream Kconfig changes.
>
> Signed-off-by: Philipp Tomsich
> ---
>
> configs/lion-rk3368_defconfig | 9 +++--
>
> Update the pinctrl driver for the RK3368 to support a live device tree.
>
> Signed-off-by: Philipp Tomsich
> ---
>
> drivers/pinctrl/rockchip/pinctrl_rk3368.c | 3 +--
> 1 file changed, 1 insertion(+), 2 deletions(-)
>
Acked-by: Philipp Tomsich
> Update the Rockchip GPIO-bank driver to support a live tree.
>
> Signed-off-by: Philipp Tomsich
> ---
>
> drivers/gpio/rk_gpio.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
Acked-by: Philipp Tomsich
> To support bootstage recording, we want to mark our DM timer as the
> tick-timer; this triggers the support for 'trying harder' to read the
> timer in the Rockchip DM timer driver, even if the device model isn't
> ready yet.
>
> Signed-off-by: Philipp Tomsich
> Update the Rockchip I2C driver to support livetree.
>
> Signed-off-by: Philipp Tomsich
> ---
>
> drivers/i2c/rk_i2c.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
Acked-by: Philipp Tomsich
> Unfortunately, the integrated macphy default is enabled, which will
> increase power consuming, if we do not use this PHY. So let's disable
> it at first, which will save power consuming. If we really use it, then
> enable it in driver level.
>
> Signed-off-by: David Wu
> Update the Rockchip SPI driver to support a live device tree.
>
> Signed-off-by: Philipp Tomsich
> ---
>
> drivers/spi/rk_spi.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
Acked-by: Philipp Tomsich
> To support fastboot "fastboot reboot-bootloader" cmd.
>
> Signed-off-by: Kever Yang
> Reviewed-by: Simon Glass
> ---
>
> arch/arm/mach-rockchip/rk322x-board.c | 15 +++
> 1 file changed, 15 insertions(+)
>
Acked-by: Philipp Tomsich
> Update the Rockchip SDHCI wrapper to support a live device tree.
>
> Signed-off-by: Philipp Tomsich
> ---
>
> drivers/mmc/rockchip_sdhci.c | 3 +--
> 1 file changed, 1 insertion(+), 2 deletions(-)
>
Acked-by: Philipp Tomsich
> Remove header file includes that have been left over after the
> conversion to livetree-support.
>
> Signed-off-by: Philipp Tomsich
> ---
>
> drivers/power/pmic/rk8xx.c | 2 --
> 1 file changed, 2 deletions(-)
>
Acked-by: Philipp Tomsich
> To make the Rockchip DM timer driver useful for the timing of
> bootstages, we need a few enhancements:
> - This implements timer_get_boot_us.
> - This avoids reinitialising the timer, if it has already been
>set up (e.g. by our TPL and SPL stages). Now, we have a single
>timebase
> With dtoc emitting fdt64_t for addresses (and region sizes), the array
> indices for accessing the reg[] array needs to be adjusted. This
> adjusts the Rockchip DM timer driver to correctly handle OF_PLATDATA
> given this new structure layout.
>
> Signed-off-by: Philipp Tomsich
On 08/17/2017 12:48 AM, Ran Wang wrote:
> The default setting for USB High Speed Squelch Threshold results
> in a threshold close to or lower than 100mV. This leads to Receiver
> Compliance test failure for a 100mV threshold.
>
> The changes shift the threshold from ~100mV woards ~130mV resulting
> For timing our bootstages on the RK3368, which has a minimal TPL
> (and where we consequently don't want to time the bootstages) and a
> full-featured SPL (where we can bootstage recording), we need to
> adjust the Makefile.
>
> Use the $(SPL_TPL_) macro in the Makefile for bootstage.o
>
>
> With dtoc emitting fdt64_t for addresses (and region sizes), the
> array indices for accessing the reg[] array needs to be adjusted.
> This adjusts the clk_rk3368 driver to correctly handle OF_PLATDATA
> given this new structure layout.
>
> Signed-off-by: Philipp Tomsich
> This patch adds USB configs to support the USB OTG port(consist
> of DWC2 controller) and the USB Host port(consist of EHCI and OHCI
> controllers) on evb-rv1108 board, and also support fastboot over
> USB and USB mass storage.
>
> Signed-off-by: William Wu
>
> This patch implements board_usb_init() for dwc2 gadget, it
> generally called from do_fastboot to do dwc2 udc probe and
> support fastboot over USB.
>
> Signed-off-by: William Wu
> ---
> board/rockchip/evb_rv1108/evb_rv1108.c | 47
>
> With the new 32/64bit-aware dtoc, the type of reg is fdt64_t and the
> OF_PLATDATA structure layout changes. This adjusts the DMC driver for
> the RK3368 to track these changes.
>
> For the time being (i.e. until regmap_init_mem_platdata works for the
> 64bit case), we won't use
+Marek
Marek,
This patch set is to add errata workarounds for FSL SoCs, not to USB
driver. I intend to merge them for next release.
On 08/17/2017 12:48 AM, Ran Wang wrote:
> USB High Speed (HS) EYE Height Adjustment
> USB HS speed eye diagram fails with the default value at
> many corners,
> Update the Rockchip timer driver to support a live device tree.
>
> Signed-off-by: Philipp Tomsich
> ---
>
> drivers/timer/rockchip_timer.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
Acked-by: Philipp Tomsich
> Update the Rockchip-specific wrapper for the Designware driver to
> support a live device tree.
>
> Signed-off-by: Philipp Tomsich
> ---
>
> drivers/mmc/rockchip_dw_mmc.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
Acked-by: Philipp
> fastboot have a command "reboot-bootloader" which require the boot
> loader to reboot and get into fastboot mode again.
>
> Signed-off-by: Kever Yang
> Reviewed-by: Simon Glass
> ---
>
> arch/arm/mach-rockchip/rk3399/rk3399.c | 14 ++
> Update the clock driver for the RK3368 to support a live device tree.
>
> Signed-off-by: Philipp Tomsich
> ---
>
> drivers/clk/rockchip/clk_rk3368.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
Acked-by: Philipp Tomsich
> The RK3368 TPL stage always returns to the BootROM, so it has no need
> for the eMMC, SD and SPI nodes. This marks those nodes (that should
> be included in SPL, but not TPL) as 'u-boot,dm-spl'.
>
> Signed-off-by: Philipp Tomsich
> ---
>
>
> fdtdec.h is included, but not used in rk3399-board-spl.c: remove the
> '#include'-statement.
>
> Signed-off-by: Philipp Tomsich
> ---
>
> arch/arm/mach-rockchip/rk3399-board-spl.c | 1 -
> 1 file changed, 1 deletion(-)
>
Acked-by: Philipp Tomsich
> The sysreset driver for rk322x is ready but not enabled,
> add it to Makefile to make sure it's enabled.
>
> Signed-off-by: Kever Yang
> Reviewed-by: Simon Glass
> Reviewed-by: Philipp Tomsich
> ---
>
>
> U-Boot fastboot, kernel may reboot with parameter which require
> bootloader to get into different boot mode, detect it and enter
> proper mode.
>
> Signed-off-by: Kever Yang
> Reviewed-by: Simon Glass
> ---
>
>
> This patch implements board_usb_init() for dwc2 gadget, it
> generally called from do_fastboot to do dwc2 udc probe and
> support fastboot over USB.
>
> Signed-off-by: William Wu
> ---
> board/rockchip/evb_rv1108/evb_rv1108.c | 47
>
> This patch adds USB OTG/EHCI/OHCI nodes for evb-rv1108 USB ports.
>
> Signed-off-by: William Wu
> Reviewed-by: Simon Glass
> ---
> arch/arm/dts/rv1108-evb.dts | 22 ++
> arch/arm/dts/rv1108.dtsi| 24
> This patch adds USB configs to support the USB OTG port(consist
> of DWC2 controller) and the USB Host port(consist of EHCI and OHCI
> controllers) on evb-rv1108 board, and also support fastboot over
> USB and USB mass storage.
>
> Signed-off-by: William Wu
> ---
>
> dw_mmc supports two transfer modes in u-boot: idma and fifo.
> This patch adds autodetection of transfer mode and eliminates setting this in
> host config struct
>
> Signed-off-by: PaweÅ Jarosz
> ---
> Changes since v1:
> - none
>
> Changes since v2:
> - none
>
>
> Sysreset drivers for rk3066 and rk3188 contain common elements which can be
> reused.
>
> Signed-off-by: PaweÅ Jarosz
> ---
> Changes since v1:
> - none
>
> Changes since v2:
> - none
>
> Changes since v3:
> - none
>
>
> We need to get into preboot once we detect that we are not
> get into normal boot.
>
> Signed-off-by: Kever Yang
> Reviewed-by: Simon Glass
> ---
>
> include/configs/rk3399_common.h | 2 ++
> 1 file changed, 2 insertions(+)
>
Acked-by: Philipp
> This patch enables support for the Rockchip RK3066 SD/MMC controller, which
> is based on Designware IP. The device supports SD, SDIO, MMC and eMMC.
>
> Signed-off-by: PaweÅ Jarosz
> Reviewed-by: Jaehoon Chung
> ---
> Changes since v1:
> -
> This patch adds USB OTG/EHCI/OHCI nodes for evb-rv1108 USB ports.
>
> Signed-off-by: William Wu
> ---
> arch/arm/dts/rv1108-evb.dts | 22 ++
> arch/arm/dts/rv1108.dtsi| 24
> 2 files changed, 46 insertions(+)
>
> This patch allows building of nand_bbt, nand_ids, nand_util for nand drivers
> that need it.
>
> Signed-off-by: PaweÅ Jarosz
> ---
> Changes since v1:
> - none
>
> Changes since v2:
> - none
>
> Changes since v3:
> - none
>
> drivers/mtd/nand/Makefile | 3 +++
>
> rk3xxx.dtsi is used by rk3188 and rk3066. rk3188 uses alocated data in spl
> but rk3066 needs it in tpl.
>
> Signed-off-by: PaweÅ Jarosz
> ---
> Changes since v1:
> - none
>
> Changes since v2:
> - none
>
> Changes since v3:
> - none
>
>
> Use live tree functions to fill dwc2_plat_otg_data structure in
> board_usb_init.
>
> Signed-off-by: PaweÅ Jarosz
> ---
> Changes since v1:
> - none
>
> Changes since v2:
> - none
>
> Changes since v3:
> - none
>
> arch/arm/mach-rockchip/rk3066-board.c | 52
>
> In current state dfu depends on cmd/mtdparts.c which isn't build in SPL.
> This patch resolves it by cutting out unwanted code in SPL build.
>
> Signed-off-by: PaweÅ Jarosz
> ---
> Changes since v1:
> - none
>
> Changes since v2:
> - none
>
> Changes since v3:
> -
> Add basic Rockchip nand driver.
>
> Driver in current state has 16, 24, 40, 60 per 1024B BCH/ECC ability and 8
> bit asynchronous flash interface support. Other features will come later.
>
> Signed-off-by: PaweÅ Jarosz
> ---
> Changes since v1:
> - none
>
>
> The Rockchip boot ROM requires a particular file format for booting from NAND:
>
> * It starts with 512-byte, rc4 encoded header and is aligned to nand page size
>
> * Then first 2KB of first stage loader (tpl) aligned to nand page size
> * n empty pages
>
> * second 2KB of first stage loader
> Sandisk SDTNQGAMA is a 8GB size, 3.3V 8 bit chip with 16KB page size, 1KB
> write size and 40 bit ecc support
>
> Signed-off-by: PaweÅ Jarosz
> ---
> Changes since v1:
> - none
>
> Changes since v2:
> - none
>
> Changes since v3:
> - none
>
>
> The dts from kernel is using rk3228-pinctrl as compatible name,
> need to sync with it to make the driver work.
>
> Signed-off-by: Kever Yang
> Reviewed-by: Philipp Tomsich
> ---
>
> Changes in v2:
> - split this patch in two
> Fix the IOMUX setting for SDcard CMD pin at the same time.
>
> Signed-off-by: Kever Yang
> Reviewed-by: Philipp Tomsich
> ---
>
> Changes in v2: None
>
> drivers/pinctrl/rockchip/pinctrl_rk322x.c | 2 +-
> 1 file changed, 1
s/notes/nodes
Signed-off-by: Anatolij Gustschin
---
lib/Kconfig| 4 ++--
tools/dtoc/dtb_platdata.py | 2 +-
2 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/lib/Kconfig b/lib/Kconfig
index 8163617..d73052d 100644
--- a/lib/Kconfig
+++ b/lib/Kconfig
Wadim,
> On 18 Aug 2017, at 15:28, Philipp Tomsich
> wrote:
>
>> Read SoM information from EEPROM and set ethaddr in late init.
>>
>> Signed-off-by: Wadim Egorov
>> Acked-by: Philipp Tomsich
>>
To understand what is happening in OpenProtocol or LocateProtocol
it is necessary to know the protocol interface GUID.
Let's write a debug message.
Cc: Rob Clark
Signed-off-by: Heinrich Schuchardt
---
v4:
use %pUl format string
correct
Macro EFI_CALL was introduced to call an UEFI function.
Unfortunately it does not support return values.
Most UEFI functions have a return value.
So let's rename EFI_CALL to EFI_CALL_VOID and introduce a
new EFI_CALL macro that supports return values.
Cc: Rob Clark
On Fri, Aug 18, 2017 at 3:35 AM, Madalin Bucur wrote:
> The old logic always enabled the TX-delay when the phy-mode was set to
> PHY_INTERFACE_MODE_RGMII. With this patch we enable the TX delay for
> PHY_INTERFACE_MODE_RGMII_ID and PHY_INTERFACE_MODE_RGMII_TXID and
>
Dear Lukasz,
In message <1503004378-4745-1-git-send-email-lu...@denx.de> you wrote:
> Signed-off-by: Lukasz Majewski
> ---
> doc/README.dfutftp | 8
> 1 file changed, 8 insertions(+)
Thanks!
Reviewed-by: Wolfgang Denk
Best regards,
Wolfgang Denk
--
Simon Glass writes:
> This target stops us using 'env' as a subdirectory. It is not mentioned in
> the help so seems to be an internal target. Rename it.
>
> Signed-off-by: Simon Glass
> Reviewed-by: Tom Rini
> ---
>
> Changes in v5:
> There are two same gmac node, remove one.
>
> Signed-off-by: Kever Yang
> Reviewed-by: Simon Glass
> Reviewed-by: Philipp Tomsich
> ---
>
> arch/arm/dts/rk3399-evb.dts | 16
> 1 file
> Read SoM information from EEPROM and set ethaddr in late init.
>
> Signed-off-by: Wadim Egorov
> Acked-by: Philipp Tomsich
> ---
> Changes in v2:
> - Fixed fdt_path_offset() error handling
>
> ---
>
> There are two same gmac node, remove one.
>
> Signed-off-by: Kever Yang
> Reviewed-by: Simon Glass
> ---
>
> arch/arm/dts/rk3399-evb.dts | 16
> 1 file changed, 16 deletions(-)
>
Reviewed-by: Philipp Tomsich
> Unfortunately, the integrated macphy default is enabled, which will
> increase power consuming, if we do not use this PHY. So let's disable
> it at first, which will save power consuming. If we really use it, then
> enable it in driver level.
>
> Signed-off-by: David Wu
> The sysreset driver for rk322x is ready but not enabled,
> add it to Makefile to make sure it's enabled.
>
> Signed-off-by: Kever Yang
> Reviewed-by: Simon Glass
> ---
>
> drivers/sysreset/Makefile | 1 +
> 1 file changed, 1 insertion(+)
>
> Enable the EFUSE driver for get the cpuid and serial.
>
> Signed-off-by: Kever Yang
> Acked-by: Philipp Tomsich
> ---
>
> configs/firefly-rk3399_defconfig | 2 ++
> include/configs/evb_rk3399.h | 3 +++
> 2 files changed,
Kever,
On Thu, 27 Jul 2017, Kever Yang wrote:
Sync the code from puma-rk3399:
8adc9d1 rockchip: board: puma_rk3399: derive ethaddr from cpuid
9415b9a rockchip: board: puma_rk3399: add support for serial# and cpuid#
via efuses
I am not keen on duplicating this code all over the place.
Can we
On Thu, 3 Aug 2017, Wadim Egorov wrote:
The hw can read up to 32 bytes at a time. If we need
more than one chunk, we have to enter the plain RX mode.
Why does this need to be in 'plain RX' mode for more than 32 bytes?
What happens if someone wants to write/transmit more than 32 bytes?
> This patch allows building of nand_bbt, nand_ids, nand_util for nand drivers
> that need it.
>
> Signed-off-by: PaweÅ Jarosz
> ---
> Changes since v1:
> - none
>
> Changes since v2:
> - none
>
> Changes since v3:
> - none
>
> drivers/mtd/nand/Makefile | 3 +++
>
> Sysreset drivers for rk3066 and rk3188 contain common elements which can be
> reused.
>
> Signed-off-by: PaweÅ Jarosz
> ---
> Changes since v1:
> - none
>
> Changes since v2:
> - none
>
> Changes since v3:
> - none
>
>
> In current state dfu depends on cmd/mtdparts.c which isn't build in SPL.
> This patch resolves it by cutting out unwanted code in SPL build.
>
> Signed-off-by: PaweÅ Jarosz
> ---
> Changes since v1:
> - none
>
> Changes since v2:
> - none
>
> Changes since v3:
> -
> rk3xxx.dtsi is used by rk3188 and rk3066. rk3188 uses alocated data in spl
> but rk3066 needs it in tpl.
>
> Signed-off-by: PaweÅ Jarosz
> ---
> Changes since v1:
> - none
>
> Changes since v2:
> - none
>
> Changes since v3:
> - none
>
>
> The dts from kernel is using rk3228-pinctrl as compatible name,
> need to sync with it to make the driver work.
>
> Signed-off-by: Kever Yang
> ---
>
> Changes in v2:
> - split this patch in two patches
>
> drivers/pinctrl/rockchip/pinctrl_rk322x.c | 6 +++---
> 1
> This patch enables support for the Rockchip RK3066 SD/MMC controller, which
> is based on Designware IP. The device supports SD, SDIO, MMC and eMMC.
>
> Signed-off-by: PaweÅ Jarosz
> Reviewed-by: Jaehoon Chung
> ---
> Changes since v1:
> -
> Sandisk SDTNQGAMA is a 8GB size, 3.3V 8 bit chip with 16KB page size, 1KB
> write size and 40 bit ecc support
>
> Signed-off-by: PaweÅ Jarosz
> ---
> Changes since v1:
> - none
>
> Changes since v2:
> - none
>
> Changes since v3:
> - none
>
>
> Use live tree functions to fill dwc2_plat_otg_data structure in
> board_usb_init.
>
> Signed-off-by: PaweÅ Jarosz
> ---
> Changes since v1:
> - none
>
> Changes since v2:
> - none
>
> Changes since v3:
> - none
>
> arch/arm/mach-rockchip/rk3066-board.c | 52
>
> Add support for system reset for rk3066 socs.
>
> Signed-off-by: PaweÅ Jarosz
> Reviewed-by: Simon Glass
> Acked-by: Philipp Tomsich
> ---
> Changes since v1:
> - updated to shifted masks
>
> Changes since
> Fix the IOMUX setting for SDcard CMD pin at the same time.
>
> Signed-off-by: Kever Yang
> ---
>
> Changes in v2: None
>
> drivers/pinctrl/rockchip/pinctrl_rk322x.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
Reviewed-by: Philipp Tomsich
> grf is needed by various drivers for rk3066 soc.
>
> Signed-off-by: PaweÅ Jarosz
> Acked-by: Philipp Tomsich
> ---
> Changes since v1:
> - updated to shifted masks
>
> Changes since v2:
> - none
>
> Changes since v3:
> -
> Add driver supporting pin multiplexing on rk3066 platform.
>
> Signed-off-by: PaweÅ Jarosz
> Acked-by: Philipp Tomsich
> ---
> Changes since v1:
> - updated to shifted masks
> - added nand support
>
> Changes since v2:
> -
> Add space around operator "+", make it
> match the coding style.
>
> Signed-off-by: Andy Yan
> ---
>
> Changes in v2: None
>
> arch/arm/include/asm/armv8/mmu.h | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
Reviewed-by: Philipp Tomsich
> The description for eMMC/SDIO/SDMMC src is not correct,
> update the CRU_CLKSEL11_CON value definition according to TRM.
>
> Signed-off-by: Kever Yang
> Acked-by: Philipp Tomsich
> ---
>
>
> This patch enables support for the Rockchip RK3066 SD/MMC controller, which
> is based on Designware IP. The device supports SD, SDIO, MMC and eMMC.
>
> Signed-off-by: PaweÅ Jarosz
> ---
> Changes since v1:
> - dropped OF_PLATDATA
>
> Changes since v2:
> - none
>
On Thu, 17 Aug 2017, Paweł Jarosz wrote:
Rockchip bootrom first reads 1KB data from nand at offset 0x10080C00 and
executes it. Then waits for back to bootrom and loads another 32KB to sram
which also executes. Sdram initialisation code needs to be in one of these two
steps. Then bootloader
On Thu, 17 Aug 2017, Paweł Jarosz wrote:
dw_mmc supports two transfer modes in u-boot: idma and fifo.
This patch adds autodetection of transfer mode and eliminates setting this in
host config struct
Signed-off-by: Paweł Jarosz
---
Changes since v1:
- none
1 - 100 of 142 matches
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