> On 7 May 2018, at 04:34, Marty E. Plummer wrote:
>
> On Mon, May 07, 2018 at 10:20:55AM +0800, Kever Yang wrote:
>> Hi Marty,
>>
>>
>> On 05/06/2018 10:25 PM, Marty E. Plummer wrote:
>>> Taken from coreboot's src/soc/rockchip/rk3288/sdram.c
>>>
>>> Without this
davinci_spi now support dt along with platform data,
respective boards need to switch into dm for the same.
Signed-off-by: Jagan Teki
---
Changes for v3:
- rebased to master
drivers/spi/Kconfig| 12 +-
drivers/spi/davinci_spi.c |
ti_qspi now support dt along with platform data,
respective boards need to switch into dm for the same.
Signed-off-by: Jagan Teki
---
Changes for v4:
- rebased to master
drivers/spi/Kconfig| 12 +-
drivers/spi/ti_qspi.c | 490
Get the is_errata_50mhz_ac in .ofdata_to_platdata, and
reuse it in .set_mode this can eventually initialized
dt code at once and adding room to add platdata.
Signed-off-by: Jagan Teki
---
drivers/spi/kirkwood_spi.c | 8 +---
1 file changed, 5 insertions(+), 3
kirkwood now support dt along with platform data,
respective boards need to switch into dm for the same.
Signed-off-by: Jagan Teki
---
Changes for v3:
- rebased master
- Move kconfig option if DM_SPI
drivers/spi/Kconfig | 12 +-
Hi,
Currently I am pursuing my M.tech in embedded system. I would like to
do my final academic project on Linux Device Driver. Please suggest
some good areas/driver subsystem/feature that can be a good project.
It can be on Uboot/boot-loader as well. Some of the areas that I had
in my mind are GSM
> On 07.05.2018, at 10:25, Chris Packham wrote:
>
> Hi Mans, Stefano,
>
> On Fri, Apr 27, 2018 at 9:00 PM Stefano Babic wrote:
>
>> On 21/04/2018 17:11, Mans Rullgard wrote:
>>> The code attempts to preserve the value of LR by storing it in R12/IP
Hi Mans, Stefano,
On Fri, Apr 27, 2018 at 9:00 PM Stefano Babic wrote:
> On 21/04/2018 17:11, Mans Rullgard wrote:
> > The code attempts to preserve the value of LR by storing it in R12/IP
> > across the lowevel_init() call. However, this register is not saved
> > by the
Sync bananapi-m64 usb host nodes from Linux.
Signed-off-by: Jagan Teki
---
arch/arm/dts/sun50i-a64-bananapi-m64.dts | 16
1 file changed, 16 insertions(+)
diff --git a/arch/arm/dts/sun50i-a64-bananapi-m64.dts
Sync bananapi-m64 usb_otg node from Linux.
Signed-off-by: Jagan Teki
---
arch/arm/dts/sun50i-a64-bananapi-m64.dts | 10 ++
1 file changed, 10 insertions(+)
diff --git a/arch/arm/dts/sun50i-a64-bananapi-m64.dts
b/arch/arm/dts/sun50i-a64-bananapi-m64.dts
From: Jun Nie
Allwinner H3 have a dual-routed USB PHY0 -- routed to either OHCI/EHCI
or MUSB controller.
Signed-off-by: Jun Nie
Reviewed-by: Jagan Teki
---
arch/arm/dts/sun8i-h3.dtsi | 32
1 file
Sync sun8i-a83t usbphy node details from Linux.
Signed-off-by: Jagan Teki
---
arch/arm/dts/sun8i-a83t.dtsi | 20
1 file changed, 20 insertions(+)
diff --git a/arch/arm/dts/sun8i-a83t.dtsi b/arch/arm/dts/sun8i-a83t.dtsi
index
Enable USB_MUSB_GADGET which operate OTG in peripheral mode
Signed-off-by: Jagan Teki
---
configs/Sinovoip_BPI_M2_Plus_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/configs/Sinovoip_BPI_M2_Plus_defconfig
b/configs/Sinovoip_BPI_M2_Plus_defconfig
index
Allwinner USB PHY handling can be done through driver-model
generic-phy so add the generic-phy ops to relevant places
on host and musb sunxi driver and enable them in respective
SOC's.
Signed-off-by: Jagan Teki
---
arch/arm/mach-sunxi/Kconfig | 9 +++
From: Chen-Yu Tsai
Clock gating bits on H43/H5 were wrong, fix them.
Signed-off-by: Chen-Yu Tsai
Reviewed-by: Jagan Teki
---
arch/arm/include/asm/arch-sunxi/clock_sun6i.h | 11 ---
1 file changed, 4 insertions(+), 7
The sunxi otg phy has a bug where it wrongly detects a high speed squelch
when reset on the root port gets de-asserted with a lo-speed device.
The workaround for this is to disable squelch detect before de-asserting
reset, and re-enabling it after the reset de-assert is done. Add a sunxi
specific
orangepi-prime has usb otg routed host with either EHCI0/OHCI0
sync the same from Linux.
Signed-off-by: Jagan Teki
---
arch/arm/dts/sun50i-h5-orangepi-prime.dts | 13 +
1 file changed, 13 insertions(+)
diff --git
Bananapi-m2-plus has usb otg routed host with either EHCI0/OHCI0
sync the same from Linux.
Signed-off-by: Jagan Teki
---
arch/arm/dts/sun8i-h3-bananapi-m2-plus.dts | 13 +
1 file changed, 13 insertions(+)
diff --git
Order sun50i-h5-orangepi-pc2.dts nodes in alphabetic
Signed-off-by: Jagan Teki
---
arch/arm/dts/sun50i-h5-orangepi-pc2.dts | 56 -
1 file changed, 28 insertions(+), 28 deletions(-)
diff --git a/arch/arm/dts/sun50i-h5-orangepi-pc2.dts
Allwinner A31 has 3 USB PHY's and rest similar to A10.
Signed-off-by: Jagan Teki
---
drivers/phy/allwinner/phy-sun4i-usb.c | 10 ++
1 file changed, 10 insertions(+)
diff --git a/drivers/phy/allwinner/phy-sun4i-usb.c
b/drivers/phy/allwinner/phy-sun4i-usb.c
Sync sun4i-usb-phy bindings from Linux, since the
drivers/phy/allwinner/phy-sun4i-usb.c follw similar.
Signed-off-by: Jagan Teki
---
doc/device-tree-bindings/phy/sun4i-usb-phy.txt | 65 ++
1 file changed, 65 insertions(+)
create mode 100644
Unlike, other Allwinner SUN4I Phy supporting SOC, A83T has
2 USB PHY's and second one is HSIC. So phy control need to
configure to handle these HSIC and SIDDQ requirement.
Signed-off-by: Jagan Teki
---
drivers/phy/allwinner/phy-sun4i-usb.c | 85
orangepi-pc2 has usb otg routed host with either EHCI0/OHCI0
sync the same from Linux.
Signed-off-by: Jagan Teki
---
arch/arm/dts/sun50i-h5-orangepi-pc2.dts | 13 +
1 file changed, 13 insertions(+)
diff --git a/arch/arm/dts/sun50i-h5-orangepi-pc2.dts
Enable USB_MUSB_GADGET which operate OTG in peripheral mode
Signed-off-by: Jagan Teki
---
configs/orangepi_prime_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/configs/orangepi_prime_defconfig b/configs/orangepi_prime_defconfig
index
Allwinner PHY USB code is now part of generic-phy framework,
so use it in board_usb_cable_connected.
Signed-off-by: Jagan Teki
---
board/sunxi/board.c | 33 -
1 file changed, 32 insertions(+), 1 deletion(-)
diff --git
Enable USB_MUSB_GADGET which operate OTG in peripheral mode
Signed-off-by: Jagan Teki
---
configs/bananapi_m64_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/configs/bananapi_m64_defconfig b/configs/bananapi_m64_defconfig
index 47f31c6d9d..40c1c18aca
USB PHY implementation for Allwinner SOC's can be handling
in to single driver with different phy configs.
This driver handle all Allwinner USB PHY's start from 4I to
50I(except 9I). Currently added A64 compatibility more will
add in next coming patches.
Current implementation is unable to get
Allwinner A33 has 2 USB PHY's and 0x10 has phy ctrl offset.
Signed-off-by: Jagan Teki
---
drivers/phy/allwinner/phy-sun4i-usb.c | 10 ++
1 file changed, 10 insertions(+)
diff --git a/drivers/phy/allwinner/phy-sun4i-usb.c
Like other Allwinner SoC, the H3/H5/A64 is missing the config register
from the musb hardware block. Use a known working value for it
like other SoC.
Signed-off-by: Jagan Teki
---
Note:
- About previous version comment, at this point the core can't handle
this
Add PHY configs for Allwinner A10/A13/A20 which are SUN4I.
Signed-off-by: Jagan Teki
---
drivers/phy/allwinner/phy-sun4i-usb.c | 28
1 file changed, 28 insertions(+)
diff --git a/drivers/phy/allwinner/phy-sun4i-usb.c
Allwinner A23 has 2 USB PHY's and 0x04 has phy ctrl offset.
Signed-off-by: Jagan Teki
---
drivers/phy/allwinner/phy-sun4i-usb.c | 9 +
1 file changed, 9 insertions(+)
diff --git a/drivers/phy/allwinner/phy-sun4i-usb.c
b/drivers/phy/allwinner/phy-sun4i-usb.c
ID and VBUS detection code require when musb changing
between Host and/or Peripheral modes.
Signed-off-by: Jagan Teki
---
drivers/phy/allwinner/phy-sun4i-usb.c | 39 +++
include/phy-sun4i-usb.h | 26
H3/H5 has 4 USB PHY, rest are similar to A64.
Signed-off-by: Jagan Teki
---
drivers/phy/allwinner/phy-sun4i-usb.c | 11 +++
1 file changed, 11 insertions(+)
diff --git a/drivers/phy/allwinner/phy-sun4i-usb.c
b/drivers/phy/allwinner/phy-sun4i-usb.c
index
Enable USB_MUSB_GADGET which operate OTG in peripheral mode
Signed-off-by: Jagan Teki
---
configs/orangepi_pc2_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/configs/orangepi_pc2_defconfig b/configs/orangepi_pc2_defconfig
index dd5f2c78ab..ca1e586e89
Allwinner PHY USB code is now part of generic-phy framework,
so drop existing legacy handling like arch/arm/mach-sunxi.c
and related code areas.
Signed-off-by: Jagan Teki
---
arch/arm/include/asm/arch-sunxi/usb_phy.h | 21 --
arch/arm/mach-sunxi/Makefile
Use BIT is possible areas instead of numerical shift.
Signed-off-by: Jagan Teki
---
drivers/usb/musb-new/sunxi.c | 28 ++--
1 file changed, 14 insertions(+), 14 deletions(-)
diff --git a/drivers/usb/musb-new/sunxi.c
V3S has 1 USB PHY, rest are similar to A64.
Signed-off-by: Jagan Teki
---
drivers/phy/allwinner/phy-sun4i-usb.c | 11 +++
1 file changed, 11 insertions(+)
diff --git a/drivers/phy/allwinner/phy-sun4i-usb.c
b/drivers/phy/allwinner/phy-sun4i-usb.c
index
- add proper macros for musb_config members
- use bool 'true' for multipoint and dyn_fifo instead of numerical 1
Signed-off-by: Jagan Teki
---
drivers/usb/musb-new/sunxi.c | 12
1 file changed, 8 insertions(+), 4 deletions(-)
diff --git
Filling musb_hdrc pdata using structure will unnecessary
add extra ifdefs, so fill them inside probe call for
better code understanding and get rid ifdefs using
devicetree compatible.
Signed-off-by: Jagan Teki
---
drivers/usb/musb-new/sunxi.c | 23
clock gating bits on a64 are different than H3_H5, so fixed
only required bits on clock_sun6i.h.
Signed-off-by: Jagan Teki
---
arch/arm/include/asm/arch-sunxi/clock_sun6i.h | 12 +---
1 file changed, 9 insertions(+), 3 deletions(-)
diff --git
Unlike other Allwinner SOC's H3/H5/V3s OTG support 4 endpoints
with relevant fifo configs, rest all have 5 endpoints.
So add the fifo configs and defer them based on driver_data.
Signed-off-by: Jagan Teki
---
drivers/usb/musb-new/sunxi.c | 70
Add OTG device clkgate and reset for H3/H5 through driver_data.
Signed-off-by: Jagan Teki
---
drivers/usb/musb-new/sunxi.c | 17 +
1 file changed, 17 insertions(+)
diff --git a/drivers/usb/musb-new/sunxi.c b/drivers/usb/musb-new/sunxi.c
index
Move struct sunxi_ccm_reg pointer to private structure
so-that accessing ccm reg base become more proper way
and avoid local initialization in each function.
Signed-off-by: Jagan Teki
---
drivers/usb/host/ehci-sunxi.c | 15 +--
This series rework of previous version where it removes legacy
usb phy handling and added phy driver on generic-phy framework.
Current implementation phy driver is unable to get pinctrl, clock
and reset details from DT since the dm code on these will add it future.
Changes for v7:
- rebase on
On 03/05/18 18:00, Stefano Babic wrote:
> On 03/05/2018 14:57, Kristian Amlie wrote:
>> I've been having another idea in the back of my head for while, using a
>> very different approach: Instead of requiring that the tool be able to
>> fall back to a default environment, require that U-Boot write
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