This change enables setting up specific Qemu version or sha1 for new
targets which are added after (current) v3.0.0 version.
This changes is preparation step for adding new Xilinx Versal Virt
platform which was merge after v3.0.0.
Signed-off-by: Michal Simek
---
.travis.yml | 3 ++-
1 file
Test Xilinx Versal Virt platform running on the v3.1.0 Qemu.
Signed-off-by: Michal Simek
---
Patch needs to be applied when this PR is merged.
https://github.com/swarren/uboot-test-hooks/pull/21
---
.travis.yml | 8
1 file changed, 8 insertions(+)
diff --git a/.travis.yml
On 12/18/18 6:05 AM, AKASHI Takahiro wrote:
> "drivers" command prints all the uefi drivers on the system.
> => efi drivers
> Driver Name Image Path
>
> (unknown) +(not found)
> guid: 18a031ab-b443-4d1a-a5c0-0c09261e9f71
>
> Currently, no
On 12/18/18 6:05 AM, AKASHI Takahiro wrote:
> "dh" command prints all the uefi handles used in the system.
> => efishell dh
> (T.B.D.)
> 0: (protocol info not available)
> 1: (protocol info not available)
> 2: (protocol info not available)
> 3: (protocol info not available)
> 4: (protocol info not
On 12/17/18 8:37 AM, Stefan Mavrodiev wrote:
On 12/14/18 5:55 PM, Maxime Ripard wrote:
On Fri, Dec 14, 2018 at 04:14:31PM +0200, Stefan Mavrodiev wrote:
On 12/14/18 11:25 AM, Maxime Ripard wrote:
On Thu, Dec 13, 2018 at 09:12:57AM +0200, Stefan Mavrodiev wrote:
On 12/6/18 8:41 AM, Stefan
From: Hou Zhiqiang
LS1043A/LS1023A 23x23 package silicon has different SVR:VAR_PER.
Signed-off-by: Hou Zhiqiang
---
arch/arm/cpu/armv8/fsl-layerscape/cpu.c|2 ++
arch/arm/include/asm/arch-fsl-layerscape/soc.h |3 +++
2 files changed, 5 insertions(+), 0 deletions(-)
diff --git
From: Hou Zhiqiang
On LS1043A rev1.0 there are 4 interrupt pins for INTx, and on
rev1.1 there is only 1 for INTx, so the current fixup is inverse
of the fact.
Signed-off-by: Hou Zhiqiang
---
arch/arm/cpu/armv8/fsl-layerscape/fdt.c |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
+Michal
On Wed, Dec 19, 2018 at 6:02 PM Anup Patel wrote:
>
> From: Anup Patel
>
> This patch does following fixes in MACB ethernet driver
> for using it on RISC-V systems (particularly QEMU sifive_u
> machine):
> 1. asm/arch/clk.h is not available on RISC-V port so include
>it only for
+Michal
On Wed, Dec 19, 2018 at 6:02 PM Anup Patel wrote:
>
> From: Anup Patel
>
> This patch enables Cadence MACB ethernet driver for QEMU RISC-V
> emulation by implying MACB, MII, RGMII and NET_RANDOM_ETHADDR on
> BOARD_SPECIFIC_OPTIONS.
>
> Signed-off-by: Anup Patel
> Reviewed-by: Bin Meng
+Michal
On Mon, Dec 17, 2018 at 5:21 PM Anup Patel wrote:
>
> From: Anup Patel
>
> This patch adds asm/dma-mapping.h for Linux-like DMA mappings
> APIs required by some of the drivers (such as, Cadance MACB
> Ethernet driver).
>
> Signed-off-by: Anup Patel
> ---
>
+Michal
On Wed, Dec 19, 2018 at 6:02 PM Anup Patel wrote:
>
> This patchset enables Cadance MACB ethernet driver for
> QEMU sifive_u machine. The Cadance MACB ethernet driver
> works fine for QEMU sifive_u machince in both M-mode and
> S-mode with some minor fixes.
>
> The patches are based upon
All the source code of sdram_rk3036.c are from Rockchip, update the
copyright to owned by Rockchip.
Because rockchip may use this copy of code both for open source
project and internal project, update the license to use both
GPL2.0+ and BSD-3 Clause.
Signed-off-by: Kever Yang
---
Rockchip may use this sdram copy of source code for both open source
and internal project, update the license to use both GPL2.0+ and
BSD-3 Clause.
Signed-off-by: Kever Yang
---
drivers/ram/rockchip/sdram_rk3128.c | 2 +-
drivers/ram/rockchip/sdram_rk3188.c | 2 +-
From: Chris Packham
This is a range of stackable network switches. The SoC is Armada-385 and
there are a number of variants with differing network port
configurations. The DP variants are intended for a harsher operating
environment so they use a different i2c mux and fit industrial-temp
parts.
From: "Ang, Chee Hong"
Enable 'fpga' command in u-boot. User will be able to use the FPGA
command to program the FPGA on Stratix10 SoC.
Signed-off-by: Ang, Chee Hong
---
arch/arm/mach-socfpga/include/mach/misc.h | 4 ++--
arch/arm/mach-socfpga/misc.c | 26
From: "Ang, Chee Hong"
Select CONFIG_FPGA_STRATIX10 for CONFIG_TARGET_SOCFPGA_STRATIX10.
Signed-off-by: Ang, Chee Hong
---
arch/arm/mach-socfpga/Kconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/mach-socfpga/Kconfig b/arch/arm/mach-socfpga/Kconfig
index 06f8527..5e87371
From: "Ang, Chee Hong"
Enable FPGA reconfiguration support for Stratix 10 SoC.
Signed-off-by: Ang, Chee Hong
---
drivers/fpga/Kconfig | 11 ++
drivers/fpga/Makefile| 1 +
drivers/fpga/stratix10.c | 288 +++
include/altera.h | 4
From: "Ang, Chee Hong"
Add macros for specifying number of arguments in mailbox command.
Signed-off-by: Ang, Chee Hong
---
arch/arm/mach-socfpga/include/mach/mailbox_s10.h | 6 ++
1 file changed, 6 insertions(+)
diff --git a/arch/arm/mach-socfpga/include/mach/mailbox_s10.h
From: "Ang, Chee Hong"
Add a generic mailbox API for FPGA reconfig status which can be
called by others. This new function accepts 2 different mailbox
commands: CONFIG_STATUS or RECONFIG_STATUS.
Signed-off-by: Ang, Chee Hong
---
arch/arm/mach-socfpga/include/mach/mailbox_s10.h | 3 +-
From: "Ang, Chee Hong"
Forked latest master branch from u-boot (github) and applied these 5
patches on top of it and test build with Travis CI.
Travis CI report:
https://travis-ci.org/JeremyAngCH/u-boot/jobs/470074691
New changes:
- Add new dependency patch (1/5) to support the common FPGA
Thank you for the clarification. I've correct my issue by partitioning the
MMC storage and formatting the partition FAT. Then burning the U-Boot
Image to 8K in on the raw media.
On Tue, Dec 18, 2018 at 12:48 AM Heinrich Schuchardt
wrote:
> On 12/6/18 7:12 PM, Robin Polak wrote:
> > Hello.
> >
The first parameter of efi_add_runtime_mmio() is a pointer to a
pointer. This should be reflected both in the signature and in the
documentation.
Signed-off-by: Heinrich Schuchardt
---
v2
Correct the commit message and title. This patch changes
efi_add_runtime_mmio().
---
Hi,
while searching for bytes to save in SPL in order to add FIT signature
handling, I am currently trying to get socfpga-gen5 to use OF_PLATDATA.
To begin, I stripped down socfpga_socrates_defconfig to absolutely
nothing but serial drivers in SPL (with some modifications to the
Kconfig)
lmb.h includes an extern declaration of "struct lmb lmb;" which
is not used anywhere, so remove it.
Signed-off-by: Simon Goldschmidt
---
Changes in v9: None
Changes in v8: None
Changes in v7: None
Changes in v6: None
Changes in v5: None
Changes in v4: None
Changes in v2:
- this patch is new in
This fixes CVE-2018-18439 ("insufficient boundary checks in network
image boot") by using lmb to check for a valid range to store
received blocks.
Signed-off-by: Simon Goldschmidt
---
Changes in v9: None
Changes in v8: None
Changes in v7:
- fix compiling without CONFIG_LMB
Changes in v6: None
This reduces duplicate code only.
Signed-off-by: Simon Goldschmidt
---
Changes in v9: None
Changes in v8: None
Changes in v7: None
Changes in v6: None
Changes in v5: None
Changes in v4: None
Changes in v2: None
common/bootm.c | 8 ++--
1 file changed, 2 insertions(+), 6 deletions(-)
diff
This fixes 'arch_lmb_reserve()' for ARM that tries to detect in which
DRAM bank 'sp' is in.
This code failed if a bank was at the end of physical address range
(i.e. size + length overflowed to 0).
To fix this, calculate 'bank_end' as 'size + length - 1' so that such
banks end at 0x,
This fixes CVE-2018-18440 ("insufficient boundary checks in filesystem
image load") by using lmb to check the load size of a file against
reserved memory addresses.
Signed-off-by: Simon Goldschmidt
---
Changes in v9: None
Changes in v8: None
Changes in v7: None
Changes in v6:
- fixed NULL
boot_fdt_add_mem_rsv_regions() adds reserved memory sections to an lmb
struct. Currently, it only parses regions described by /memreserve/
entries.
Extend this to the more commonly used scheme of the "reserved-memory"
node.
Signed-off-by: Simon Goldschmidt
---
Changes in v9: None
Changes in
This adds two new functions, lmb_alloc_addr and
lmb_get_unreserved_size.
lmb_alloc_addr behaves like lmb_alloc, but it tries to allocate a
pre-specified address range. Unlike lmb_reserve, this address range
must be inside one of the memory ranges that has been set up with
lmb_add.
lmb_add_region handles overlapping regions wrong: instead of merging
or rejecting to add a new reserved region that overlaps an existing
one, it just adds the new region.
Since internally the same function is used for lmb_alloc, change
lmb_add_region to reject overlapping regions.
Also, to keep
The lmb code fails if base + size of RAM overflows to zero.
Fix this by calculating end as 'base + size - 1' instead of 'base + size'
where appropriate.
Added tests to assert this is fixed.
Signed-off-by: Simon Goldschmidt
---
Changes in v9: None
Changes in v8: None
Changes in v7: None
Add basic tests for the lmb memory allocation code used to reserve and
allocate memory during boot.
Signed-off-by: Simon Goldschmidt
---
Changes in v9: None
Changes in v8: None
Changes in v7: None
Changes in v6: None
Changes in v5:
- this patch is new in v5
Changes in v4: None
Changes in v2:
Am 19.12.18 um 13:42 schrieb Lars Povlsen:
> As we are moving to multi-dtb and board detection, remove static board
> config options.
>
> Signed-off-by: Lars Povlsen
> ---
> arch/mips/mach-mscc/Kconfig | 38 ++---
> 1 file changed, 10 insertions(+), 28
On Wed, Dec 19, 2018 at 01:14:22PM +0100, Jean-Jacques Hiblot wrote:
>
> On 19/12/2018 12:37, Priit Laes wrote:
> > On Wed, Dec 19, 2018 at 01:26:18PM +0530, Jagan Teki wrote:
> > > On Wed, Dec 19, 2018 at 1:23 PM Priit Laes wrote:
> > > > Heya!
> > > >
> > > > I ran into following error when
When fixed-link phy is used subnode offset is used as phy address. This
number is bigger then space allocated for bus structure (allocated via
mdio_alloc).
bus->phymap[] array has PHY_MAX_ADDR size (32).
That's why writing bus->phymap[addr] where addr is < 0 or > PHY_MAX_ADDR
is causing write to
-amlogic-20181219
for you to fetch changes up to 53904dc7c13841497835090a8057930d4a84c4de:
arm: dts: s400: Fix status for eMMC and SDIO ports (2018-12-19 16:20:50 +0100)
A single fix to properly enable eMMC on the AXG S400 board
Am 18.12.18 um 21:49 schrieb Ramon Fried:
> Some architectures (MIPS) needs mapping to access IOMEM.
> Fix that.
>
> Fixes: f1dcc19b213d ("net: macb: Convert to driver model")
>
> Signed-off-by: Ramon Fried
> ---
> v2: switched to use dev_reamp_addr() to reduce boilerplate code.
> (as
On 19/12/2018 15:44, Jerome Brunet wrote:
> On Mon, 2018-12-17 at 10:26 +0100, Neil Armstrong wrote:
>> Under U-boot, the WiFi SDIO Module should be disabled and the
>> eMMC modules should be enabled, so this patch adds an s400-u-boot.dtsi
>> include file specific for U-Boot that will be included
When probing soft_spi the result of dev_get_parent_priv(dev) in probe
function is null ptr because the spi is on the ahb bus which has
per_child_auto_alloc_size set to 0. Therefore it would generate an Ooops
messages when accessing spi_slave structure.
The fix consist of delaying the read of
Am 19.12.18 um 15:18 schrieb Daniel Schwierzeck:
> With moving write_on_tlb() to arch/mips/include/asm/mipsregs.h
> there are now compiler warnings when some generic code includes
> asm/io.h. This happens for example when enabling OF live tree.
>
> Signed-off-by: Daniel Schwierzeck
>
> ---
>
Hi Tom,
though it's a little big for rc2, it's beside some bugfixes almost only new
code which is isolated to drivers and MIPS. The patches were on the list for
several weeks/months but the review process took a bit longer.
Please consider pulling, thanks.
On Mon, 2018-12-17 at 10:26 +0100, Neil Armstrong wrote:
> Under U-boot, the WiFi SDIO Module should be disabled and the
> eMMC modules should be enabled, so this patch adds an s400-u-boot.dtsi
> include file specific for U-Boot that will be included by the build system.
>
> Signed-off-by: Neil
With moving write_on_tlb() to arch/mips/include/asm/mipsregs.h
there are now compiler warnings when some generic code includes
asm/io.h. This happens for example when enabling OF live tree.
Signed-off-by: Daniel Schwierzeck
---
arch/mips/include/asm/mipsregs.h | 7 ---
1 file changed, 7
it seems that "Enable driver model for USB" (DM_USB) is needed for this...after
enabling this i can build it, but uboot hangs after autoboot-message
CPU: MediaTek MT7623 E3
DRAM: 2 GiB
Hi,
i'm trying to get USB working in uboot.
first thing i've noticed: usb3 and usb2 cannot be used together (multiple
definition of "submit_control_msg" and other functions).
next i try to enable usb-command (which seems to be needed), then i get this:
common/usb_storage.c: In function
Build flash.bin for i.MX8 when SPL enabled.
Signed-off-by: Peng Fan
---
Makefile | 2 +-
arch/arm/mach-imx/Makefile | 13 +
2 files changed, 14 insertions(+), 1 deletion(-)
diff --git a/Makefile b/Makefile
index 74d4259eb6..e9a0d3ab3a 100644
--- a/Makefile
+++
Update README after we switch to use SPL
Signed-off-by: Peng Fan
---
board/freescale/imx8qxp_mek/README | 8 +---
include/configs/imx8qxp_mek.h | 2 +-
2 files changed, 6 insertions(+), 4 deletions(-)
diff --git a/board/freescale/imx8qxp_mek/README
Enable SPL for i.MX8QXP MEK, and currently use SPL FIT.
The SPL enable SPL_DM to use MMC/PINCTRL/POWER DOMAIN/CLK.
Note: SPL FIT could not support secure boot chain, because i.MX8/8X
only support i.MX container format. This container format has
not been upstreamed, so we use FIT for now. When SPL
Introduce u-boot dtsi for i.MX8QXP MEK board.
we do not introduce a common dtsi for SoC, because different board
has different requirement on which needs to be enabled in SPL DM.
Signed-off-by: Peng Fan
---
arch/arm/dts/fsl-imx8qxp-mek-u-boot.dtsi | 112 +++
SPL runs in EL3 mode, except MU0_A, others are not powered on,
and could not be used. However normal U-Boot use MU1_A, so we
could not reuse the one in dts. And we could not replace the one
in dts with MU0_A, because MU0_A is reserved in secure world.
Signed-off-by: Peng Fan
---
Add spl_boot_device for i.MX8, also add BOOT_DEVICE_MMC2_2 for
spl_boot_mode.
Signed-off-by: Peng Fan
---
arch/arm/mach-imx/spl.c | 14 --
1 file changed, 12 insertions(+), 2 deletions(-)
diff --git a/arch/arm/mach-imx/spl.c b/arch/arm/mach-imx/spl.c
index 58a92278df..3ee5061b08
Introduce BL33_BASE_ADDR, then we could reuse this script for i.MX8QXP.
Signed-off-by: Peng Fan
---
arch/arm/mach-imx/mkimage_fit_atf.sh | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/arch/arm/mach-imx/mkimage_fit_atf.sh
b/arch/arm/mach-imx/mkimage_fit_atf.sh
index
Introduce CONFIG_SPL_DM_PCA953X for SPL usage.
Signed-off-by: Peng Fan
---
drivers/gpio/Kconfig | 23 +++
drivers/gpio/Makefile | 2 +-
2 files changed, 24 insertions(+), 1 deletion(-)
diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig
index 35344e57c6..b1c9404aaf
To enable SPL for i.MX8, we could reuse code in arch/arm/mach-imx.
Signed-off-by: Peng Fan
---
arch/arm/Makefile | 2 +-
arch/arm/mach-imx/Makefile | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index 87d9d4b9f7..0e2cfd4534
Enable SUPPORT_SPL option for i.MX8QXP, then we could enable SPL.
Signed-off-by: Peng Fan
---
arch/arm/mach-imx/imx8/Kconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/mach-imx/imx8/Kconfig b/arch/arm/mach-imx/imx8/Kconfig
index 0d3a87cd74..9671107cb6 100644
---
This is to support SPL for i.MX8QXP MEK board and default support SPL.
In this patchset, use SPL FIT, but actually we could not use SPL FIT
for secure boot, in NXP vendor tree, there is another format called
container, NXP use SPL + container for secure boot. The container
support is on my TODO
Hi Sergey,
> -Original Message-
> From: U-Boot [mailto:u-boot-boun...@lists.denx.de] On Behalf Of Sergey
> Kubushyn
> Sent: 2018年12月18日 9:54
> To: U-Boot list
> Subject: [U-Boot] i.MX8M layout, rephrased
>
> I'm looking at U-Boot master tree and u-boot-imx repository. What we have
> now
This add single-binary support for the two MSCC ocelot-based reference
boards - pcb120 and pcb123.
The PHY ids on specific ports are used to determine the board type.
Signed-off-by: Lars Povlsen
---
arch/mips/dts/Makefile | 1 +
board/mscc/ocelot/ocelot.c | 52
This add single-binary support for the two MSCC luton-based reference
boards - pcb090 and pcb091.
Signed-off-by: Lars Povlsen
---
arch/mips/dts/Makefile| 1 +
.../include/mach/luton/luton_devcpu_gcb.h | 2 +
board/mscc/luton/luton.c | 46
This prepares individual device trees for MSCC luton-based reference
boards - pcb090 and pcb091.
Note: Even though the devices trees are quite common, they will differ
significantly in coming patches.
Signed-off-by: Lars Povlsen
---
arch/mips/dts/luton_pcb090.dts | 36
The GPIO control function can be used for controlling alternate
functions associated with a GPIO.
Signed-off-by: Lars Povlsen
---
arch/mips/mach-mscc/Makefile | 2 +-
arch/mips/mach-mscc/gpio.c| 33 +++
The PHY MIIM utility functions can/will be used for board detection
purposes.
Signed-off-by: Lars Povlsen
---
arch/mips/mach-mscc/Makefile | 2 +-
arch/mips/mach-mscc/include/mach/common.h | 20 +
.../mach/luton/luton_devcpu_gcb_miim_regs.h | 26 +++
As we are moving to multi-dtb and board detection, remove static board
config options.
Signed-off-by: Lars Povlsen
---
arch/mips/mach-mscc/Kconfig | 38 ++---
1 file changed, 10 insertions(+), 28 deletions(-)
diff --git a/arch/mips/mach-mscc/Kconfig
This patch series add support for using multi-dtb on the MSCC luton
and ocelot SOC reference boards. The appropriate board will be
determined during startup, and the right DT will be selected.
The patch is based off u-boot-mips repo.
Lars Povlsen (6):
mips: luton+ocelot: Remove board-specific
From: Priit Laes
Move PLL initialization code to single place so
we won't call it every time we query for EDID data.
Signed-off-by: Priit Laes
---
drivers/video/sunxi/sunxi_display.c | 14 +++---
1 file changed, 7 insertions(+), 7 deletions(-)
diff --git
From: Priit Laes
There are HDMI displays where hpd pin is not connected, thus
we cannot get it to work unless we specifically set the resolution.
Rework the display probing, so hotplug detect failure causes
fallback to probing ddc for EDID data.
Signed-off-by: Priit Laes
---
From: Priit Laes
Current EDID detailed timing parser errors out when either
horizontal or vertical pulse sync width is 0, thus not
allowing a display with EDID listed below work properly.
Of-course, this is somewhat quirky HDMI display with following
anti-features:
- HPD pin is not usable
-
On 19/12/2018 13:59, Adam Ford wrote:
On Wed, Dec 19, 2018 at 4:59 AM Jean-Jacques Hiblot wrote:
On 17/12/2018 21:34, Adam Ford wrote:
Borrowing from the updates to ti-musb.c, this glue layer checks
to see if the MUSB controller is gadget or host. Going under
the assumpution there is only
Hi,
>>
>> Unfortunately thats a problem with U-Boot spi_flash layer today. Many
>> newer flashes like Micron's mt35x series dont support BAR registers.
>> Accessing above 16MB is broken for such flashes today.
>>
>>> Also, initially I wanted to make SFDP optional so that none of the drivers
>>
On Wed, Dec 19, 2018 at 4:34 AM Jean-Jacques Hiblot wrote:
>
>
> On 19/12/2018 11:31, Jean-Jacques Hiblot wrote:
> >
> > On 18/12/2018 13:08, Jagan Teki wrote:
> >> On Thu, Nov 29, 2018 at 3:30 PM Jean-Jacques Hiblot
> >> wrote:
> >>> UCLASS_USB_DEV_GENERIC was meant for USB devices connected to
From: "From: Karl Palsson"
Commit a8011eb84dfa("sunxi: board: Print error after power initialization
fails") moved the DRAM init after the increase of the CPU clock
frequency. This lead to various DRAM initialisation failures on some
boards (hangs or wrong size reported, on a NanoPi Duo2 and
On Wed, Dec 19, 2018 at 4:59 AM Jean-Jacques Hiblot wrote:
>
>
> On 17/12/2018 21:34, Adam Ford wrote:
> > Borrowing from the updates to ti-musb.c, this glue layer checks
> > to see if the MUSB controller is gadget or host. Going under
> > the assumpution there is only one MUSB controller, this
From: Anup Patel
This patch does following fixes in MACB ethernet driver
for using it on RISC-V systems (particularly QEMU sifive_u
machine):
1. asm/arch/clk.h is not available on RISC-V port so include
it only for non-RISC-V systems.
2. Don't fail in macb_enable_clk() if clk_enable() returns
From: Anup Patel
This patch enables Cadence MACB ethernet driver for QEMU RISC-V
emulation by implying MACB, MII, RGMII and NET_RANDOM_ETHADDR on
BOARD_SPECIFIC_OPTIONS.
Signed-off-by: Anup Patel
Reviewed-by: Bin Meng
---
board/emulation/qemu-riscv/Kconfig | 4
1 file changed, 4
From: Anup Patel
This patch adds asm/dma-mapping.h for Linux-like DMA mappings
APIs required by some of the drivers (such as, Cadance MACB
Ethernet driver).
Signed-off-by: Anup Patel
Reviewed-by: Bin Meng
---
arch/riscv/include/asm/dma-mapping.h | 38
1 file
This patchset enables Cadance MACB ethernet driver for
QEMU sifive_u machine. The Cadance MACB ethernet driver
works fine for QEMU sifive_u machince in both M-mode and
S-mode with some minor fixes.
The patches are based upon latest RISC-V U-Boot tree
(git://git.denx.de/u-boot-riscv.git) at commit
On 12/19/18 2:49 AM, AKASHI Takahiro wrote:
> Heinrich,
>
> On Tue, Dec 18, 2018 at 07:07:02AM +0100, Heinrich Schuchardt wrote:
>> On 12/18/18 6:05 AM, AKASHI Takahiro wrote:
>>> "env [print|set] -e" allows for handling uefi variables without
>>> knowing details about mapping to corresponding
On 19/12/2018 12:37, Priit Laes wrote:
On Wed, Dec 19, 2018 at 01:26:18PM +0530, Jagan Teki wrote:
On Wed, Dec 19, 2018 at 1:23 PM Priit Laes wrote:
Heya!
I ran into following error when trying to fel-boot
A20 OLinuxino Lime2 eMMC board with latest u-boot:
[snip]
U-Boot
On Wed, Dec 19, 2018 at 01:26:18PM +0530, Jagan Teki wrote:
> On Wed, Dec 19, 2018 at 1:23 PM Priit Laes wrote:
> >
> > Heya!
> >
> > I ran into following error when trying to fel-boot
> > A20 OLinuxino Lime2 eMMC board with latest u-boot:
> >
> > [snip]
> > U-Boot 2019.01-rc2-5-gbf60dae9dd
On 12/19/2018 12:15 PM, Heiko Schocher wrote:
> Hello Marek,
Hi,
> Am 19.12.2018 um 09:07 schrieb Marek Vasut:
>> Add Xilinx AXI I2C controller driver based on the Linux i2c-xiic driver.
>> This driver is stripped of all the IRQ handling and uses pure polling,
>> yet tries to retain most of the
Add Xilinx AXI I2C controller driver based on the Linux i2c-xiic driver.
This driver is stripped of all the IRQ handling and uses pure polling,
yet tries to retain most of the structure of the Linux driver to make
backporting of fixes easy.
Note that the IP has a known limitation on 255 bytes
Hello Marek,
Am 19.12.2018 um 09:07 schrieb Marek Vasut:
Add Xilinx AXI I2C controller driver based on the Linux i2c-xiic driver.
This driver is stripped of all the IRQ handling and uses pure polling,
yet tries to retain most of the structure of the Linux driver to make
backporting of fixes
On 12/19/2018 10:48 AM, Ang, Chee Hong wrote:
> On Wed, 2018-12-19 at 09:41 +0100, Marek Vasut wrote:
>> On 12/19/2018 05:55 AM, Ang, Chee Hong wrote:
>>>
>>> On Tue, 2018-12-18 at 18:47 +0100, Marek Vasut wrote:
On 12/18/2018 09:54 AM, chee.hong@intel.com wrote:
>
>
>
Some users might need additional setups before booting the kernel.
If there is found a file 'boot.scr', run it before invoking the
distro boot command.
Signed-off-by: Masahiro Yamada
---
configs/uniphier_ld4_sld8_defconfig | 2 +-
configs/uniphier_v7_defconfig | 2 +-
Currently, the DWC3 USB node is out of sync because the bindings
for the UniPhier DWC3 PHY diverged between Linux and U-Boot.
Signed-off-by: Masahiro Yamada
---
arch/arm/dts/uniphier-ld11.dtsi | 52 ++-
arch/arm/dts/uniphier-ld20-global.dts | 4 +
Masahiro Yamada (9):
ARM: uniphier: do not modify bootcmd environment variable at run-time
ARM: uniphier: allow to source boot script before distro-boot
ARM: uniphier: add CONFIG_PREBOOT
linux/kernel.h: import DIV_ROUND_CLOSEST_ULL from Linux
mtd: rawnand: denali_dt: add more clocks
For more boot-flow flexibility,
Signed-off-by: Masahiro Yamada
---
include/configs/uniphier.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/include/configs/uniphier.h b/include/configs/uniphier.h
index 1e509ce..95d6452 100644
--- a/include/configs/uniphier.h
+++
Based on Linux commit 6f1fe97bec349a1fd6c5a8c7c5998d759fe721d5
Currently, denali_dt.c requires a single anonymous clock, but
the Denali User's Guide requires three clocks for this IP:
- clk: controller core clock
- clk_x: bus interface clock
- ecc_clk: clock at which ECC circuitry is run
Copied from Linux v4.20-rc7.
Signed-off-by: Masahiro Yamada
---
include/linux/kernel.h | 12
1 file changed, 12 insertions(+)
diff --git a/include/linux/kernel.h b/include/linux/kernel.h
index bd88483..a85c15d 100644
--- a/include/linux/kernel.h
+++ b/include/linux/kernel.h
@@
Some users might want to modify 'bootcmd' at compile-time by editing
include/configs/uniphier.h, but overwriting it at run-time makes it
impossible.
Instead, set 'bootdev' at run-time, which contains the boot device the
system is booting from, then indirectly reference it from 'bootcmd'.
It is
Based on Linux commit 1dfac31a5a63ac04a9b5fbc3f5105a586560f191
This commit improves the ->setup_data_interface() hook.
The denali_setup_data_interface() needs the frequency of clk_x
and the ratio of clk_x / clk.
The latter is currently hardcoded in the driver, like this:
#define
Based on Linux commit cf51e4b9c34407bf0c3d9b582b7837e047e1df47
Add the register read-back, commenting why this is necessary.
Signed-off-by: Masahiro Yamada
---
drivers/mtd/nand/raw/denali.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/drivers/mtd/nand/raw/denali.c
The Denali NAND controller IP needs three clocks:
- clk: controller core clock
- clk_x: bus interface clock
- ecc_clk: clock at which ECC circuitry is run
Currently, only the first one (50MHz) is provided. The rest of the
two clock ports must be connected to the 200MHz clock line. Add
On 17/12/2018 21:34, Adam Ford wrote:
Borrowing from the updates to ti-musb.c, this glue layer checks
to see if the MUSB controller is gadget or host. Going under
the assumpution there is only one MUSB controller, this only builds
either the host probe or the gadget probe. OTG would be
On 19/12/2018 11:31, Jean-Jacques Hiblot wrote:
On 18/12/2018 13:08, Jagan Teki wrote:
On Thu, Nov 29, 2018 at 3:30 PM Jean-Jacques Hiblot
wrote:
UCLASS_USB_DEV_GENERIC was meant for USB devices connected to host
controllers, not gadget devices.
Adding a new UCLASS for gadget devices alone.
On 18/12/2018 13:08, Jagan Teki wrote:
On Thu, Nov 29, 2018 at 3:30 PM Jean-Jacques Hiblot wrote:
UCLASS_USB_DEV_GENERIC was meant for USB devices connected to host
controllers, not gadget devices.
Adding a new UCLASS for gadget devices alone.
Also move the generic DM code for USB gadgets in
i've just been handed an issue regarding a modified version of
u-boot v2015.07 and an unreliable designware MAC i'm hoping someone
can give me some guidance on while i continue to dig through the code
and continue testing.
ARM-based target board has, among other things, an ethernet debug
Dear Simon and Simon,
> Am 05.12.2018 um 14:57 schrieb Simon Glass:
> > This option has crept into use with some boards. Add a warning to
> > try to prevent this.
> >
> > As an example:
> > https://lists.denx.de/pipermail/u-boot/2017-September/304966.html
>
> We have just discussed this
On Wed, 2018-12-19 at 09:41 +0100, Marek Vasut wrote:
> On 12/19/2018 05:55 AM, Ang, Chee Hong wrote:
> >
> > On Tue, 2018-12-18 at 18:47 +0100, Marek Vasut wrote:
> > >
> > > On 12/18/2018 09:54 AM, chee.hong@intel.com wrote:
> > > >
> > > >
> > > > From: "Ang, Chee Hong"
> > > >
> > >
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