Re: [U-Boot] [PATCH v3 05/11] riscv: save hart ID in register tp instead of s0

> > From: Lukas Auer [mailto:lukas.a...@aisec.fraunhofer.de] > > Sent: Monday, March 18, 2019 2:29 AM > > To: u-boot@lists.denx.de > > Cc: Anup Patel; Andreas Schwab; Bin Meng; Atish Patra; Palmer Dabbelt; Lukas > > Auer; Atish Patra; Anup Patel; Rick Jian-Zhi Chen(陳建志) > > Subject: [PATCH v3

Re: [U-Boot] [PATCH v3 05/11] riscv: save hart ID in register tp instead of s0

On Mon, Mar 18, 2019 at 2:29 AM Lukas Auer wrote: > > The hart ID passed by the previous boot stage is currently stored in > register s0. If we divert the control flow inside a function, which is > required as part of multi-hart support, the function epilog may not be > called, clobbering

[U-Boot] [PATCH 3/3] clk: renesas: Add support for setting MMCIF clock divider on Gen2

Add code for configuring the MMC0CKCR/MMC1CKCR on Gen2 platforms. This allows the MMCIF driver to set higher clock rate if desired. Signed-off-by: Marek Vasut Cc: Nobuhiro Iwamatsu --- drivers/clk/renesas/clk-rcar-gen2.c | 42 + 1 file changed, 42 insertions(+)

[U-Boot] [PATCH] mmc: sh_mmcif: Set default MMCIF clock rate

Set MMCIF clock rate to 97.5 MHz, which is the default according to Gen2 datasheet. Signed-off-by: Marek Vasut Cc: Nobuhiro Iwamatsu Cc: Jaehoon Chung --- drivers/mmc/sh_mmcif.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/mmc/sh_mmcif.c b/drivers/mmc/sh_mmcif.c

[U-Boot] [PATCH 2/3] clk: renesas: Fix swapped div and mul in debug output on Gen2

The $div and $mul values were swapped in the debug output, fix this. Signed-off-by: Marek Vasut Cc: Nobuhiro Iwamatsu --- drivers/clk/renesas/clk-rcar-gen2.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/clk/renesas/clk-rcar-gen2.c

[U-Boot] [PATCH 1/3] clk: renesas: Fix SDH clock divider decoding on Gen2

The gen2_clk_get_sdh_div() function is supposed to look up the $val value read out of the SDCKCR register in the supplied table and return the matching divider value. The current implementation was matching the value from SDCKCR on the divider value in the table, which is wrong. Fix this and

[U-Boot] [PULL] u-boot-socfpga/master

The following changes since commit 9659eb46af6249b6e4b3712e60a1eb2e87fc48a1: Merge branch 'master' of git://git.denx.de/u-boot-samsung (2019-03-14 11:37:11 -0400) are available in the Git repository at: git://git.denx.de/u-boot-socfpga.git master for you to fetch changes up to

[U-Boot] [PULL] u-boot-usb/master

The following changes since commit 9659eb46af6249b6e4b3712e60a1eb2e87fc48a1: Merge branch 'master' of git://git.denx.de/u-boot-samsung (2019-03-14 11:37:11 -0400) are available in the Git repository at: git://git.denx.de/u-boot-usb.git master for you to fetch changes up to

[U-Boot] [PATCH] cmd: mmc: Make Mode: printout consistent

The "Mode :" line is the only one in "mmc info" output that has a space in front of the colon. Drop the space to make it consistent with the rest of the output, e.g.: => mmc dev 1 ; mmc info switch to partitions #0, OK mmc1 is current device Device: sd@ee16 Manufacturer ID: 3 OEM: 5344 Name:

[U-Boot] [PATCH] ARM: dts: rmobile: Increase off-on delay on the SD Vcc regulator

An ADATA 16GB Industrial MLC card has so much capacitance on the Vcc pin that the usual toggling of regulator to power the card off and on is insufficient. When the card is calibrated into UHS SDR104 mode, it will remain in that mode across the power cycle and subsequent attempt to communicate

[U-Boot] RSA in U-Boot

Hi, I'd like to discuss this topic in public. I will appreciate your comments here. # FYI, I now started to experimentally port linux's pkcs7/x509 # parser. Thanks, -Takahiro Akashi - Forwarded message from Simon Glass - Date: Thu, 7 Mar 2019 19:56:10 -0700 From: Simon Glass To:

Re: [U-Boot] [BUG] cb8af8af5ba0 "fs: fat: support write with non-zero offset" fatwrite followed by fatload and then cmp fails

On Mon, Mar 18, 2019 at 10:57:37AM +0900, Akashi, Takahiro wrote: > On Sun, Mar 17, 2019 at 09:44:20PM -0400, Tom Rini wrote: > > On Mon, Mar 18, 2019 at 10:42:31AM +0900, Akashi, Takahiro wrote: > > > Hi Faiz, > > > > > > On Tue, Mar 12, 2019 at 02:11:08PM +0530, Faiz Abbas wrote: > > > > Hi

Re: [U-Boot] [BUG] cb8af8af5ba0 "fs: fat: support write with non-zero offset" fatwrite followed by fatload and then cmp fails

On Sun, Mar 17, 2019 at 09:44:20PM -0400, Tom Rini wrote: > On Mon, Mar 18, 2019 at 10:42:31AM +0900, Akashi, Takahiro wrote: > > Hi Faiz, > > > > On Tue, Mar 12, 2019 at 02:11:08PM +0530, Faiz Abbas wrote: > > > Hi Akashi, > > > > > > On 11/09/18 12:29 PM, Akashi, Takahiro wrote: > > > > From:

Re: [U-Boot] [BUG] cb8af8af5ba0 "fs: fat: support write with non-zero offset" fatwrite followed by fatload and then cmp fails

On Mon, Mar 18, 2019 at 10:42:31AM +0900, Akashi, Takahiro wrote: > Hi Faiz, > > On Tue, Mar 12, 2019 at 02:11:08PM +0530, Faiz Abbas wrote: > > Hi Akashi, > > > > On 11/09/18 12:29 PM, Akashi, Takahiro wrote: > > > From: AKASHI Takahiro > > > > > > The current write implementation is quite

Re: [U-Boot] [BUG] cb8af8af5ba0 "fs: fat: support write with non-zero offset" fatwrite followed by fatload and then cmp fails

Hi Faiz, On Tue, Mar 12, 2019 at 02:11:08PM +0530, Faiz Abbas wrote: > Hi Akashi, > > On 11/09/18 12:29 PM, Akashi, Takahiro wrote: > > From: AKASHI Takahiro > > > > The current write implementation is quite simple: remove existing clusters > > and then allocating new ones and filling them

Re: [U-Boot] [PATCH] arm: timer: sunxi: fix a64 spurious timeout issues

On 17/03/2019 18:41, Oskari Lemmelä wrote: > On 3/17/19 6:04 PM, Peter Robinson wrote: >> On Sun, Mar 17, 2019 at 2:56 PM Oskari Lemmela >> wrote: >>> Fixes spurious timeouts which have been seen during testing >>> SPI_SUNXI driver. The false timeouts disappear when number of >>> bits reduced to

Re: [U-Boot] [PATCH v4 00/25] MTD defconfigs/Kconfigs/Makefiles heavy cleanup

On Sun, Mar 17, 2019 at 06:27:51PM +0100, Miquel Raynal wrote: > Jagan, > > Miquel Raynal wrote on Wed, 6 Mar 2019 > 10:21:44 +0100: > > > Hi Jagan, > > > > Miquel Raynal wrote on Wed, 20 Feb 2019 > > 08:08:58 +0100: > > > > > Hi Vignesh, > > > > > > Vignesh R wrote on Wed, 20 Feb 2019

Re: [U-Boot] Pull request for UEFI system for v2019.04-rc4

On Fri, Mar 15, 2019 at 07:47:49AM +0100, Heinrich Schuchardt wrote: > The following changes since commit e8e3f2d2d48f97b2c79b698eccedce8f4f880993: > > Merge branch '2019-03-08-master-imports' (2019-03-08 18:04:13 -0500) > > are available in the Git repository at: > >

Re: [U-Boot] Please pull u-boot-fsl-qoriq master

On Fri, Mar 15, 2019 at 12:54:43PM +, Prabhakar Kushwaha wrote: > Hi Tom, > > The following changes since commit 9ba5e5bc261a16f51662490da0cf620dc7f29013: > > Revert "env: add spi_flash_read_env function" (2019-03-13 20:32:09 -0400) > > are available in the git repository at: > >

Re: [U-Boot] [PATCH] arm: timer: sunxi: fix a64 spurious timeout issues

On 03/17/19 13:41, Oskari Lemmelä wrote: > On 3/17/19 6:04 PM, Peter Robinson wrote: >> On Sun, Mar 17, 2019 at 2:56 PM Oskari Lemmela wrote: >>> Fixes spurious timeouts which have been seen during testing >>> SPI_SUNXI driver. The false timeouts disappear when number of >>> bits reduced to 10 in

[U-Boot] [PATCH] env: add support to sunxi save env to spi

CONFIG_ENV_SECT_SIZE value is defined via Kconfig. Signed-off-by: Oskari Lemmela --- env/Kconfig | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/env/Kconfig b/env/Kconfig index c22cbbdadc..e1070187f2 100644 --- a/env/Kconfig +++ b/env/Kconfig @@ -456,9 +456,9 @@ config

Re: [U-Boot] [PATCH] arm: timer: sunxi: fix a64 spurious timeout issues

On 3/17/19 6:04 PM, Peter Robinson wrote: On Sun, Mar 17, 2019 at 2:56 PM Oskari Lemmela wrote: Fixes spurious timeouts which have been seen during testing SPI_SUNXI driver. The false timeouts disappear when number of bits reduced to 10 in workaround. The false timeouts are caused by timer

[U-Boot] [PATCH v3 09/11] riscv: hang if relocation of secondary harts fails

Print an error message and hang if smp_call_function() returns an error, indicating that relocation of the secondary harts has failed. Signed-off-by: Lukas Auer --- Changes in v3: - New patch to hang if relocation of secondary harts fails Changes in v2: None arch/riscv/cpu/start.S | 13

[U-Boot] [PATCH v3 07/11] riscv: boot images passed to bootm on all harts

Signed-off-by: Lukas Auer Reviewed-by: Anup Patel Reviewed-by: Bin Meng Tested-by: Bin Meng --- Changes in v3: None Changes in v2: None arch/riscv/lib/bootm.c | 13 - 1 file changed, 12 insertions(+), 1 deletion(-) diff --git a/arch/riscv/lib/bootm.c b/arch/riscv/lib/bootm.c

[U-Boot] [PATCH v3 08/11] riscv: do not rely on hart ID passed by previous boot stage

RISC-V U-Boot expects the hart ID to be passed to it via register a0 by the previous boot stage. Machine mode firmware such as BBL and OpenSBI do this when starting their payload (U-Boot) in supervisor mode. If U-Boot is running in machine mode, this task must be handled by the boot ROM.

[U-Boot] [PATCH v3 10/11] riscv: fu540: enable SMP

Signed-off-by: Lukas Auer Reviewed-by: Anup Patel Reviewed-by: Bin Meng --- Changes in v3: None Changes in v2: - New patch to enable SMP on the SiFive FU540, which was previously sent independently board/sifive/fu540/Kconfig | 1 + 1 file changed, 1 insertion(+) diff --git

[U-Boot] [PATCH v3 11/11] riscv: qemu: enable SMP

Signed-off-by: Lukas Auer Reviewed-by: Anup Patel Reviewed-by: Bin Meng Tested-by: Bin Meng --- Changes in v3: None Changes in v2: None board/emulation/qemu-riscv/Kconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/board/emulation/qemu-riscv/Kconfig

[U-Boot] [PATCH v3 03/11] riscv: implement IPI platform functions using SBI

The supervisor binary interface (SBI) provides the necessary functions to implement the platform IPI functions riscv_send_ipi() and riscv_clear_ipi(). Use it to implement them. This adds support for inter-processor interrupts (IPIs) on RISC-V CPUs running in supervisor mode. Support for machine

[U-Boot] [PATCH v3 05/11] riscv: save hart ID in register tp instead of s0

The hart ID passed by the previous boot stage is currently stored in register s0. If we divert the control flow inside a function, which is required as part of multi-hart support, the function epilog may not be called, clobbering register s0. Save the hart ID in the unallocatable register tp

[U-Boot] [PATCH v3 06/11] riscv: add support for multi-hart systems

On RISC-V, all harts boot independently. To be able to run on a multi-hart system, U-Boot must be extended with the functionality to manage all harts in the system. All harts entering U-Boot are registered in the available_harts mask stored in global data. A hart lottery system as used in the

[U-Boot] [PATCH v3 02/11] riscv: import the supervisor binary interface header file

Import the supervisor binary interface (SBI) header file from Linux (arch/riscv/include/asm/sbi.h). The last change to it was in commit 6d60b6ee0c97 ("RISC-V: Device, timer, IRQs, and the SBI"). Signed-off-by: Lukas Auer Reviewed-by: Anup Patel Reviewed-by: Bin Meng Reviewed-by: Atish Patra

[U-Boot] [PATCH v3 04/11] riscv: delay initialization of caches and debug UART

Move the initialization of the caches and the debug UART until after board_init_f_init_reserve. This is in preparation for SMP support, where code prior to this point will be executed by all harts. This ensures that initialization will only be performed once on the main hart running U-Boot.

[U-Boot] [PATCH v3 00/11] SMP support for RISC-V

This patch series adds SMP support for RISC-V to U-Boot. It allows U-Boot to run on multi-hart systems (hart is the RISC-V terminology for hardware thread). Images passed to bootm will be started on all harts. The bootm command is currently the only one that will boot images on all harts, bootefi

[U-Boot] [PATCH v3 01/11] riscv: add infrastructure for calling functions on other harts

Harts on RISC-V boot independently, U-Boot is responsible for managing them. Functions are called on other harts with smp_call_function(), which sends inter-processor interrupts (IPIs) to all other available harts. Available harts are those marked as available in the device tree and present in the

[U-Boot] [PATCH] arm: kirkwood: lsxl: disable dcache

Both the network as well as the USB driver are not working with the data cache enabled. Signed-off-by: Michael Walle --- include/configs/lsxl.h | 1 + 1 file changed, 1 insertion(+) diff --git a/include/configs/lsxl.h b/include/configs/lsxl.h index 9d4be18413..728263910e 100644 ---

Re: [U-Boot] [PATCH v3 11/12] ARM: kirkwood: enable CONFIG_DM_USB for lschlv2 and lsxhl

Hi Chris, Am 2019-03-13 08:47, schrieb Chris Packham: Enable CONFIG_DM_USB and CONFIG_BLK. Signed-off-by: Chris Packham Reviewed-by: Stefan Roese Tested-by: Michael Walle works at least after I switch off the dcache, but that another issue ;) Thanks, -michael --- Changes in v3: None

Re: [U-Boot] [PATCH v4 00/25] MTD defconfigs/Kconfigs/Makefiles heavy cleanup

Jagan, Miquel Raynal wrote on Wed, 6 Mar 2019 10:21:44 +0100: > Hi Jagan, > > Miquel Raynal wrote on Wed, 20 Feb 2019 > 08:08:58 +0100: > > > Hi Vignesh, > > > > Vignesh R wrote on Wed, 20 Feb 2019 10:50:18 +0530: > > > > > Hi Jagan, > > > > > > On 09/12/18 11:37 PM, Miquel Raynal

Re: [U-Boot] [PATCH] arm: timer: sunxi: fix a64 spurious timeout issues

On Sun, Mar 17, 2019 at 2:56 PM Oskari Lemmela wrote: > > Fixes spurious timeouts which have been seen during testing > SPI_SUNXI driver. The false timeouts disappear when number of > bits reduced to 10 in workaround. > > The false timeouts are caused by timer backward jumps. Wouldn't it be best

Re: [U-Boot] [PATCH] arm: socfpga: make SPL_TEXT_BASE overridable

On Sun, Mar 17, 2019 at 08:54:08AM -0400, Tom Rini wrote: > On Sat, Mar 16, 2019 at 10:16:24PM +0100, Simon Goldschmidt wrote: > > > > > > On 16.03.19 13:50, Marek Vasut wrote: > > >On 3/16/19 1:36 PM, Simon Goldschmidt wrote: > > >> > > >> > > >>On Saturday, March 16, 2019, Marek Vasut >

[U-Boot] [PATCH] arm: timer: sunxi: fix a64 spurious timeout issues

Fixes spurious timeouts which have been seen during testing SPI_SUNXI driver. The false timeouts disappear when number of bits reduced to 10 in workaround. The false timeouts are caused by timer backward jumps. Signed-off-by: Oskari Lemmela --- arch/arm/cpu/armv8/generic_timer.c | 2 +- 1 file

Re: [U-Boot] passing info from SPL to U-Boot

> On 17.03.2019, at 15:12, Simon Glass wrote: > > Well, my thinking is that GD is actually a set of pointers, with the > actual data stored elsewhere. The nice thing about bloblist is that it > is a contiguous block of a set size, which holds data used by > different parts of U-Boot (e.g.

Re: [U-Boot] passing info from SPL to U-Boot

Hi Wolfgang, On Sun, 17 Mar 2019 at 20:01, Wolfgang Denk wrote: > > Dear Simon, > > In message > you > wrote: > > > > > First, we have GD, which exists since the dawn of U-Boot, which was > > > intended to pass data between boot stages (by then, before and after > > > relocation), but

Re: [U-Boot] [PATCH] arm: socfpga: make SPL_TEXT_BASE overridable

On Sat, Mar 16, 2019 at 10:16:24PM +0100, Simon Goldschmidt wrote: > > > On 16.03.19 13:50, Marek Vasut wrote: > >On 3/16/19 1:36 PM, Simon Goldschmidt wrote: > >> > >> > >>On Saturday, March 16, 2019, Marek Vasut >>> wrote: > >> > >> On 3/16/19 9:23 AM, Simon

Re: [U-Boot] [PATCH] test/py: Fix pytest4 deprecation warnings

On Wed, Mar 13, 2019 at 09:01:53PM -0400, Tom Rini wrote: > On Thu, Mar 14, 2019 at 01:20:09AM +0100, Marek Vasut wrote: > > On 3/13/19 8:42 PM, Tom Rini wrote: > > > On Wed, Mar 13, 2019 at 07:23:15PM +0100, Marek Vasut wrote: > > >> On 3/13/19 5:01 PM, Tom Rini wrote: > > >>> On Wed, Mar 13,

Re: [U-Boot] passing info from SPL to U-Boot

Dear Simon, In message you wrote: > > > First, we have GD, which exists since the dawn of U-Boot, which was > > intended to pass data between boot stages (by then, before and after > > relocation), but apparently it has never been used for passing > > information between SPL and U-Boot proper.

Re: [U-Boot] Sunxi H5 and CONFIG_ENV_IS_IN_MMC problem

On 16/03/2019 14:07, g...@novadsp.com wrote: > Greetings > > Our board has an AllWinner H5 with SPI flash and eMMC. Since SPI flash > support for 'saveenv' is not currently mainline, I thought I'd simply use > one of the eMMC boot blocks to persist the environment. However I keep > running into