hi
just a gentle ping...
you waiting for next merge window?
Regards Frank
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On Tue, Oct 01, 2019 at 10:05:15PM +0800, Bin Meng wrote:
> Hi Tom,
>
> This includes the following x86 changes for v2019.10:
>
> - Propagate acpi_rsdp_addr to x86 kernel via boot parameters
>
> The following changes since commit 023ff4b88dcec5faa3f9b841bae4d3d232b58ce2:
>
> Merge tag
On Tue, Oct 01, 2019 at 04:32:12PM +0200, Matthias Brugger wrote:
> Hi Tom,
>
> As we got the the libftd fixes merged [1], I would propose to also add the
> commit in belows pull request. When booting grub from U-Boot, without this
> patch
> Linux will just see the first 1GB of RAM instead of
Hi Bin,
On Wed, 25 Sep 2019 at 08:58, Simon Glass wrote:
>
> Apollolake is an Intel SoC generation aimed at relatively low-end embedded
> systems. It was released in 2016 but has become more popular recently with
> some embedded boards using it.
>
> This series adds support for apollolake. As an
On Wed, Oct 2, 2019 at 8:00 AM Bin Meng wrote:
>
> On Wed, Sep 25, 2019 at 10:00 PM Simon Glass wrote:
> >
> > This header file is the same for FSP v1 and v2. Move it into the general
> > fsp directory.
> >
> > Signed-off-by: Simon Glass
> > Reviewed-by: Bin Meng
> > ---
> >
> > Changes in v3:
On Wed, Sep 25, 2019 at 10:00 PM Simon Glass wrote:
>
> This header file is the same for FSP v1 and v2. Move it into the general
> fsp directory.
>
> Signed-off-by: Simon Glass
> Reviewed-by: Bin Meng
> ---
>
> Changes in v3: None
> Changes in v2: None
>
> arch/x86/include/asm/{fsp1 =>
Hi Simon,
On Wed, Oct 2, 2019 at 1:39 AM Simon Glass wrote:
>
> Hi Bin,
>
> On Tue, 1 Oct 2019 at 04:59, Bin Meng wrote:
> >
> > Hi Simon,
> >
> > On Wed, Sep 25, 2019 at 10:00 PM Simon Glass wrote:
> > >
> > > This header file is the same for FSP v1 and v2. Move it into the general
> > > fsp
From: Joseph Chen
Trusted-Firmware can also initialize a secure payload to use as a trusted
execution environment. In general for the arm64 case this is provided as
separate image and uboot is supposed to also place it in a predetermined
location in memory and add the necessary parameters to the
A trusted execution environment should also get loaded as loadable from
a fit image, so add the possibility to present a tee.elf to make_fit_atf.py
that then gets included as additional loadable into the generated its.
For ease of integration the additional loadable is created as atf_(x+1)
after
This adds basic support for the Nitrogen8M board. It's based on
the NXP i.MX8MQ and provides 2GB of memory. This code has been
based on the i.MX8M EVK board support, and Boundary Devices' git
repository. So far the eMMC and onboard Ethernet can be used to
boot, with more device support yet to
Hi Bin,
On Tue, 1 Oct 2019 at 04:59, Bin Meng wrote:
>
> Hi Simon,
>
> On Wed, Sep 25, 2019 at 10:00 PM Simon Glass wrote:
> >
> > This header file is the same for FSP v1 and v2. Move it into the general
> > fsp directory.
> >
> > Signed-off-by: Simon Glass
> > ---
> >
> > Changes in v3:
> > -
Enable the DM based GPIO driver for FU540-C000 SoC.
Signed-off-by: Sagar Shrikant Kadam
Reviewed-by: Bin Meng
Tested-by: Bin Meng
---
board/sifive/fu540/Kconfig | 3 +++
1 file changed, 3 insertions(+)
diff --git a/board/sifive/fu540/Kconfig b/board/sifive/fu540/Kconfig
index
On 01/10/2019 16:32, Matthias Brugger wrote:
> Hi Tom,
>
> As we got the the libftd fixes merged [1], I would propose to also add the
> commit in belows pull request. When booting grub from U-Boot, without this
> patch
> Linux will just see the first 1GB of RAM instead of all the memory
This patch adds a DM based driver model for gpio controller present in
FU540-C000 SoC on HiFive Unleashed A00 board. This SoC has one GPIO
bank and 16 GPIO lines in total, out of which GPIO0 to GPIO9 and
GPIO15 are routed to the J1 header on the board.
This implementation is ported from linux
U-Boot currently is missing GPIO support for FU540-C000 SoC which is
mounted on HiFive Unleashed A00 board. This patch is intended to add DM
based GPIO controller driver in order to access GPIO pins within the SoC
using GPIO command in U-Boot. More details on the GPIO controller within
the SoC can
On 27/09/2019 18:05, Tom Rini wrote:
> Hey all,
>
> I'm currently kicking test.py to use Python 3 instead of Python 2.7 and
> seeing places where it would (seemingly) be nice to be able to say that
> we have Python 3.6 as our minimum version. To do this however we'll
> have to tell people
On 25/09/2019 11:51, Matthias Brugger wrote:
> Hi,
>
> On 19/09/2019 13:51, Pi NewBie wrote:
>> With top of the tree(tot) uboot, and tot firmware, uboot command bdinfo
>> shows the dram bank size as 0x3b40 which is <1G, but the
>> rpi4 board has 4G of ram.
>>
>> However with
The memory allocated to store the FIT image containing SYSFW and board
configuration data is statically defined to the largest size expected.
This was 269000 bytes but now needs to be grown to 276000 to make room
for the signatures attached to the board configuration data on High
Security devices.
Hi Tom,
As we got the the libftd fixes merged [1], I would propose to also add the
commit in belows pull request. When booting grub from U-Boot, without this patch
Linux will just see the first 1GB of RAM instead of all the memory present.
Please pull :)
Regards,
Matthias
[1]
Hi Tom,
This includes the following x86 changes for v2019.10:
- Propagate acpi_rsdp_addr to x86 kernel via boot parameters
The following changes since commit 023ff4b88dcec5faa3f9b841bae4d3d232b58ce2:
Merge tag 'u-boot-atmel-fixes-2019.10-a' of
For some controllers PHYs can be optional. Handling NULL pointers without
crashing nor failing, makes it easy to handle optional PHYs.
Signed-off-by: Jean-Jacques Hiblot
---
drivers/phy/phy-uclass.c | 30 +-
include/generic-phy.h| 2 +-
2 files changed, 26
Add a new bcdDevice entry for Cadence USB gadget controller similar to
other controller and add gadget_is_cdns3() macro as well.
Signed-off-by: Vignesh Raghavendra
---
drivers/usb/gadget/gadget_chips.h | 8
1 file changed, 8 insertions(+)
diff --git a/drivers/usb/gadget/gadget_chips.h
Add driver to handle TI specific wrapper for Cadence USB3 controller
present on J721e SoC. Based on Linux driver for the same.
Signed-off-by: Vignesh Raghavendra
---
drivers/usb/cdns3/Kconfig| 7 ++
drivers/usb/cdns3/Makefile | 2 +
drivers/usb/cdns3/cdns3-ti.c | 193
Add match_ep() op to usb_gadget_ops similar to Linux kernel which is
useful in finding a suitable ep match for the function driver. This will
avoid adding more gadget_is_xxx() handling code to usb_ep_autoconfig().
Also sync usb_ep_caps struct thats is usually used in the match_ep()
callback by
Import for_each_set_bit() and associated macros and functions from
Linux. This is useful in parsing interrupt registers and take action on
each bit that is set.
Signed-off-by: Vignesh Raghavendra
---
include/linux/bitmap.h | 61 ++
1 file changed, 61
Implement udc_set_speed() callback to limit Controller's speed to
high-speed/full-speed when working with gadgets that are high-speed or
full-speed only
Signed-off-by: Vignesh Raghavendra
---
drivers/usb/cdns3/gadget.c | 30 ++
1 file changed, 26 insertions(+), 4
Import list_first_entry_or_null() macro from Linux that would be used
by Cadence USB driver
Signed-off-by: Vignesh Raghavendra
---
include/linux/list.h | 14 ++
1 file changed, 14 insertions(+)
diff --git a/include/linux/list.h b/include/linux/list.h
index
From: Sherry Sun
This patch was copied from kernel commit: 67fdfda4a99ed.
Sometimes, the gadget driver we want to run has max_speed lower than
what the UDC supports. In such situations, UDC might want to make sure
we don't try to connect on speeds not supported by the gadget
driver because that
This series adds support for Cadence USB Host and Gadget controller
drivers. This is borrowed directly from Linux kernel v5.4-rc1.
Driver as such supports both 3.0 and 2.0 speeds. But USB 3.0 requires a
PHY driver which will be added in a separate follow series
Patch 7 adds TI wrapper driver for
Add a test to verify that GPIOs can be acquired/released using the managed
API. Also check that the GPIOs are released when the consumer device is
removed.
Signed-off-by: Jean-Jacques Hiblot
---
arch/sandbox/dts/test.dts | 10
test/dm/gpio.c| 102
Prepare the way for a managed GPIO API by handling NULL pointers without
crashing nor failing.
VALIDATE_DESC() and validate_desc() come straight from Linux.
Signed-off-by: Jean-Jacques Hiblot
---
drivers/gpio/gpio-uclass.c | 66 --
include/asm-generic/gpio.h
Add managed functions to get a gpio from the devce-tree, based on a
property name (minus the '-gpios' suffix) and optionally an index.
When the device is unbound, the GPIO is automatically released and the
data structure is freed.
Signed-off-by: Jean-Jacques Hiblot
---
This is the 4th of a few series, the goal of which is to facilitate
porting drivers from the linux kernel. Most of the series will be about
adding managed API to existing infrastructure (GPIO, reset, phy,...)
This particular series is about GPIOs. It adds a managed API using the
API as Linux. To
Hi Jagan,
On Tue, Oct 1, 2019 at 7:09 PM Jagan Teki wrote:
>
> Hi Bin,
>
> On Sun, Sep 29, 2019 at 1:29 PM Bin Meng wrote:
> >
> > Hi Jagan,
> >
> > On Sun, Sep 29, 2019 at 3:42 PM Jagan Teki
> > wrote:
> > >
> > > This patchset, enable SPI-NOR flash on SiFive hifive-unleashed-a00
> > >
On Mon, Sep 30, 2019 at 3:35 PM Bin Meng wrote:
>
> On Sun, Sep 29, 2019 at 3:43 PM Jagan Teki wrote:
> >
> > HiFive Unleashed A00 has internal is25wp256 spi-nor flash,
>
> What does "internal" mean? The flash is mounted "externally" to the FU540 SoC.
>
> > so enable the same. added test result
On Mon, Sep 30, 2019 at 3:35 PM Bin Meng wrote:
>
> Hi Jagan,
>
> On Sun, Sep 29, 2019 at 3:43 PM Jagan Teki wrote:
> >
> > Add u-boot specific dts file for hifive-unleashed-a00, this
> > would help to add u-boot specific properties and other node
> > changes without touching the base dts(i)
Hi Bin,
On Sun, Sep 29, 2019 at 1:29 PM Bin Meng wrote:
>
> Hi Jagan,
>
> On Sun, Sep 29, 2019 at 3:42 PM Jagan Teki wrote:
> >
> > This patchset, enable SPI-NOR flash on SiFive hifive-unleashed-a00
> > board.
> >
> > patch 0001 - 02: support devicetree
> >
> > patch 0003: add is25wp256 chip
>
On Mon, Sep 30, 2019 at 3:35 PM Bin Meng wrote:
>
> Hi Jagan,
>
> On Sun, Sep 29, 2019 at 3:42 PM Jagan Teki wrote:
> >
> > Sync the hifive-unleashed-a00 dts from Linux with
> > below commit details:
> > commit 11ae2d892139a1086f257188d457ddcb71ab5257
>
> The latest commit should be:
>
> commit
>-Original Message-
>From: Wasim Khan
>Sent: Tuesday, October 1, 2019 4:27 PM
>To: Priyanka Jain ; albert.u.b...@aribaud.net
>Cc: u-boot@lists.denx.de; Wasim Khan
>Subject: [PATCH] armv8: lx2160a: Update LX2160 SVR value
>
>LX2160 SVR value should be 0x873600 by default.
>value 0x873601
Hi Simon,
On Wed, Sep 25, 2019 at 10:00 PM Simon Glass wrote:
>
> This header file is the same for FSP v1 and v2. Move it into the general
> fsp directory.
>
> Signed-off-by: Simon Glass
> ---
>
> Changes in v3:
> - Drop struct efi_guid and add a comment about forward declarations
>
> Changes
LX2160 SVR value should be 0x873600 by default.
value 0x873601 is valid only if CAN fuse is blown.
Signed-off-by: Wasim Khan
---
arch/arm/include/asm/arch-fsl-layerscape/soc.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/include/asm/arch-fsl-layerscape/soc.h
On Tue, Oct 1, 2019 at 6:18 PM Bin Meng wrote:
>
> On Fri, Sep 13, 2019 at 11:42 PM Andy Shevchenko
> wrote:
> >
> > This is reincarnation of the U-Boot
> >
> > commit 3469bf4274540d1491d58e878a9edc0bdcba17ac
> > Author: Andy Shevchenko
> > Date: Wed Jan 10 19:40:15 2018 +0200
> >
> >
On Fri, Sep 13, 2019 at 11:42 PM Andy Shevchenko
wrote:
>
> This is reincarnation of the U-Boot
>
> commit 3469bf4274540d1491d58e878a9edc0bdcba17ac
> Author: Andy Shevchenko
> Date: Wed Jan 10 19:40:15 2018 +0200
>
> x86: zImage: Propagate acpi_rsdp_addr to kernel via boot parameters
>
>
From: Tudor Ambarus
Enable the SPI NOR SFDP support and the Microchip QSPI driver.
CONFIG_SPI_FLASH_SFDP_SUPPORT enables the SFDP Vendor parser,
and for the Microchip case, the retrieval of the ethaddr from
the SPI NOR flash.
While touching the SPI NOR logic, sync with the
From: Tudor Ambarus
CONFIG_SPI_FLASH_SFDP_SUPPORT enables the SFDP Vendor parser,
and for the Microchip case, the retrieval of the ethaddr from
the SPI NOR flash.
Signed-off-by: Tudor Ambarus
---
configs/sama5d27_wlsom1_ek_qspiflash_defconfig | 3 ++-
1 file changed, 2 insertions(+), 1
From: Tudor Ambarus
The SST26VF064BEUI spi-nor flash is programmed at the factory with a
globally unique address stored in the SFDP vendor parameter table and
it is permanently writeprotected. Retrieve the EUI-48 address and set it
as ethaddr env.
Signed-off-by: Tudor Ambarus
---
From: Tudor Ambarus
Parse manufacturer specific SFDP table. The Microchip SFDP table
contains pre-programmed globally unique MAC addresses. Retrieve
the MAC address from the SPI NOR flash and set it in ethaddr in env.
This can go through Eugen's tree if no obiections. Otherwise Eugen
should
From: Tudor Ambarus
JESD216 allow vendors to define their own SFDP tables.
Add Microchip SFDP parser. The vendor table is allocated using
resource-managed kmalloc - the table will be freed on driver detach.
It will be accessible by getting the UCLASS_SPI_FLASH's private data.
The Michrochip's
Hi Andreas,
On 02/09/2019 14:19, Andreas Färber wrote:
> Hi Neil,
>
> This mini-series adds initial support for Amlogic A311D based Khadas VIM3.
>
> v2 fixes an oversight and adds some cleanups.
>
> Regards,
> Andreas
>
> v1 -> v2:
> * Fixed branch name in README
> * Mention linux-next tag
Hi Tom and Wolfgang,
> From: Patrick DELAUNAY
> Sent: jeudi 26 septembre 2019 11:58
>
> Hi Tom,
>
> > From: Tom Rini
> > Sent: vendredi 20 septembre 2019 21:03
> >
> > On Fri, Sep 20, 2019 at 11:09:14AM +0200, Stefan Roese wrote:
> > > Hi Patrick,
> > >
> > > On 18.09.19 11:29, Patrick
On Tue, Oct 1, 2019 at 6:58 AM wrote:
>
>
>
> On 09/27/2019 07:43 AM, Vignesh Raghavendra wrote:
> > External E-Mail
> >
> >
> > Older variants of n25q256* and n25q512* do not support 4 Byte stateless
>
> nit: drop "older variants of". Looks like the latest datasheet still require
> ENTER and
On Tue, Oct 1, 2019 at 7:23 AM wrote:
>
>
>
> On 09/27/2019 07:43 AM, Vignesh Raghavendra wrote:
> > External E-Mail
> >
> >
> > mt25qu512a flash has Flag status register that indicates various errors
> > that may be encountered during erase/write operations. Therefore add
> > USE_FSR flag to the
Wolfgang,
I haven't seen any comments from you in the last one month.
Could you please take time to review this patch? I'd like to
confirm whether you can agree to my approach here or not
in order to take the next step.
Thanks,
-Takahiro Akashi
On Thu, Sep 05, 2019 at 05:21:14PM +0900, AKASHI
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