We use struct clk here so really should include this header file to avoid
build errors. Also switch the order of clk.h in the C file to match the
required code style.
Signed-off-by: Simon Glass
Reviewed-by: Ley Foon Tan
---
Changes in v2: None
drivers/i2c/designware_i2c.c | 2 +-
On Sun, Dec 29, 2019 at 01:47:32PM +0100, Dario Binacchi wrote:
> As described in doc/README.asn1 document the tools/asn1_compiler is used
> to "generate bytecode as a C file (*.asn1.[ch]) from *.asn1 file".
>
> Signed-off-by: Dario Binacchi
Applied to u-boot/master, thanks!
--
Tom
Update this driver to use the new standard enums for speed.
Signed-off-by: Simon Glass
---
Changes in v2: None
drivers/i2c/designware_i2c.c | 10 +-
drivers/i2c/designware_i2c.h | 13 -
2 files changed, 5 insertions(+), 18 deletions(-)
diff --git
Rockchip has documentation file, doc/README.rockchip but
which is not so readable to add or understand the existing
contents. Even the format that support is legacy readme
in U-Boot.
Add rockchip specific documentation file using new rst
format, which describes the information about Rockchip
On Fri, Jan 3, 2020 at 12:17 PM Tom Rini wrote:
>
> Adam Ford reports that this change breaks booting on da850-evm and
> Bartosz Golaszewski agrees that with the impending release we should
> revert the change for now. With that noted:
>
Is patchwork working? I tried to go there and I am not
Hi Igor,
On 27/12/19 10:23, Igor Opaniuk wrote:
> Hi Breno,
>
> On Mon, Dec 23, 2019 at 7:07 PM Breno Matheus Lima
> wrote:
>>
>> Hi Igor,
>>
>> Em qui., 19 de dez. de 2019 às 07:55, Igor Opaniuk
>> escreveu:
>>>
>>> From: Igor Opaniuk
>>>
>>> Currently Colibri iMX7 NAND version doesn't boot
On 1/2/20 12:28 PM, Tuomas Tynkkynen wrote:
Hi Heinrich,
On Wed, 1 Jan 2020 at 19:58, Heinrich Schuchardt wrote:
Dear all,
I want to run qemu_arm64_defconfig with 4G.
qemu-system-aarch64 -machine virt -m 4G -smp cores=2 \
-bios u-boot.bin -cpu cortex-a53 -nographic -gdb tcp::1234
This is v6 set for Binman support in rockchip, [1] here is
previous patchset.
This series add single boot image with binman for arm32 and
pad_cat for arm64 rockchip platforms both TPL + SPL and SPL-alone
targets.
Changes for v6:
- drop idbloader.img filename change patch
- update rockchip.rst to
On 1/2/20 1:30 PM, Stefan Roese wrote:
> Hi Mauro,
>
> On 30.12.19 13:14, Mauro Condarelli wrote:
>>
>>
>> On 12/30/19 11:22 AM, Daniel Schwierzeck wrote:
>>>
>>> Am 30.12.19 um 10:19 schrieb Mauro Condarelli:
I am having problems with this patch.
Problem is "reset"command fails
On 03.01.20 23:08, Andre Przywara wrote:
Commit 27c3f70f3b50 ("net: phy: Increase link up delay in
genphy_update_link()") increased the per-iteration waiting time from
1ms to 50ms, without adjusting the timeout counter. This lead to the
timeout increasing from the typical 4 seconds to over three
Hi Mauro,
On 30.12.19 13:14, Mauro Condarelli wrote:
On 12/30/19 11:22 AM, Daniel Schwierzeck wrote:
Am 30.12.19 um 10:19 schrieb Mauro Condarelli:
I am having problems with this patch.
Problem is "reset"command fails (for my board) with:
=> reset
resetting ...
### ERROR ### Please RESET
Hi,
I'm facing a strange problem that took quite a while to analyze.
I'm porting U-Boot to a new board and thus some problem is expected.
I am also trying to configure U-Boot in a useful (for my purposes) way.
I decided to switch Environment storage from SPI NOR to SD card (in a
file in FAT
Hi Pragnesh,
On Tue, Dec 31, 2019 at 10:00 PM Pragnesh Patel
wrote:
>
> Added headers needed by upcoming SPL support of FU540.
>
> This headers are leveraged from FSBL
> (https://github.com/sifive/freedom-u540-c000-bootloader.git)
>
> Signed-off-by: Pragnesh Patel
> ---
>
I would like to implement an update system (most likely using SWUpdate)
"Double copy with fall-back" and, possibly a "last resort" recovery.
I have pretty clear what should be the program flow, but I don't know
how to implement it in U-Boot.
In particular:
* How can I determine, in U-Boot, if
Hi Simon,
On Fri, Jan 3, 2020 at 11:24 AM Simon Glass wrote:
>
> Hi Bin,
>
> On Thu, 2 Jan 2020 at 19:41, Bin Meng wrote:
> >
> > Hi Simon,
> >
> > On Fri, Jan 3, 2020 at 10:30 AM Simon Glass wrote:
> > >
> > > Hi Anatolij,
> > >
> > > On Thu, 2 Jan 2020 at 07:34, Anatolij Gustschin wrote:
>
Hi Anatolij,
On Thu, 2 Jan 2020 at 07:34, Anatolij Gustschin wrote:
>
> Hi Simon,
>
> On Fri, 20 Dec 2019 18:10:33 -0700
> Simon Glass s...@chromium.org wrote:
>
> > Most x86 boards that use video make use of 32bpp graphics. Enable this by
> > default. This fixes missing graphics output on some
On 12/31/19 3:42 AM, Cristian Ciocaltea wrote:
On Mon, Dec 30, 2019 at 09:03:38PM +0100, Heinrich Schuchardt wrote:
On 12/30/19 8:32 PM, Stephen Warren wrote:
On 12/30/19 12:05 PM, Heinrich Schuchardt wrote:
On 12/30/19 5:38 PM, Stephen Warren wrote:
On 12/30/19 3:52 AM, Heinrich Schuchardt
At present the driver uses an approximation for the bus clock, e.g. 166MHz
instead of 166 2/3 MHz.
This can result in small errors in the resulting I2C speed, perhaps 0.5%
or so.
Adjust the existing code to start from the accurate figure, even if later
rounding reduces this accuracy.
Update the
Bring in this file from Linux v5.4.
Signed-off-by: Simon Glass
---
Changes in v2: None
.../i2c/i2c-designware.txt| 73 +++
1 file changed, 73 insertions(+)
create mode 100644 doc/device-tree-bindings/i2c/i2c-designware.txt
diff --git
The DSPI node of DTS in kernel is spi, so fix the "/soc/dspi@"
ot "/soc/spi@".
The DSPI2 and I2C5 is muxed, and the DSPI2 default status is okay,
so must set the DSPI2 status is disabled if the pin use to I2C5.
Signed-off-by: Xiaowei Bao
---
board/freescale/lx2160a/lx2160a.c | 12 +++-
Commit 27c3f70f3b50 ("net: phy: Increase link up delay in
genphy_update_link()") increased the per-iteration waiting time from
1ms to 50ms, without adjusting the timeout counter. This lead to the
timeout increasing from the typical 4 seconds to over three minutes.
Adjust the timeout counter
Some drivers define their own speed enums and use their own constants for
speed. It makes sense to have a unified defition of the different speeds.
Since many controllers have to do different things for fast/high speed, it
is a good idea to have an enum for the mode.
Add these as well as an enum
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