Re: u-boot 32-bit on Raspberry Pi 4

January 17, 2020 7:59 PM, "Jaehoon Chung" wrote: > On 1/18/20 10:53 AM, Jaehoon Chung wrote: > >> Hi >> >> On 1/18/20 9:22 AM, Alexander von Gluck IV wrote: >>> Has anyone successfully used u-boot on the Raspberry Pi 4 in 32-bit mode? >> >> I'm using 32-bit u-boot on RPI4 board with Tizen

Re: u-boot 32-bit on Raspberry Pi 4

On 1/18/20 10:53 AM, Jaehoon Chung wrote: > Hi > > On 1/18/20 9:22 AM, Alexander von Gluck IV wrote: >> Has anyone successfully used u-boot on the Raspberry Pi 4 in 32-bit mode? > > I'm using 32-bit u-boot on RPI4 board with Tizen Platform. > You can refer to tizen u-boot git. Also I modified

Re: [PATCH 0/3] Fix Odroid U3/X2 SD-card boot

Hi Marek, On 1/17/20 12:25 AM, Marek Szyprowski wrote: > Hi All > > This patchset restores booting from SD-card on Exynos4412-based Odroid > U3/X2 boards. It relies on the Exynos MMC device id auto-dectection and > PMIC device name fixes: > https://patchwork.ozlabs.org/patch/1223558/ >

Re: u-boot 32-bit on Raspberry Pi 4

Hi On 1/18/20 9:22 AM, Alexander von Gluck IV wrote: > Has anyone successfully used u-boot on the Raspberry Pi 4 in 32-bit mode? I'm using 32-bit u-boot on RPI4 board with Tizen Platform. You can refer to tizen u-boot git. Also I modified some configurations.

u-boot 32-bit on Raspberry Pi 4

Has anyone successfully used u-boot on the Raspberry Pi 4 in 32-bit mode? Building via the following: make rpi_4_32b_defconfig ARCH=arm CROSS_COMPILE=arm-none-eabi- make Booting via: * u-boot.bin on Fat32 partition * start.elf from * config.txt on Fat32 partition kernel=u-boot.bin

Re: [RFC WIP PATCH v1 6/7] wandboard: add u-boot specific *wandboard-revd1-u-boot.dtsi

Hi Heiko, On Thu, Jan 16, 2020 at 3:18 AM Heiko Schocher wrote: > Ah, ok, I can add it ... wait for your testing results. I haven't had a chance to test this series, sorry, but after thinking more about it I would prefer to test an improved version of this series because: 1. is_revd1() needs

[PATCH] rockchip: make the global board_fit_config_name_match __weak

From: Heiko Stuebner The core Rockchip spl code contains a default board_fit_config_name_match implementation doing nothing. Individual boards may want to handle this differently, so add a __weak atribute to make it possible to override this function in other places. Signed-off-by: Heiko

[PATCH] rockchip: make_fit_atf: use correct fdt_x references in config nodes

From: Heiko Stuebner The script iterates over the given devicetrees and creates both fdt_x node as well as a conf-node for each passed dt. But there is a slight bug in that it always references fdt_1 in each conf node instead of the matching fdt_x as expected. So fix that by referencing the

[PATCH v4 1/2] Kconfig: add btrfs to distro boot

From: Matthias Brugger Some distributions use btrfs as the default file system. Enable btrfs support by default when using distro boot for all architectures but riscv, as it breaks compilation due to size problems. Signed-off-by: Matthias Brugger --- Changes in v4: - do not build for MIPS

[PATCH v4 2/2] configs: Re-sync with CONFIG_DISTRO_DEFAULTS

From: Matthias Brugger CONFIG_DISTRO_DEFAULTS now enables CMD_BTRFS by default, we can delete the config option in the corresponding default configs. Other boards won't build with btrfs enabled so disable the support by default. Signed-off-by: Matthias Brugger --- Changes in v4: - disable

[PATCH] riscv: Try to get cpu frequency from device tree

Instead of always using the "clock-frequency" property to determine cpu frequency, try using a clock in "clocks" if it exists. Signed-off-by Sean Anderson --- This patch depends on . drivers/cpu/riscv_cpu.c | 16 +++- 1 file changed, 15

[PATCH] cmd: Add command to dump drivers and compatible strings

This adds a subcommand to dm to dump out what drivers are installed, and their compatible strings. I have found this useful in ensuring that I have the correct drivers compiled, and that I have put in the correct compatible strings. Signed-off-by Sean Anderson --- cmd/dm.c| 12

[PATCH] mx7ulp: Only enable LDO if it is not already enabled

LDO mode may be already enabled by the ROM and enabling it again can cause U-Boot to hang. Avoid this problem by only enabling LDO mode if it is initially disabled. Reported-by: Jorge Ramirez-Ortiz Signed-off-by: Fabio Estevam --- arch/arm/mach-imx/mx7ulp/soc.c | 32

Re: question: mx7ulp - LDO_ENABLED_MODE

On 17/01/20 15:53:28, Fabio Estevam wrote: > On Fri, Jan 17, 2020 at 3:40 PM Jorge Ramirez-Ortiz, Gmail > wrote: > > > thanks a lot Favio. The part I am working with is 08SC. (not 05 or 07). > > Is that the same as yours? > > On the Embedded Artists board there is a 08SC i.MX7ULP version. > >

Re: question: mx7ulp - LDO_ENABLED_MODE

On Fri, Jan 17, 2020 at 3:40 PM Jorge Ramirez-Ortiz, Gmail wrote: > thanks a lot Favio. The part I am working with is 08SC. (not 05 or 07). > Is that the same as yours? On the Embedded Artists board there is a 08SC i.MX7ULP version. On the i.MX7ULP EVK that I have access to there is a 05SC.

Re: question: mx7ulp - LDO_ENABLED_MODE

On 17/01/20 14:18:55, Fabio Estevam wrote: > On Fri, Jan 17, 2020 at 1:51 PM Jorge Ramirez-Ortiz, Gmail > wrote: > > > btw was checking the TRM manual (Chapter 28, PMC - page 1172) > > > > [..] > > PMC1 power mode[LDOVL] fields don’t necessarily satisfy the operation > > voltage levels > >

Re: [PATCH 2/2] u-boot: fit: add support to decrypt fit with aes

On Wed, Dec 18, 2019 at 06:25:42PM +0100, Philippe Reynes wrote: > This commit add to u-boot the support to decrypt > fit image encrypted with aes. The FIT image contains > the key name and the IV name. Then u-boot look for > the key and IV in his device tree and decrypt images > before moving to

Re: [PATCH 1/2] mkimage: fit: add support to encrypt image with aes

On Wed, Dec 18, 2019 at 06:25:41PM +0100, Philippe Reynes wrote: > This commit add the support of encrypting image with aes > in mkimage. To enable the ciphering, a node cipher with > a reference to a key and IV (Initialization Vector) must > be added to the its file. Then mkimage add the

Re: [PATCH V4 4/4] aes: add test unit for aes196 and aes256

On Mon, Jan 06, 2020 at 03:22:37PM +0100, Philippe Reynes wrote: > This commit add test unit for aes196 and aes256. > > Signed-off-by: Philippe Reynes > Reviewed-by: Simon Glass Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature

Re: [PATCH V4 1/4] aes: add a define for the size of a block

On Mon, Jan 06, 2020 at 03:22:34PM +0100, Philippe Reynes wrote: > In the code, we use the size of the key for the > size of the block. It's true when the key is 128 bits, > but it become false for key of 192 bits and 256 bits. > So to prepare the support of aes192 and 256, > we introduce a

Re: [PATCH V4 3/4] aes: add test unit for aes128

On Mon, Jan 06, 2020 at 03:22:36PM +0100, Philippe Reynes wrote: > This commit add test unit for aes128. > > Signed-off-by: Philippe Reynes > Reviewed-by: Simon Glass Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP signature

Re: [PATCH V4 2/4] aes: add support of aes192 and aes256

On Mon, Jan 06, 2020 at 03:22:35PM +0100, Philippe Reynes wrote: > Until now, we only support aes128. This commit add the support > of aes192 and aes256. > > Signed-off-by: Philippe Reynes > Reviewed-by: Simon Glass Applied to u-boot/master, thanks! -- Tom signature.asc Description: PGP

[PATCH] gitlab/azure: Update to latest container tag

- Based on bionic-20200112 tag from Ubuntu - Add graphviz (Heinrich) Signed-off-by: Tom Rini --- .azure-pipelines.yml | 2 +- .gitlab-ci.yml | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/.azure-pipelines.yml b/.azure-pipelines.yml index 3b7744ce3c38..916ab84ea0c4

Re: Double free vulnerability in do_rename_gpt_parts

Hey Tom, The patch looks good to me, I do agree with simon that you'd have to initialize the pointers to 0, because uninitialized pointers could contain garbage, unless it's a global variable (those are automagically initialized to 0). Btw I really appreciate the fast and friendly responses,

Re: question: mx7ulp - LDO_ENABLED_MODE

On Fri, Jan 17, 2020 at 1:51 PM Jorge Ramirez-Ortiz, Gmail wrote: > btw was checking the TRM manual (Chapter 28, PMC - page 1172) > > [..] > PMC1 power mode[LDOVL] fields don’t necessarily satisfy the operation voltage > levels > required by the system. Such operation voltage requirements can

Re: question: mx7ulp - LDO_ENABLED_MODE

On 17/01/20 10:26:11, Fabio Estevam wrote: > Hi Jorge, > > On Thu, Jan 16, 2020 at 5:30 PM Jorge Ramirez-Ortiz, Foundries > wrote: > > > > Hi Fabio, > > > > I am trying to enable LDO in an imx7ulp based board but somehow the > > board locks up as soon I write to PMC1_RUN (using the

Re: Double free vulnerability in do_rename_gpt_parts

Am 17.01.2020 um 17:31 schrieb Tom Rini: On Fri, Jan 17, 2020 at 04:29:52PM +0100, Simon Goldschmidt wrote: + Some contributors of this file On Fri, Jan 17, 2020 at 1:03 PM Jordy wrote: Hello U-Boot lists! I think I found a double free bug in U-Boot, in /cmp/gpt.c in the function

Re: [U-Boot] [PATCH] cmd/gpt: Address error cases during gpt rename more correctly

+ Jordy, who just found a bug here... Am 08.11.2019 um 17:24 schrieb Tom Rini: New analysis by the tool has shown that we have some cases where we weren't handling the error exit condition correctly. When we ran into the ENOMEM case we wouldn't exit the function and thus incorrect things could

RE: [PATCH 5/5] ARM: dts: stm32: Add DH Electronics DHCOM SoM and PDK2 board

an SoM with STM32MP157C and an evaluation kit. The baseboard > > provides Ethernet, UART, USB, CAN and optional display. > > Signed-off-by: Marek Vasut > > Cc: Patrick Delaunay > > Cc: Patrice Chotard > > --- For information, I merge the serie, except this pat

Re: Double free vulnerability in do_rename_gpt_parts

On Fri, Jan 17, 2020 at 04:29:52PM +0100, Simon Goldschmidt wrote: > + Some contributors of this file > > On Fri, Jan 17, 2020 at 1:03 PM Jordy wrote: > > > > Hello U-Boot lists! > > > > I think I found a double free bug in U-Boot, in /cmp/gpt.c in the function > > do_rename_gpt_parts(). > > >

Re: [PATCH 1/1] Dockerfile: add graphviz

On Thu, Jan 16, 2020 at 08:51:09PM +0100, Heinrich Schuchardt wrote: > In reStructured text documentation we somtimes find formatting problems. > Therefore I would like to add 'make htmldocs' to our Gitlab Ci steps and > let all warning result in a build failure. > > For building the htmldocs

RE: [PULL] Pull request: u-boot-stm32 u-boot-stm32-20200117

board Thanks, Patrick git request-pull origin/master https://gitlab.denx.de/u-boot/custodians/u-boot-stm.git u-boot-stm32-20200117 The following changes since commit d7bb6aceb2e99a832efbb96f9bf480bf95602192: Merge tag 'mmc-1-16-2020' of https://gitlab.denx.de/u-boot/custodians/u-boot-mmc

Re: [PATCH v2 2/2] spi: cadence-qspi: Add direct mode support

On Fri, Jan 17, 2020 at 2:20 PM Simon Goldschmidt wrote: > > On Fri, Jan 17, 2020 at 2:01 PM Vignesh Raghavendra wrote: > > > > > > > > On 17/01/20 6:21 pm, Simon Goldschmidt wrote: > > > On Tue, Nov 19, 2019 at 11:12 AM Vignesh Raghavendra > > > wrote: > > >> > > >> Add support for Direct

Re: [PATCH v2 1/2] spi: cadence_qspi: Move to spi-mem framework

On Tue, Nov 19, 2019 at 11:12 AM Vignesh Raghavendra wrote: > > Current Cadence QSPI driver has few limitations. It assumes all read > operations to be in Quad mode and thus does not support SFDP parsing. > Also, adding support for new mode such as Octal mode would not be > possible with current

Re: [U-Boot] [PATCH 1/2] spi: cadence_qspi: Move to spi-mem framework

On Thu, Oct 17, 2019 at 3:48 PM wrote: > > Hi, Simon, Vignesh, > > On 10/17/2019 02:20 PM, Simon Goldschmidt wrote: > > On Mon, Oct 14, 2019 at 3:27 PM Vignesh Raghavendra wrote: > >> Current Cadence QSPI driver has few limitations. It assumes all read > >> operations to be in Quad mode and thus

Re: [PATCH 1/2] spi: cadence_qspi: Move to spi-mem framework

On Thu, Oct 17, 2019 at 2:31 PM Vignesh Raghavendra wrote: > > Hi Simon, > > On 17/10/19 4:50 PM, Simon Goldschmidt wrote: > > On Mon, Oct 14, 2019 at 3:27 PM Vignesh Raghavendra wrote: > >> > >> Current Cadence QSPI driver has few limitations. It assumes all read > >> operations to be in Quad

Re: Double free vulnerability in do_rename_gpt_parts

+ Some contributors of this file On Fri, Jan 17, 2020 at 1:03 PM Jordy wrote: > > Hello U-Boot lists! > > I think I found a double free bug in U-Boot, in /cmp/gpt.c in the function > do_rename_gpt_parts(). > > On line 702 the partition_list is being free'd if ret is smaller than 0. > If the

RE: [PATCH 4/5] ARM: dts: stm32: Add missing ETHCK clock to ethernet node

Hi Marek, > From: Christophe ROULLIER > Sent: lundi 13 janvier 2020 17:15 > > > On 1/13/20 2:33 PM, Marek Vasut wrote: > > On 1/13/20 2:26 PM, Patrick DELAUNAY wrote: > >> Hi Marek, > > Hi, > > > >> + Christophe (Maintainer in kernel) > >> > >>> From: Marek Vasut > >>> Sent: vendredi 10

RE: [PATCH 3/5] ARM: stm32: Fill in missing loadaddr

Hi Marek, > From: Marek Vasut > Sent: mercredi 15 janvier 2020 10:51 > > On 1/13/20 10:06 AM, Patrick DELAUNAY wrote: > > Hi Marek, > > > >> From: Marek Vasut > >> Sent: vendredi 10 janvier 2020 01:29 > >> > >> Since CONFIG_LOADADDR is not set, the default value of $loadaddr > >> variable is

[PATCH] pinctrl: renesas: r8a7796: Fix PRESET# bias setting

There's no bias setting for PRESET#. Therefore add entry to set PRESET# bias. Signed-off-by: Shunsuke Tokumoto Signed-off-by: Keiya Nobuta --- drivers/pinctrl/renesas/pfc-r8a7796.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/pinctrl/renesas/pfc-r8a7796.c

RE: [PATCH 3/3] stm32mp1: split board and SOC support for STM32MP15x family

Hi, > From: Patrick DELAUNAY > Sent: lundi 13 janvier 2020 15:18 > > Split the board and SOC support for STM32MP15x family and prepare the > introduction of new boards with STM32MP15x. > > This path define the 2 configurations: > - STM32MP15x: STM32MP15x soc support (new) > -

RE: [PATCH 2/3] board: stm32mp1: move CONFIG_ENV_XXX in defconfig

Hi, > From: Patrick DELAUNAY > Sent: lundi 13 janvier 2020 15:18 > > Move CONFIG_ENV_SECT_SIZE and CONFIG_ENV_OFFSET in > stm32mp15_*_defconfig for ST board with NOR support (STM32MP15xx-EV1 > boards) > - CONFIG_SECT_SIZE values = the max supported NOR erase size (256KB) > - CONFIG_ENV_OFFSET =

RE: [PATCH 1/3] stm32mp1: move stboard command in board/st/common directory

Hi, > From: Patrick DELAUNAY > Sent: lundi 13 janvier 2020 15:18 > > Move the ST command in board/st/common, as this command is only used by ST > board. Prepare the support in U-Boot of boards with STM32MP15x SOC but not > STMicroelectronics. > > Signed-off-by: Patrick Delaunay > --- Applied

Re: [U-Boot] [RFC PATCH] pxe: add support for FDT overlays

Hi Neil, On 07/05/2019 14:50, Neil Armstrong wrote: This adds support for specicyinf FDT overlays in an extlinux/pxelinux configuration file. Without this, there is no simple way to apply overlays when the kernel and ftd is loaded by the pxe command. This change adds the 'fdtoverlays' keyword

Re: [PATCH v2 19/21] mips: mtmips: add SPL support

On 17.01.20 14:15, Daniel Schwierzeck wrote: Am 17.01.20 um 08:46 schrieb Weijie Gao: This patch adds SPL support for mtmips platform. The lowlevel architecture is split into SPL and the rest parts are built into a memory loadable u-boot image. Optional SPL_DM and OF_CONTROL are also

Re: [PATCH v2 19/21] mips: mtmips: add SPL support

Added Mauro to Cc On 17.01.20 08:46, Weijie Gao wrote: This patch adds SPL support for mtmips platform. The lowlevel architecture is split into SPL and the rest parts are built into a memory loadable u-boot image. Optional SPL_DM and OF_CONTROL are also supported. The increment of size is very

Re: fat: handle Windows formatted partition (thru USB Mass Storage)

On Fri, Jan 17, 2020 at 11:47:03AM +0200, Andy Shevchenko wrote: > On Fri, Jan 17, 2020 at 8:13 AM AKASHI Takahiro > wrote: > > On Thu, Jan 16, 2020 at 10:31:49PM +0200, Andy Shevchenko wrote: > > ... > > > > Prerequisites: > > > - the board with U-Boot and installed Linux OS on eMMC > > > -

Re: [PATCH v2 13/21] dts: mtmips: add alternative pinmux node for uart2

Added Mauro to Cc On 17.01.20 08:46, Weijie Gao wrote: This patch adds a new pinmux for UART2, which shares the pins with SPIS. Signed-off-by: Weijie Gao --- Changes since v1: newly added --- arch/mips/dts/mt7628a.dtsi | 5 + 1 file changed, 5 insertions(+) diff --git

Re: [PATCH v2 12/21] dts: mtmips: add u-boot, dm-pre-reloc for some nodes in mt7628a.dtsi

On 17.01.20 08:45, Weijie Gao wrote: To enable DM support in SPL, some necessary nodes must be reserved for serial, clk, sysreset and other drivers. This patch adds u-boot,dm-pre-reloc for these nodes. Signed-off-by: Weijie Gao --- Changes since v1: newly added ---

Re: [PATCH v2 11/21] dts: mtmips: remove all unusable nodes and properties from mt7628s.dtsi

On 17.01.20 08:45, Weijie Gao wrote: This patch removes all unused and unusable nodes and properties from mt7628s.dtsi. Signed-off-by: Weijie Gao --- Changes since v1: splitted from another patch Please don't remove the unused parts. As mentioned before, we try to stay as close to the

Re: [PATCH v2 00/21] Refactor the architecture parts of mt7628

Hi Weijie, I've added another of my mail addresses to cc (m...@roese.nl) as the sending to the other 2 addresses does not seem to work. On 17.01.20 08:45, Weijie Gao wrote: This patch series are divided into two parts: The main part is to rewrite the whole architecture code of mt7628: 1. Lock

Re: question: mx7ulp - LDO_ENABLED_MODE

On 17/01/20 10:26:11, Fabio Estevam wrote: > Hi Jorge, > > On Thu, Jan 16, 2020 at 5:30 PM Jorge Ramirez-Ortiz, Foundries > wrote: > > > > Hi Fabio, > > > > I am trying to enable LDO in an imx7ulp based board but somehow the > > board locks up as soon I write to PMC1_RUN (using the

Re: [PATCH 0/3] Fix Odroid U3/X2 SD-card boot

Hi Anand On 17.01.2020 06:00, Anand Moon wrote: > On Thu, 16 Jan 2020 at 20:56, Marek Szyprowski > wrote: >> This patchset restores booting from SD-card on Exynos4412-based Odroid >> U3/X2 boards. It relies on the Exynos MMC device id auto-dectection and >> PMIC device name fixes: >>

Re: question: mx7ulp - LDO_ENABLED_MODE

Hi Jorge, On Thu, Jan 16, 2020 at 5:30 PM Jorge Ramirez-Ortiz, Foundries wrote: > > Hi Fabio, > > I am trying to enable LDO in an imx7ulp based board but somehow the > board locks up as soon I write to PMC1_RUN (using the init_ldo_mode > sequence). > > I think it is interesting that bit

Re: [PATCH v2 2/2] spi: cadence-qspi: Add direct mode support

On Fri, Jan 17, 2020 at 2:01 PM Vignesh Raghavendra wrote: > > > > On 17/01/20 6:21 pm, Simon Goldschmidt wrote: > > On Tue, Nov 19, 2019 at 11:12 AM Vignesh Raghavendra > > wrote: > >> > >> Add support for Direct Access Controller mode of Cadence QSPI. This > >> allows MMIO access to SPI NOR

Re: [PATCH v2 19/21] mips: mtmips: add SPL support

Am 17.01.20 um 08:46 schrieb Weijie Gao: > This patch adds SPL support for mtmips platform. The lowlevel architecture > is split into SPL and the rest parts are built into a memory loadable > u-boot image. Optional SPL_DM and OF_CONTROL are also supported. > > The increment of size is very

[PATCH] arm: exynos: odroid: Change autoboot script to use ${mmcbootdev}

This fixes the default boot command for the SD-card boot case. Signed-off-by: Marek Szyprowski --- This is the continuation of the fixes from this patchset: https://patchwork.ozlabs.org/cover/1224290/ --- include/configs/odroid.h | 8 1 file changed, 4 insertions(+), 4 deletions(-)

[PATCH v2] arm: exynos: Read default MMC device from XOM[7:5] pins

XOM pins provide information for iROM bootloader about the boot device. Those pins are mapped to lower bits of OP_MODE register (0x1008), which is common for all Exynos SoC variants. Set the default MMC device id to reflect the boot device selected by XOM[7:5] pins (2 for the SD or 0 for the

Re: [PATCH v2 2/2] spi: cadence-qspi: Add direct mode support

On 17/01/20 6:21 pm, Simon Goldschmidt wrote: > On Tue, Nov 19, 2019 at 11:12 AM Vignesh Raghavendra wrote: >> >> Add support for Direct Access Controller mode of Cadence QSPI. This >> allows MMIO access to SPI NOR flash providing better read performance. >> Direct mode is only exercised if

Re: [PATCH v2 2/2] spi: cadence-qspi: Add direct mode support

On Tue, Nov 19, 2019 at 11:12 AM Vignesh Raghavendra wrote: > > Add support for Direct Access Controller mode of Cadence QSPI. This > allows MMIO access to SPI NOR flash providing better read performance. > Direct mode is only exercised if AHB window size is greater than 8MB. > Support for flash

[PATCH v2 9/9] doc: update FU540 RISC-V documentation

Add descriptions about U-Boot SPL feature and how to build and run. Signed-off-by: Pragnesh Patel --- doc/board/sifive/fu540.rst | 370 + 1 file changed, 370 insertions(+) diff --git a/doc/board/sifive/fu540.rst b/doc/board/sifive/fu540.rst index

[PATCH v2 7/9] riscv: sifive: fu540: Add U-boot SPL header files

Add header files needed for U-boot SPL Signed-off-by: Pragnesh Patel --- board/sifive/fu540/ccache.h | 43 + board/sifive/fu540/fu540-memory-map.h | 59 ++ board/sifive/fu540/regconfig-ctl.h| 274 ++ board/sifive/fu540/regconfig-phy.h| 1224 +

[PATCH v2 6/9] riscv: sifive: dts: fu540: Add board -u-boot.dtsi files

Devicetree files in FU540 platform is synced from Linux, like other platforms does. Apart from these u-boot in FU540 would also require some u-boot specific node like clint. So, create board specific -u-boot.dtsi files. This would help of maintain u-boot specific changes separately without

[PATCH v2 8/9] riscv: sifive: fu540: add SPL configuration

This patch provides sifive_fu540_spl_defconfig which can support U-boot SPL to boot from L2 LIM (0x0800_) and then boot U-boot FIT image including OpenSBI FW_DYNAMIC firmware and U-Boot proper images from MMC boot devices. With sifive_fu540_spl_defconfig: U-Boot SPL will be loaded by ZSBL

[PATCH v2 5/9] lib: Makefile: build crc7.c when CONFIG_MMC_SPI

When build U-boot SPL, meet an issue of undefined reference to 'crc7' for drivers/mmc/mmc_spi.c, so let's compile crc7.c when CONFIG_MMC_SPI selected. Signed-off-by: Pragnesh Patel --- lib/Makefile | 1 + 1 file changed, 1 insertion(+) diff --git a/lib/Makefile b/lib/Makefile index

[PATCH v2 4/9] riscv: Add _image_binary_end for SPL

For SPL_SEPARATE_BSS, Device tree will put at _image_binary_end Signed-off-by: Pragnesh Patel --- arch/riscv/cpu/u-boot-spl.lds | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/riscv/cpu/u-boot-spl.lds b/arch/riscv/cpu/u-boot-spl.lds index 955dd3106d..d0495ce248 100644 ---

[PATCH v2 2/9] Sifive: FU540: Add place-holder for FU540 clk

Added FU540 place-holder so that SoC specific values will be kept here. Signed-off-by: Pragnesh Patel --- arch/riscv/include/asm/arch-fu540/clk.h | 14 ++ board/sifive/fu540/Kconfig | 3 +++ 2 files changed, 17 insertions(+) create mode 100644

[PATCH v2 1/9] misc: add driver for the Sifive otp controller

Added a misc driver to handle OTP memory in FU540. Signed-off-by: Pragnesh Patel --- arch/riscv/dts/fu540-c000-u-boot.dtsi | 13 ++ .../dts/hifive-unleashed-a00-u-boot.dtsi | 6 + board/sifive/fu540/fu540.c| 113 -- configs/sifive_fu540_defconfig

[PATCH v2 3/9] Sifive: FU540: Add header files for SoC

Add fu540 SoC specific header files Signed-off-by: Pragnesh Patel --- arch/riscv/include/asm/arch-fu540/cache.h | 42 ++ arch/riscv/include/asm/arch-fu540/gpio.h | 14 arch/riscv/include/asm/arch-fu540/otp.h| 80 +++ arch/riscv/include/asm/arch-fu540/spi.h

[PATCH v2 0/9] RISC-V SiFive FU540 support SPL

This series add support for SPL to FU540. This series depends on https://patchwork.ozlabs.org/patch/1196703/ (riscv: dts: Add hifive-unleashed-a00 dts from Linux) U-Boot SPL can boot from L2 LIM (0x0800_) and jump to OpenSBI(FW_DYNAMIC firmware) and U-Boot proper from MMC devices. How to

Re: [PATCH 3/3] stm32mp1: split board and SOC support for STM32MP15x family

Hi On 1/13/20 3:17 PM, Patrick Delaunay wrote: > Split the board and SOC support for STM32MP15x family and > prepare the introduction of new boards with STM32MP15x. > > This path define the 2 configurations: > - STM32MP15x: STM32MP15x soc support (new) > - TARGET_ST_STM32MP15x: STMicroelectronics

Re: [Uboot-stm32] [PATCH 1/3] stm32mp1: move stboard command in board/st/common directory

Hi Patrick On 1/13/20 3:17 PM, Patrick Delaunay wrote: > Move the ST command in board/st/common, as this command is only used > by ST board. Prepare the support in U-Boot of boards with STM32MP15x > SOC but not STMicroelectronics. > > Signed-off-by: Patrick Delaunay > --- > >

Re: [Uboot-stm32] [PATCH 2/3] board: stm32mp1: move CONFIG_ENV_XXX in defconfig

Hi On 1/13/20 3:17 PM, Patrick Delaunay wrote: > Move CONFIG_ENV_SECT_SIZE and CONFIG_ENV_OFFSET in stm32mp15_*_defconfig > for ST board with NOR support (STM32MP15xx-EV1 boards) > - CONFIG_SECT_SIZE values = the max supported NOR erase size (256KB) > - CONFIG_ENV_OFFSET = offset for NOR

RE: [PATCH V3] stm32mp1: configs: Make all boot devices in distro boot conditional

Hi > From: Marek Vasut > Sent: lundi 13 janvier 2020 11:46 > To: Patrick DELAUNAY ; u-boot@lists.denx.de > Cc: Patrice CHOTARD > Subject: Re: [PATCH V3] stm32mp1: configs: Make all boot devices in distro > boot > conditional > Importance: High > > On 1/13/20 11:44 AM, Patrick DELAUNAY wrote:

RE: [PATCH V2] ARM: stm32: Allow overriding setup_mac_address()

Hi Marek, > From: Marek Vasut > Sent: mercredi 18 décembre 2019 16:52 > > Let board code override setup_mac_address(), which is useful e.g. if the board > derives the MAC address from another source, like an I2C EEPROM. > > Signed-off-by: Marek Vasut > Cc: Patrick Delaunay > Cc: Patrice

RE: [Uboot-stm32] [PATCH] stm32mp: remove redundant SYS_TEXT_BASE prompt

Hi Thomas, > From: Uboot-stm32 On > Behalf Of Thomas Hebb > > The main prompt for this (defined in /Kconfig) is visible at all times, which > means > there's no reason to have an additional, machine-specific prompt to set the > same > option. > > Signed-off-by: Thomas Hebb > --- Acked-by:

Re: [RFC PATCH] imx: imx8mm-evk/imx8mn-evk: enable sysreset driver for SPL

On 1/17/20 3:33 AM, Peng Fan wrote: > Hi Marek, Hi, >> Subject: Re: [RFC PATCH] imx: imx8mm-evk/imx8mn-evk: enable sysreset >> driver for SPL >> >> On 1/16/20 3:21 AM, Peng Fan wrote: >> >> Hello Peng, >> Subject: [RFC PATCH] imx: imx8mm-evk/imx8mn-evk: enable sysreset driver for SPL

Re: [PATCH v2 17/21] Makefile: add support to generate LZMA compressed u-boot image

Am 17.01.20 um 08:46 schrieb Weijie Gao: > This patch adds support for generating LZMA compressed u-boot image. > The compressed image can be used for SPL to reduce the size of the u-boot > binary. > > Reviewed-by: Simon Glass > Signed-off-by: Weijie Gao > --- > Changes since v1: none > ---

Re: [PATCH v2 15/21] mips: add an option to enable u_boot_list section for SPL loaders in u-boot-spl.lds

Am 17.01.20 um 08:46 schrieb Weijie Gao: > u_boot_list is not only used by DM, but also by some SPL image load methods > such as spl_nor.c. > > This patch adds an option CONFIG_SPL_LOADER_SUPPORT in conjunction with > CONFIG_SPL_DM surrounding the u_boot_list section to make sure SPL image >

Re: [PATCH v2 14/21] mips: enable support for appending dtb to spl binary

Am 17.01.20 um 08:46 schrieb Weijie Gao: > If CONFIG_SPL_OF_CONTROL is enabled for SPL and CONFIG_OF_SEPARATE is also > enabled, the dtb will be appended to the u-boot-spl.bin. > > When calling dm_init_and_scan() in SPL, fdtdec_setup() will try to locate > dtb at the end of u-boot-spl.bin, by

Re: [PATCH v2 08/21] mips: add a mtmips-specific field to architecture-specific global data

Am 17.01.20 um 08:45 schrieb Weijie Gao: > SoCs of mtmips can use different CPU frequencies depending on the HW/SW > configurations. For example mt7628 uses 580MHz clock if the input xtal > frequency is 40MHz, and 575MHz clock if the xtal is 25MHz. Upon cold boot > the CPU uses the xtal

Re: [PATCH v2 07/21] configs: enable CONFIG_RESTORE_EXCEPTION_VECTOR_BASE for all mtmips boards

Am 17.01.20 um 08:45 schrieb Weijie Gao: > This patch enables CONFIG_RESTORE_EXCEPTION_VECTOR_BASE for all mtmips > boards. > > Signed-off-by: Weijie Gao > --- > Changes since v1: Splitted from another patch. > --- > configs/gardena-smart-gateway-mt7688-ram_defconfig | 1 + >

Re: [PATCH v2 06/21] mips: mtmips: make use of sysreset-resetctrl for mt7628 soc

Am 17.01.20 um 08:45 schrieb Weijie Gao: > This patch replaces sysreset-syscon with sysreset-resetctrl for mt7628 soc. > > Signed-off-by: Weijie Gao > --- > Changes since v1: splitted from another patch. > --- > arch/mips/dts/mt7628a.dtsi | 10 +- >

Re: [PATCH v2 05/21] sysreset: add reset controller based reboot driver

Am 17.01.20 um 08:45 schrieb Weijie Gao: > Some chips provide their sysreset function in reset controller, which is > normally a bit written to 1 to perform the sysreset. > > This patch adds a new sysreset driver to take advantage of it. > > Reviewed-by: Simon Glass > Signed-off-by: Weijie

Re: [PATCH v2 01/21] mips: add support to restore exception vector base before booting linux

Am 17.01.20 um 08:45 schrieb Weijie Gao: > In U-Boot the exception vector base will be moved to top of memory, to be > used to display register dump when exception occurs. > > But some old linux kernel does not honor the base set in CP0_EBASE. A > modified exception vector base will cause

Re: [PATCH] mx7ulp: soc: s_init should only be executed once

On 17/01/20 08:53:03, Fabio Estevam wrote: > Hi Jorge, > > On Fri, Jan 17, 2020 at 6:50 AM Jorge Ramirez-Ortiz > wrote: > > > > On SPL enabled systems, the current s_init code (wdog, clock and ldo > > init) is executed twice (by SPL and u-boot). This is not necessary and > > might lead to boot

[PATCH v2 3/3] clk: imx: pllv3: fix potential 'divide by zero' in av_set_rate()

Guard 'parent_rate==0' to prevent 'divide by zero' issue in clk_pplv3_av_set_rate(). If it is 0, let's return with -EINVAL. Signed-off-by: Giulio Benetti --- V1->V2 * check only if parent_rate==0, as signalled by Adam --- drivers/clk/imx/clk-pllv3.c | 10 -- 1 file changed, 8

[PATCH v2 0/3] fix pllv3 defects reported by Coverity

V1->V2 * check only if parent_rate==0, as signalled by Adam Giulio Benetti (3): clk: imx: pllv3: fix potential 'divide by zero' in sys_get_rate() clk: imx: pllv3: fix potential 'divide by zero' in av_get_rate() clk: imx: pllv3: fix potential 'divide by zero' in av_set_rate()

[PATCH v2 1/3] clk: imx: pllv3: fix potential 'divide by zero' in sys_get_rate()

Guard 'parent_rate==0' to prevent 'divide by zero' issue in clk_pplv3_sys_get_rate(). If it is 0, let's return with -EINVAL. Signed-off-by: Giulio Benetti --- V1->V2 * check only if parent_rate==0, as signalled by Adam --- drivers/clk/imx/clk-pllv3.c | 10 -- 1 file changed, 8

[PATCH v2 2/3] clk: imx: pllv3: fix potential 'divide by zero' in av_get_rate()

Guard 'mfd==0' to prevent 'divide by zero' issue in clk_pplv3_av_get_rate(). If it is 0, let's return with EIO since mfd should never be 0 at all. Signed-off-by: Giulio Benetti --- V1->V2 * improved a little commit log --- drivers/clk/imx/clk-pllv3.c | 3 +++ 1 file changed, 3 insertions(+)

Double free vulnerability in do_rename_gpt_parts

Hello U-Boot lists! I think I found a double free bug in U-Boot, in /cmp/gpt.c in the function do_rename_gpt_parts(). On line 702 the partition_list is being free'd if ret is smaller than 0. If the return value is not -ENOMEM it will go to the out: label and free the partition_list again.

[PATCH] mx7ulp_evk_plugin: Disable CONFIG_NET

Currently the following build warning is seen: = WARNING == This board does not use CONFIG_DM_ETH (Driver Model for Ethernet drivers). Please update the board to use CONFIG_DM_ETH before the v2020.07 release. Failure to update by the deadline may result in

Antwort: Re: Apollo Lake GPIO driver with Coreboot/U-Boot

Hello Simon, > -"Simon Glass" schrieb: - > On Thu, 16 Jan 2020 at 02:55, Wolfgang Wallner > wrote: > > > > Hello Simon, Bin, all, > > > > I have an Apollo Lake based device, where U-Boot is booted as a Coreboot > > payload. I would like to utilize the Apollo Lake GPIO driver > >

Re: [PATCH] mx7ulp: soc: s_init should only be executed once

Hi Jorge, On Fri, Jan 17, 2020 at 6:50 AM Jorge Ramirez-Ortiz wrote: > > On SPL enabled systems, the current s_init code (wdog, clock and ldo > init) is executed twice (by SPL and u-boot). This is not necessary and > might lead to boot issues (ie, starting PMC1 when it is already running). > >

Re: [PATCH] arm: dts: imx7ulp-evk: remove mux value from pad configuration

On Thu, Jan 16, 2020 at 4:40 AM Jorge Ramirez-Ortiz, Foundries wrote: > > On 16/01/20 02:22:35, Peng Fan wrote: > > > Subject: [PATCH] arm: dts: imx7ulp-evk: remove mux value from pad > > > configuration > > > > > > The mux mode is embedded in the PAD definition and therefore there is no > > >

Re: [PATCH] arm: dts: imx7ulp-evk: remove mux value from pad configuration

On Wed, Jan 15, 2020 at 2:50 PM Jorge Ramirez-Ortiz wrote: > > The mux mode is embedded in the PAD definition and therefore there is > no need to repeat it in the PAD configuration value (more over since > this information will be masked out when the configuration value is > applied). > >

Re: [PATCH 1/3] clk: imx: pllv3: fix potential 'divide by zero' in sys_get_rate()

Hi Adam, On 1/17/20 12:30 PM, Adam Ford wrote: On Fri, Jan 17, 2020 at 5:02 AM Giulio Benetti wrote: Guard 'parent_rate==0' to prevent 'divide by zero' issue in clk_pplv3_sys_get_rate(). Also, guard 'parent_rate<0' that would mean that clk_get_parent_rate() returned an error, so better to

Re: [PATCH 1/3] clk: imx: pllv3: fix potential 'divide by zero' in sys_get_rate()

On Fri, Jan 17, 2020 at 5:02 AM Giulio Benetti wrote: > > Guard 'parent_rate==0' to prevent 'divide by zero' issue in > clk_pplv3_sys_get_rate(). Also, guard 'parent_rate<0' that would mean > that clk_get_parent_rate() returned an error, so better to return > early with error EINVAL. > >

[PATCH 3/3] clk: imx: pllv3: fix potential 'divide by zero' in av_set_rate()

Guard 'parent_rate==0' to prevent 'divide by zero' issue in clk_pplv3_av_set_rate(). Also, guard 'parent_rate<0' that would mean that clk_get_parent_rate() returned an error, so better to return early with error EINVAL. Signed-off-by: Giulio Benetti --- drivers/clk/imx/clk-pllv3.c | 10

[PATCH 2/3] clk: imx: pllv3: fix potential 'divide by zero' in av_get_rate()

Guard 'mfd==0' to prevent 'divide by zero' issue in clk_pplv3_av_get_rate() and returning early with error EIO since mfd should never be 0 at all. Signed-off-by: Giulio Benetti --- drivers/clk/imx/clk-pllv3.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/clk/imx/clk-pllv3.c

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