On Mon, Sep 7, 2020 at 3:14 PM Chunfeng Yun wrote:
>
nits: please remove the ending period in the commit title
> xhci versions 1.0 and later report the untransferred data remaining in a
> TD a bit differently than older hosts.
>
> We used to have separate functions for these, and needed to
From: Jean-Jacques Hiblot
Add a test to verify that GPIOs can be acquired/released using the managed
API. Also check that the GPIOs are released when the consumer device is
removed.
Signed-off-by: Jean-Jacques Hiblot
Signed-off-by: Pratyush Yadav
---
arch/sandbox/dts/test.dts | 10
From: Jean-Jacques Hiblot
Add managed functions to get a gpio from the devce-tree, based on a
property name (minus the '-gpios' suffix) and optionally an index.
When the device is unbound, the GPIO is automatically released and the
data structure is freed.
Signed-off-by: Jean-Jacques Hiblot
Hi,
This is a re-submission of Jean-Jacques' earlier work in October last
year. It can be found at [0]. The goal is to facilitate porting drivers
from the Linux kernel. Most of the series will be about adding managed
APIs to existing infrastructure (GPIO, reset, regmap).
This particular series
> -Original Message-
> From: Thirupathaiah Annapureddy
> Sent: Wednesday, September 2, 2020 4:43 AM
> To: u-boot@lists.denx.de
> Cc: Maxim Sloyko ; Marek Vasut ;
> thir...@microsoft.com; thir...@linux.microsoft.com; Tom Rini
> ; ChiaWei Wang ;
> Ryan Chen
> Subject: [PATCH v2] arm: dts:
> -Original Message-
> From: Ang, Chee Hong
> Sent: Friday, August 14, 2020 11:07 AM
> To: u-boot@lists.denx.de
> Cc: Marek Vasut ; Simon Goldschmidt
> ; Tom Rini ; See,
> Chin Liang ; Tan, Ley Foon
> ; Ang, Chee Hong ;
> Chee, Tien Fong ; Lim, Elly Siew Chin
>
> Subject: [PATCH v1]
> -Original Message-
> From: Tan, Ley Foon
> Sent: Tuesday, August 25, 2020 10:27 AM
> To: u-boot@lists.denx.de
> Cc: Joe Hershberger ; Ley Foon Tan
> ; See, Chin Liang ; Tan,
> Ley Foon
> Subject: [PATCH 0/3] net: tftp: Fixes for tftp rollover
>
> This patch series fix the tftp
On Mon, Sep 7, 2020 at 3:14 PM Chunfeng Yun wrote:
>
> Use readx_poll_sleep_timeout() to poll the register status
>
> Signed-off-by: Chunfeng Yun
> ---
> v3: no changes
>
> v2: fix typo of title suggested by Frank
> ---
> drivers/usb/host/xhci.c | 25 +++--
> 1 file changed,
On Mon, Sep 7, 2020 at 3:14 PM Chunfeng Yun wrote:
>
> Use macros with parameter to fill ep_info2, then some macros
> for MASK and SHIFT can be removed
>
> Signed-off-by: Chunfeng Yun
> ---
> v3: merge patch [v2 9/11] and [v2 10/11] into one, both for ep_info2
>
> v2: no changes
> ---
>
On Mon, Sep 7, 2020 at 3:14 PM Chunfeng Yun wrote:
>
> Use TRB_TX_TYPE() instead of (TRB_DATA_OUT/IN << TRB_TX_TYPE_SHIFT)
>
> Signed-off-by: Chunfeng Yun
> ---
> v2: no changes
> ---
> drivers/usb/host/xhci-ring.c | 4 ++--
> include/usb/xhci.h | 1 -
> 2 files changed, 2
On Mon, Sep 7, 2020 at 3:14 PM Chunfeng Yun wrote:
>
> For normal TRB fields:
> use TRB_LEN(x) instead of ((x) & TRB_LEN_MASK);
> and use TRB_INTR_TARGET(x) instead of
> (((x) & TRB_INTR_TARGET_MASK) << TRB_INTR_TARGET_SHIFT)
>
> Signed-off-by: Chunfeng Yun
> ---
> v3: merge patch [v2 6/11] and
Hi Y.b
> Subject: RE: [v4, 00/11] mmc: fsl_esdhc: support eMMC HS200/HS400 modes
>
> Hi Jaehoon and Peng,
>
> Any comments on the v4 patch-set?
Sorry for late. I need postpone the pick up this patchset until next.
I'll give a check, if no issues, I'll pick this into next branch.
Thanks,
Peng.
On 2020/9/8 上午8:56, Tom Rini wrote:
> On Tue, Sep 08, 2020 at 08:26:27AM +0800, Qu Wenruo wrote:
>>
>>
>> On 2020/9/8 上午6:35, Tom Rini wrote:
>>> On Wed, Jun 24, 2020 at 06:03:11PM +0200, Marek Behún wrote:
>>>
From: Qu Wenruo
This version of btrfs_file_read() has the following
On Tue, Sep 08, 2020 at 08:26:27AM +0800, Qu Wenruo wrote:
>
>
> On 2020/9/8 上午6:35, Tom Rini wrote:
> > On Wed, Jun 24, 2020 at 06:03:11PM +0200, Marek Behún wrote:
> >
> >> From: Qu Wenruo
> >>
> >> This version of btrfs_file_read() has the following new features:
> >> - Tries all mirrors
>
On 2020/9/8 上午6:35, Tom Rini wrote:
> On Wed, Jun 24, 2020 at 06:03:11PM +0200, Marek Behún wrote:
>
>> From: Qu Wenruo
>>
>> This version of btrfs_file_read() has the following new features:
>> - Tries all mirrors
>> - More handling on unaligned size
>> - Better compressed extent handling
>>
On Mon, Sep 07, 2020 at 05:58:14PM +0200, Heinrich Schuchardt wrote:
> Hello Takahiro,
>
> on the 32bit Wandboard (with i.mx6 CPU) running the lib_asn1_pkcs7 unit
> test results in a crash due to an unaligned access occurring when
> br_i32_decode() is called by rsa_gen_key_prop().
Some guy has
On Mon, 7 Sep 2020 18:26:04 -0400
Tom Rini wrote:
> On Wed, Jun 24, 2020 at 06:02:49PM +0200, Marek Behún wrote:
>
> > From: Qu Wenruo
> >
> > This patch uses generic code from btrfs-progs to read one super block
> > from block device.
> [snip]
> > +/* Provide a compatibility layer to make
On Wed, Jun 24, 2020 at 06:03:11PM +0200, Marek Behún wrote:
> From: Qu Wenruo
>
> This version of btrfs_file_read() has the following new features:
> - Tries all mirrors
> - More handling on unaligned size
> - Better compressed extent handling
> The old implementation doesn't handle
On Wed, Jun 24, 2020 at 06:02:49PM +0200, Marek Behún wrote:
> From: Qu Wenruo
>
> This patch uses generic code from btrfs-progs to read one super block
> from block device.
[snip]
> +/* Provide a compatibility layer to make code syncing easier */
> +
> +/* A simple wraper to for error() used
On Wed, Aug 26, 2020 at 09:31:07AM +0200, Stefan Roese wrote:
> Hi Tom,
>
> I've prepared a branch for you to pull the "Remove CONFIG_NR_DRAM_BANKS
> option and bi_memstart/memsize from bd_info" patchset, if you care to
> pull from it. I've rebased it on top of latest TOT, which was necessary
>
Add basic support for the Kontron SMARC-sAL28 board. This includes just
the bare minimum to be able to bring up the board and boot linux.
For now, the Single and Dual PHY variant is supported. Other variants
will fall back to the basic variant.
In particular, there is no watchdog support for
The board supports 16 configuration bits which can be manipulated with
this command. See the board's README for a detailed explanation on each
bit.
Signed-off-by: Michael Walle
---
board/kontron/sl28/Makefile | 2 +-
board/kontron/sl28/cmds.c | 178
2
Add basic board support for the Kontron SMARC-sAL28 board. Please note,
that this board doesn't support TF-a (yet). Therefore, the u-boot SPL is
the first code which is run and it has to set up the RAM.
changes since v6:
- moved README to doc/board/kontron/sl28.rst
- added device tree files to
Hi Simon,
On 6/9/20 22:44, Simon Glass wrote:
Hi Walter,
On Fri, 7 Aug 2020 at 11:23, Walter Lozano wrote:
Hi Simon
On 7/8/20 13:23, Simon Glass wrote:
Hi Walter,
On Wed, 29 Jul 2020 at 10:00, Walter Lozano wrote:
Hi Simon,
On 28/7/20 23:42, Simon Glass wrote:
Hi Walter,
On Sun, 26
Add clk-generic driver compatible with common clock framework.
Signed-off-by: Claudiu Beznea
---
drivers/clk/at91/Makefile | 1 +
drivers/clk/at91/clk-generic.c | 202 +
drivers/clk/at91/pmc.h | 6 ++
3 files changed, 209 insertions(+)
Add generic clock ops to be used by every AT91 PMC driver
built on top of CCF.
Signed-off-by: Claudiu Beznea
---
drivers/clk/at91/pmc.c | 71 ++
drivers/clk/at91/pmc.h | 2 ++
2 files changed, 73 insertions(+)
diff --git a/drivers/clk/at91/pmc.c
Add clk-peripheral compatible with common clock framework.
Signed-off-by: Claudiu Beznea
---
drivers/clk/at91/Makefile | 2 +
drivers/clk/at91/clk-peripheral.c | 254 ++
drivers/clk/at91/pmc.h| 16 +++
3 files changed, 272 insertions(+)
Add master clock (MCK1..MCK4) support for SAMA7G5. SAMA7G5's PMC has
multiple master clocks feeding different subsystems. One of them
feeds image subsystem and is changeable based on image subsystem
needs.
Signed-off-by: Claudiu Beznea
---
drivers/clk/at91/clk-master.c | 178
Add clock support for SAMA7G5.
Signed-off-by: Claudiu Beznea
---
drivers/clk/at91/Makefile |1 +
drivers/clk/at91/sama7g5.c | 1401
2 files changed, 1402 insertions(+)
create mode 100644 drivers/clk/at91/sama7g5.c
diff --git
Add clk-programmable driver compatible with common clock framework.
Signed-off-by: Claudiu Beznea
---
drivers/clk/at91/Makefile | 2 +-
drivers/clk/at91/clk-programmable.c | 208
drivers/clk/at91/pmc.h | 17 +++
3 files changed, 226
Add clk-system driver compatible with common clock framework.
Signed-off-by: Claudiu Beznea
---
drivers/clk/at91/Makefile | 2 +-
drivers/clk/at91/clk-system.c | 112 ++
drivers/clk/at91/pmc.h| 3 ++
3 files changed, 116 insertions(+), 1
Add clk-utmi driver compatible with common clock framework.
Signed-off-by: Claudiu Beznea
---
drivers/clk/at91/Makefile | 1 +
drivers/clk/at91/clk-utmi.c | 165
drivers/clk/at91/pmc.h | 3 +
3 files changed, 169 insertions(+)
create mode
Add sam9x60-pll driver compatible with common clock framework.
Signed-off-by: Claudiu Beznea
---
drivers/clk/at91/Kconfig | 7 +
drivers/clk/at91/Makefile | 1 +
drivers/clk/at91/clk-sam9x60-pll.c | 442 +
drivers/clk/at91/pmc.h
Add UTMI support for SAMA7G5. SAMA7G5's UTMI control is done via
XTALF register. Values written at bits 2..0 in this register
correspond to the on board crystal oscillator frequency.
Signed-off-by: Claudiu Beznea
---
drivers/clk/at91/clk-utmi.c | 71 -
Move clock code to compat.c to allow switching to CCF
without mixing CCF code with non CCF code. This prepares the
field for next commits.
Signed-off-by: Claudiu Beznea
---
drivers/clk/at91/Makefile | 13 +-
drivers/clk/at91/clk-generated.c | 178 ---
Add clk-main driver compatible with common clock framework.
Signed-off-by: Claudiu Beznea
---
drivers/clk/at91/Makefile | 2 +-
drivers/clk/at91/clk-main.c | 387
drivers/clk/at91/pmc.h | 10 ++
3 files changed, 398 insertions(+), 1
Add clk-master driver compatible with common clock framework.
Signed-off-by: Claudiu Beznea
---
drivers/clk/at91/Makefile | 2 +-
drivers/clk/at91/clk-master.c | 156 ++
drivers/clk/at91/pmc.h| 21 ++
3 files changed, 178 insertions(+),
Add helper for clock drivers. These will be used by following
commits in the process of switching AT91 clock drivers to CCF.
Signed-off-by: Claudiu Beznea
---
drivers/clk/at91/pmc.c | 91 ++
drivers/clk/at91/pmc.h | 13
2 files changed,
Add sckc driver compatible with common clock framework. Driver
implements slow clock support for SAM9X60 compatible IPs (in this
list it is also present SAMA7G5's slow clock IP).
Signed-off-by: Claudiu Beznea
---
drivers/clk/at91/Makefile | 2 +-
drivers/clk/at91/sckc.c | 172
Add pre-requisite headers for AT91 clock architecture. These
are based on already present files on Linux and will be used
by following commits for AT91 CCF clock drivers.
Signed-off-by: Claudiu Beznea
---
include/dt-bindings/clk/at91.h | 22
include/linux/clk/at91_pmc.h | 247
The purpose of this series is to add clock support for SAMA7G5.
Along with this, clock drivers were switched to CCF and aligned
with their corresponding versions present in Linux.
Some changes were done for CCF, patches 1, 3, 4, 5 (I don't know
if they were as is by intention of a fixes tag is
Do not disable clock if it is a critical one.
Signed-off-by: Claudiu Beznea
Reviewed-by: Simon Glass
---
drivers/clk/clk-uclass.c | 3 +++
test/dm/clk_ccf.c| 32 +++-
2 files changed, 34 insertions(+), 1 deletion(-)
diff --git a/drivers/clk/clk-uclass.c
Clock re-parenting is not binding the clock's device to its new
parent device, it only calls the clock's ops->set_parent() API. The
changes in this commit re-parent the clock device to its new parent
so that subsequent operations like clk_get_parent() to point to the
proper parent.
Signed-off-by:
clk_get_by_indexed_prop() retrieves a clock with dev member being set
with the pointer to the udevice for the clock controller driver. But
in case of CCF each clock driver has set in dev member the reference
to its parent (the root of the clock tree is a fixed clock, every
node in clock tree is a
Check hw and hw->dev before dereference it.
Signed-off-by: Claudiu Beznea
Reviewed-by: Simon Glass
---
drivers/clk/clk.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/clk/clk.c b/drivers/clk/clk.c
index 786f4e887e7a..319808d433f5 100644
--- a/drivers/clk/clk.c
+++
In common clock framework the relation b/w parent and child clocks is
determined based on the udevice parent/child information. A clock
parent could be changed based on devices needs. In case this is happen
the functionalities for clock who's parent is changed are broken. Add
a function that
No timer drivers return an error from get_count. Instead of possibly
returning an error, just return the count directly.
Signed-off-by: Sean Anderson
---
Passing CI (but not otherwise tested):
https://dev.azure.com/seanga2/u-boot/_build/results?buildId=25=results
This patch depends on
Hey all,
It's release day and I'm getting this one out on schedule again. With
this release, I'm also opening up -next and will start by testing the
NR_DRAM_BANKS PR and go from there on other series that are in my TODO
list.
Once again, for a changelog,
git log --merges
This allows code to use a construct like `if (gd & gd->...) { ... }` when
accessing the global data pointer. Without this change, it was possible for
a very early trap to cause _exit_trap to read arbitrary memory. This could
cause a second trap, preventing show_regs from being printed.
Fixes:
Without these fences, it is perfectly valid for an out-of-order core to
re-order memory accesses to outside of the available_harts_lock critical
section.
Signed-off-by: Sean Anderson
---
arch/riscv/cpu/start.S | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git
This adds comments regarding the ordering and purpose of certain
instructions as I understand them.
Signed-off-by: Sean Anderson
---
arch/riscv/cpu/start.S | 19 +--
1 file changed, 17 insertions(+), 2 deletions(-)
diff --git a/arch/riscv/cpu/start.S b/arch/riscv/cpu/start.S
Even though we no longer call smp_function if an IPI was not sent by
U-Boot, we still need to clear any IPIs which were pending from the
execution environment. Otherwise, secondary harts will busy-wait in
secondary_hart_loop, instead of relaxing.
Signed-off-by: Sean Anderson
---
Clearing MIP doesn't do anything. Whoops. The following commits should
tackle this problem in a more robust manner.
This reverts commit 9472630337e7c4ac442066b5a752aaa8c3b4d4a6.
Signed-off-by: Sean Anderson
---
arch/riscv/cpu/start.S | 2 --
1 file changed, 2 deletions(-)
diff --git
Some IPIs may already be pending when U-Boot is started. This could be a
problem if a secondary hart tries to handle an IPI before the boot hart has
initialized the IPI device.
This commit uses NULL as a sentinel for secondary harts so they know when
the IPI is initialized, and it is safe to use
On the K210, the prior stage bootloader does not clear IPIs. This presents
a problem, because U-Boot up until this point assumes (with one exception)
that IPIs are cleared when it starts. This series attempts to fix this in a
robust manner, and fix several concurrency bugs I noticed while fixing
Without a matching barrier on the write side, the barrier in handle_ipi
does nothing. It was entirely possible for the boot hart to write to addr,
arg0, and arg1 *after* sending the IPI, because there was no barrier on the
sending side.
Fixes: 90ae28143700bae4edd23930a7772899ad259058
From: Cameron Nemo
On the Pinebook Pro, and perhaps some other boards, the mmc indices are
opposite from what is implied by the comment in
include/configs/rockchip-common.h.
This commit fixes the boot ordering to prioritize the SD card over eMMC.
I am not sure if this appropriate for the
Hi,
The FPGA support in u-boot looks a bit old-fashioned to me.
I would like to have device-tree support and would
like comments on my approach.
BACKGROUND
Need to support loading 2 x Cyclone-10 LP FPGAs using Passive Serial.
On 07/09/2020 10:52, Pali Rohár wrote:
On Monday 07 September 2020 10:46:37 Andre Heider wrote:
Hi Pali,
On 07/09/2020 09:58, Pali Rohár wrote:
On Sunday 06 September 2020 20:44:50 Andre Heider wrote:
On 06/09/2020 11:32, Pali Rohár wrote:
On Saturday 05 September 2020 14:07:44 Andre Heider
Hi Stefan,
On Thu, Aug 27, 2020 at 5:01 PM Stefan Roese wrote:
>
> Hi Rayagonda,
>
> On 26.07.20 19:07, Rayagonda Kokatanur wrote:
> > Use device tree and UCLASS_IRQ driver to get following
> > Generic Interrupt Controller (GIC) details,
> >
> > -GIC Distributor interface (GICD) base address
From: Alexandre GRIVEAUX
Adding Z-turn board V5 to resolve the change between:
"Z-TURNBOARD_schematic.pdf" schematics state version 1 to 4 has Atheros AR8035
"Z-Turn_Board_sch_V15_20160303.pdf" schematics state version 5 has Micrel
KSZ9031
At this time the S25FL128SAGNFI003 doesn't work
On Mon, Sep 07, 2020 at 12:10:49PM +0200, Heinrich Schuchardt wrote:
> The following changes since commit e5df264e7aaca0d94428586837a1f70a23479d16:
>
> Merge https://gitlab.denx.de/u-boot/custodians/u-boot-marvell
> (2020-09-04 10:09:14 -0400)
>
> are available in the Git repository at:
>
>
Hello Takahiro,
on the 32bit Wandboard (with i.mx6 CPU) running the lib_asn1_pkcs7 unit
test results in a crash due to an unaligned access occurring when
br_i32_decode() is called by rsa_gen_key_prop().
Please, check the alignment assumptions for src when calling
br_i32_decode(). If src is only
On 9/7/20 9:57 AM, Simon Glass wrote:
> Hi Sean,
>
> On Sun, 6 Sep 2020 at 20:02, Sean Anderson wrote:
>>
>> On 9/6/20 9:43 PM, Simon Glass wrote:
>>> Hi Sean,
>>>
>>> On Tue, 1 Sep 2020 at 13:56, Sean Anderson wrote:
get_ticks does not always succeed. Sometimes it can be called
On Mon, Sep 07, 2020 at 08:15:13AM -0600, Simon Glass wrote:
> On Mon, 7 Sep 2020 at 08:12, Tom Rini wrote:
> > On Mon, Sep 07, 2020 at 07:57:12AM -0600, Simon Glass wrote:
...
> > On a tangent, when it comes to lab stuff I picked up
> > https://www.yepkit.com/products/ykush a while back
On Fri, 4 Sep 2020 at 14:25, Ard Biesheuvel wrote:
>
> On Fri, 4 Sep 2020 at 13:51, Patrick Delaunay wrote:
> >
> > arm: cache: cp15: don't map reserved region with no-map property
> >
> > Hi,
> >
> > On STM32MP15x platform we can use OP-TEE, loaded in DDR in a region
> > protected
> > by a
This change introduces a clock driver for SCMI agent devices. When
SCMI agent and SCMI clock drivers are enabled, SCMI agent binds a
clock device for each SCMI clock protocol devices enabled in the FDT.
SCMI clock driver is embedded upon CONFIG_CLK_SCMI=y. If enabled,
CONFIG_SCMI_AGENT is also
Add tests for SCMI clocks. A test device driver sandbox-scmi_devices.c
is used to get clock resources, allowing further clock manipulation.
Change sandbox-smci_agent to emulate 3 clocks exposed through 2 agents.
Add DM test scmi_clocks to test these 3 clocks.
Update DM test sandbox_scmi_agent
This change introduces a reset controller driver for SCMI agent devices.
When SCMI agent and SCMI reset domain drivers are enabled, SCMI agent
binds a reset controller device for each SCMI reset domain protocol
devices enabled in the FDT.
SCMI reset driver is embedded upon CONFIG_RESET_SCMI=y. If
Add tests for SCMI reset controllers. A test device driver
sandbox-scmi_devices.c is used to get reset resources, allowing further
resets manipulation.
Change sandbox-smci_agent to emulate 1 reset controller exposed through
an agent. Add DM test scmi_resets to test this reset controller.
This change implements a SMCCC transport for SCMI exchanges. This
implementation follows the Linux kernel as references implementation
for SCMI message processing, using the SMT format for communication
channel meta-data.
Use of SMCCC transport in SCMI FDT bindings are defined in the Linux
kernel
Dump SCMI DT bindings documentation from Linux kernel source
tree v5.8-rc1.
Signed-off-by: Etienne Carriere
Reviewed-by: Simon Glass
---
No change in v3.
Changes in v2:
- No change but added R-b tag.
- Yet a question: do we need to add this binding doc in U-Boot
since already existing in
This change introduces SCMI agent uclass to interact with a firmware
using the SCMI protocols [1].
SCMI agent uclass currently supports a single method to request
processing of the SCMI message by an identified server. A SCMI message
is made of a byte payload associated to a protocol ID and a
This change implements a mailbox transport using SMT format for SCMI
exchanges. This implementation follows the Linux kernel and
SCP-firmware [1] as references implementation for SCMI message
processing using SMT format for communication channel meta-data.
Use of mailboxes in SCMI FDT bindings
> Any thoughts on this issue?
Any reason why you're using 2020.01 and not at least 2020.07, or at
least seeing if it's reproducible on 2020.10-rc3? The RPi4 support has
changed quite a bit since then I suspect.
> Just to be sure, I did some memory testing on the 2GB module, but no
> issues
Hi Tom,
On Mon, 7 Sep 2020 at 08:12, Tom Rini wrote:
>
> On Mon, Sep 07, 2020 at 07:57:12AM -0600, Simon Glass wrote:
> > Hi Andy,
> >
> > On Mon, 7 Sep 2020 at 02:04, Andy Shevchenko
> > wrote:
> > >
> > > On Sat, Sep 5, 2020 at 6:23 AM Simon Glass wrote:
> > > > On Fri, 4 Sep 2020 at 03:46,
On Mon, Sep 07, 2020 at 07:57:12AM -0600, Simon Glass wrote:
> Hi Andy,
>
> On Mon, 7 Sep 2020 at 02:04, Andy Shevchenko
> wrote:
> >
> > On Sat, Sep 5, 2020 at 6:23 AM Simon Glass wrote:
> > > On Fri, 4 Sep 2020 at 03:46, Andy Shevchenko
> > > wrote:
> > > > On Thu, Sep 03, 2020 at
Hi Andy,
On Mon, 7 Sep 2020 at 02:04, Andy Shevchenko wrote:
>
> On Sat, Sep 5, 2020 at 6:23 AM Simon Glass wrote:
> > On Fri, 4 Sep 2020 at 03:46, Andy Shevchenko
> > wrote:
> > > On Thu, Sep 03, 2020 at 07:28:51PM -0600, Simon Glass wrote:
>
> > I do have a question though. How does the
Hi Michal,
On Mon, 7 Sep 2020 at 02:44, Michal Simek wrote:
>
> Hi Simon,
>
> On 06. 09. 20 18:39, Simon Glass wrote:
> > This series adds support for help messages when binary blobs are missing,
> > as well as selecting the default FIT configuration.
> >
> > It includes the v3 patches from the
Hi Sean,
On Sun, 6 Sep 2020 at 20:02, Sean Anderson wrote:
>
> On 9/6/20 9:43 PM, Simon Glass wrote:
> > Hi Sean,
> >
> > On Tue, 1 Sep 2020 at 13:56, Sean Anderson wrote:
> >>
> >> get_ticks does not always succeed. Sometimes it can be called before the
> >> timer has been initialized. If it
Hi Michal,
On Mon, 7 Sep 2020 at 00:31, Michal Simek wrote:
>
> Hi Simon,
>
> On 05. 09. 20 23:10, Simon Glass wrote:
> > If an entry argument is needed by an entry but the entry argument is not
> > present, then a strange error can occur when trying to read the file.
> >
> > Fix this by
Hi Michal,
On Mon, 7 Sep 2020 at 02:27, Michal Simek wrote:
>
> Hi Simon,
>
> On 07. 09. 20 3:43, Simon Glass wrote:
> > Hi Michal,
> >
> > On Thu, 3 Sep 2020 at 05:03, Michal Simek wrote:
> >>
> >> SPL is creating fit-images DT node when loadables are recorded in selected
> >> configuration.
Hi Andy,
On Mon, 7 Sep 2020 at 03:08, Andy Shevchenko
wrote:
>
> On Sun, Sep 06, 2020 at 07:43:39PM -0600, Simon Glass wrote:
> > On Fri, 4 Sep 2020 at 03:33, Andy Shevchenko
> > wrote:
> > > On Thu, Sep 03, 2020 at 07:28:53PM -0600, Simon Glass wrote:
>
> > > > -self._pathname =
Hi Michal,
On Mon, 7 Sep 2020 at 03:01, Michal Simek wrote:
>
> Hi Simon,
>
> On 07. 09. 20 3:43, Simon Glass wrote:
> > Hi Michal,
> >
> > On Thu, 3 Sep 2020 at 06:30, Michal Simek wrote:
> >>
> >> Hi,
> >>
> >> On 03. 09. 20 13:16, Heinrich Schuchardt wrote:
> >>> On 9/3/20 1:03 PM, Michal
Hi Michal,
On Mon, 7 Sep 2020 at 07:02, Michal Simek wrote:
>
> Hi,
>
> On 06. 09. 20 2:18, Simon Glass wrote:
> > Hi Samuel,
> >
> > On Sat, 5 Sep 2020 at 17:10, Samuel Holland wrote:
> >>
> >> On 9/1/20 6:14 AM, Simon Glass wrote:
> >>> At present 64-bit sunxi boards use the Makefile to
Hi Michal,
On Mon, 7 Sep 2020 at 02:29, Michal Simek wrote:
>
>
>
> On 07. 09. 20 3:43, Simon Glass wrote:
> > Hi Michal,
> >
> > On Thu, 3 Sep 2020 at 05:03, Michal Simek wrote:
> >>
> >> The commit 9f45aeb93727 ("spl: fit: implement fdt_record_loadable") which
> >> introduced
I am leaving Bosch, so replacing myself with Gireesh
Signed-off-by: Moses Christopher
---
board/bosch/guardian/MAINTAINERS | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/board/bosch/guardian/MAINTAINERS b/board/bosch/guardian/MAINTAINERS
index 2f674d7f83..fd216a96ca 100644
On 28.08.2020 08:37, Peng Fan wrote:
>> Subject: [PATCH v2 4/6] mmc: atmel-sdhci: do not check clk_set_rate return
>> value
>>
>> clk_set_rate will return rate in case of success and zero in case of error,
>> however it can also return -ev, but it's an ulong function.
>> To avoid any issues,
On Mon, Sep 07, 2020 at 08:57:39AM -0400, Tom Rini wrote:
> On Mon, Sep 07, 2020 at 11:52:35AM +0200, Edgar E. Iglesias wrote:
> > On Fri, Sep 04, 2020 at 12:43:57PM -0600, Stephen Warren wrote:
> > > On 9/4/20 3:07 AM, Edgar E. Iglesias wrote:
> > > > From: "Edgar E. Iglesias"
> > > >
> > > >
On 05.08.2020 18:11, Claudiu Beznea wrote:
> Move clock code to compat.c to allow switching to CCF
> without mixing CCF code with non CCF code. This prepares the
> field for next commits.
>
> Signed-off-by: Claudiu Beznea
> ---
Hi Claudiu,
I want to apply these, but meanwhile, there are some
On Mon, Sep 07, 2020 at 03:42:07PM +0530, meenakshi.aggar...@nxp.com wrote:
> From: Meenakshi Aggarwal
>
> This patch add base support for LX2162AQDS board.
> LX2162AQDS board supports LX2162A family SoCs.
> This patch add basic support of platform.
>
> Signed-off-by: Ioana Ciornei
>
On Mon, Sep 07, 2020 at 03:42:06PM +0530, meenakshi.aggar...@nxp.com wrote:
> From: Meenakshi Aggarwal
>
> LX2162 is LX2160 based SoC, it has same die as of LX2160
> with different packaging.
>
> LX2162A support 64-bit 2.9GT/s DDR4 memory, i2c, micro-click module,
> microSD card, eMMC support,
Hi Priyanka,
On Mon, Sep 7, 2020 at 2:26 PM Priyanka Jain wrote:
> Hello Rayagonda,
>
>
>
> With today top of upstream u-boot tree, I am still getting the error in
> booting lx216ardb
>
>
>
> U-Boot 2020.10-rc3-00086-ge5df264e7a (Sep 07 2020 - 14:13:57 +0530)
>
>
>
> “Error binding driver
Hi,
On 06. 09. 20 2:18, Simon Glass wrote:
> Hi Samuel,
>
> On Sat, 5 Sep 2020 at 17:10, Samuel Holland wrote:
>>
>> On 9/1/20 6:14 AM, Simon Glass wrote:
>>> At present 64-bit sunxi boards use the Makefile to create a FIT, using
>>> USE_SPL_FIT_GENERATOR. This is deprecated.
>>>
>>> Update
On Mon, Sep 07, 2020 at 11:52:35AM +0200, Edgar E. Iglesias wrote:
> On Fri, Sep 04, 2020 at 12:43:57PM -0600, Stephen Warren wrote:
> > On 9/4/20 3:07 AM, Edgar E. Iglesias wrote:
> > > From: "Edgar E. Iglesias"
> > >
> > > PIE requires a 4K aligned load address. If this is not met, trap
> > >
Hi Tom,
thanks for the review!
Am 2020-08-31 18:08, schrieb Tom Rini:
On Sun, Aug 30, 2020 at 10:03:00PM +0200, Michael Walle wrote:
Add basic support for the Kontron SMARC-sAL28 board. This includes
just
the bare minimum to be able to bring up the board and boot linux.
For now, the Single
Hi,
On 9/7/20 4:02 PM, Faiz Abbas wrote:
> Hi Vignesh,
>
> On 07/09/20 1:48 pm, Vignesh Raghavendra wrote:
>>
>>
>> On 9/7/20 12:36 PM, Faiz Abbas wrote:
>>> Hi Lokesh,
>>>
>>> On 07/09/20 12:08 pm, Lokesh Vutla wrote:
[...]
> struct omap3_spi_priv {
> struct mcspi *regs;
>
On 9/2/20 4:48 PM, Faiz Abbas wrote:
> Add an ofdata_to_platdata() callback to access dts in U-boot and
> access all platform data in it. This prepares the driver for supporting
> both device tree as well as static platform data structures in SPL.
>
> Signed-off-by: Faiz Abbas
> ---
>
On 9/2/20 4:48 PM, Faiz Abbas wrote:
> Add an ofdata_to_platdata() callback to access dts in U-boot and
> access all platform data in it. This prepares the driver for supporting
> both device tree as well as static platform data structures in SPL.
>
> Signed-off-by: Faiz Abbas
> ---
>
On Fri, Sep 04, 2020 at 12:43:57PM -0600, Stephen Warren wrote:
> On 9/4/20 3:07 AM, Edgar E. Iglesias wrote:
> > From: "Edgar E. Iglesias"
> >
> > PIE requires a 4K aligned load address. If this is not met, trap
> > the startup sequence in a WFI loop rather than running into obscure
> >
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