Reformat README.commands as reStructured text and add it to the HTML
documentation as develop/commands.rst.
Signed-off-by: Heinrich Schuchardt
---
doc/README.commands | 186
doc/develop/commands.rst | 226 +++
Hi Tom,
after this NAND driver is in master, we can look at reducing the number
of defconfigs for this board and send out a new patch.
Thanks
-Alex
> On Dec 11, 2020, at 12:54 PM, Tom Rini wrote:
>
> On Tue, Dec 08, 2020 at 11:37:37AM -0800, Alex Nemirovsky wrote:
>
>> From: Kate Liu
>>
>>
From: Kate Liu
Add Cortina Access parallel Nand support for CA SOCs
Signed-off-by: Kate Liu
Signed-off-by: Alex Nemirovsky
CC: Tom Rini
CC: Scott Wood
---
Changes in v2:
- Cleanup nand_ctrl struct offset comments
MAINTAINERS |2 +
From: Kate Liu
Set environment for Nand flash (U-boot 2020.04):
- add nand flash in the device tree
- add new default configuration file for G3 using parallel Nand
- set nand parameters in presidio_asic.h
Signed-off-by: Kate Liu
Signed-off-by: Alex Nemirovsky
CC: Tom Rini
---
Changes in
Hi,
On Thu, 3 Dec 2020 at 16:55, Simon Glass wrote:
>
> There are several naming problems in driver model which I think are worth
> sorting out.
>
> FIrstly, the _auto_alloc_size suffix is widely used but is quite
> long-winded. In earlier days it made some sense since auto allocation was
> a
On Tue, Dec 08, 2020 at 11:37:36AM -0800, Alex Nemirovsky wrote:
> From: Kate Liu
>
> Add Cortina Access parallel Nand support for CA SOCs
>
> Signed-off-by: Kate Liu
> Signed-off-by: Alex Nemirovsky
> CC: Tom Rini
> CC: Scott Wood
A one small things:
[snip]
> +struct nand_ctlr {
> +
On Tue, Dec 08, 2020 at 11:37:37AM -0800, Alex Nemirovsky wrote:
> From: Kate Liu
>
> Set environment for Nand flash (U-boot 2020.04):
> - add nand flash in the device tree
> - add new default configuration file for G3 using parallel Nand
> - set nand parameters in presidio_asic.h
>
>
On Thu, Dec 10, 2020 at 07:34:56PM +0100, Heinrich Schuchardt wrote:
> Dear Tom,
>
> The following changes since commit 03f1f78a9b44b5fd6fc09faf81639879d2d0f85f:
>
> spl: fit: Prefer a malloc()'d buffer for loading images (2020-12-07
> 17:40:34 -0500)
>
> are available in the Git repository
On Fri, Dec 11, 2020 at 07:44:52AM +, Priyanka Jain wrote:
> Dear Tom,
>
> Please find my pull-request for u-boot-fsl-qoriq/master
> https://github.com/u-boot/u-boot/pull/42/checks
>
> Summary
> Add lx2162 soc, lx2162qds support.
> Bug-fixes related ls102x-usb, ifc, bootcmd, secure-boot
Hello Tom,
Please pull tag u-boot-atmel-fixes-2021.01-b , the second set of atmel
fixes for 2021.01 cycle.
This set includes very important fixes for: MMC booting on several
boards, drive strength on sam9x60ek mmc lines, compile issues for
timer.c old driver, removal of unwanted access to
On Mon, Nov 30, 2020 at 3:18 AM Biju Das wrote:
>
> Hi All,
>
> Gentle Ping. Please let me know, are we happy with this patch series?
>
I have a series pending this as well.
thank you,
adam
> The patch series[1] is blocked by this.
> [1]
>
On 07.12.2020 10:39, Eugen Hristev wrote:
> The correct compatible for this eeproms is microchip,24aa02e48
> The previous compatible string was working up to U-boot 2020.04.
>
> Signed-off-by: Eugen Hristev
> Tested-by: Codrin Ciubotariu
> ---
Applied to u-boot-atmel/master
This commit add an option TPL_BOOTCOUNT_LIMIT to
use bootcount on TPL.
Signed-off-by: Philippe Reynes
---
common/spl/Kconfig | 9 -
common/spl/spl.c| 4 +++-
drivers/Makefile| 1 +
include/bootcount.h | 6 +++---
4 files changed, 15 insertions(+), 5 deletions(-)
diff --git
Hi Nicolas,
> > > Add the follwing functions to get a specific device's DMA ranges:
> > > - dev_get_dma_range()
> > > - ofnode_get_dma_range()
> > > - of_get_dma_range()
> > > - fdt_get_dma_range()
> > > They are specially useful in oder to be able validate a physical address
> > > space
Tested-by: Dennis Gilmore
On Fri, 2020-12-11 at 05:47 +0100, Stefan Roese wrote:
> For correct spi bus detection the spi0 alias is needed in the DT.
> Otherwise this error will ocurr in U-Boot:
>
> Invalid bus 0 (err=-19)
> Failed to initialize SPI flash at 0:0 (error -19)
>
> Signed-off-by:
Tested-by: Dennis Gilmore
On Thu, 2020-12-10 at 06:40 +0100, Stefan Roese wrote:
> Add some missing "u-boot,dm-pre-reloc;" properties to UART0, SPI
> controller and SPI NOR flash node to enable usage in SPL. Otherwise
> these devices will not be available.
>
> Signed-off-by: Stefan Roese
> Cc:
Hi Michal, Heinrich,
On Fri, 11 Dec 2020 at 00:54, Michal Simek wrote:
>
>
>
> On 11. 12. 20 8:42, Heinrich Schuchardt wrote:
> > On 12/11/20 8:28 AM, Michal Simek wrote:
> >> Hi Simon,
> >>
> >> On 10. 12. 20 18:46, Simon Glass wrote:
> >>> Hi Michal,
> >>>
> >>> On Thu, 10 Dec 2020 at 10:33,
On 11. 12. 20 8:42, Heinrich Schuchardt wrote:
> On 12/11/20 8:28 AM, Michal Simek wrote:
>> Hi Simon,
>>
>> On 10. 12. 20 18:46, Simon Glass wrote:
>>> Hi Michal,
>>>
>>> On Thu, 10 Dec 2020 at 10:33, Michal Simek
>>> wrote:
Hi Simon,
On 10. 12. 20 18:27, Simon Glass
Hi Simon,
On 10. 12. 20 18:46, Simon Glass wrote:
> Hi Michal,
>
> On Thu, 10 Dec 2020 at 10:33, Michal Simek wrote:
>>
>> Hi Simon,
>>
>> On 10. 12. 20 18:27, Simon Glass wrote:
>>> Hi Michal,
>>>
>>> On Thu, 10 Dec 2020 at 00:34, Michal Simek wrote:
Hi,
On 09. 12. 20
From: Aaron Williams
Import cvmx-bgxx-defs.h header file from 2013 U-Boot. It will be used
by the later added drivers to support PCIe and networking on the MIPS
Octeon II / III platforms.
Signed-off-by: Aaron Williams
Signed-off-by: Stefan Roese
---
From: Aaron Williams
Import cvmx-agl-defs.h header file from 2013 U-Boot. It will be used
by the later added drivers to support PCIe and networking on the MIPS
Octeon II / III platforms.
Signed-off-by: Aaron Williams
Signed-off-by: Stefan Roese
---
On 12/11/20 8:28 AM, Michal Simek wrote:
Hi Simon,
On 10. 12. 20 18:46, Simon Glass wrote:
Hi Michal,
On Thu, 10 Dec 2020 at 10:33, Michal Simek wrote:
Hi Simon,
On 10. 12. 20 18:27, Simon Glass wrote:
Hi Michal,
On Thu, 10 Dec 2020 at 00:34, Michal Simek wrote:
Hi,
On 09. 12. 20
Hi Bin,
On Thu, 10 Dec 2020 at 21:37, Bin Meng wrote:
>
> On Fri, Dec 11, 2020 at 12:32 PM Sean Anderson wrote:
> >
> > On 12/10/20 11:27 PM, Bin Meng wrote:
> > > On Fri, Dec 11, 2020 at 12:08 PM Bin Meng wrote:
> > >>
> > >> Hi Simon,
> > >>
> > >> The following command no longer works. They
From: Aaron Williams
Import cvmx-helper.c from 2013 U-Boot. It will be used by the later
added drivers to support PCIe and networking on the MIPS Octeon II / III
platforms.
Signed-off-by: Aaron Williams
Signed-off-by: Stefan Roese
---
arch/mips/mach-octeon/cvmx-helper.c | 2611
From: Aaron Williams
Import cvmx-pcie.c from 2013 U-Boot. It will be used by the later
added drivers to support PCIe and networking on the MIPS Octeon II / III
platforms.
Signed-off-by: Aaron Williams
Signed-off-by: Stefan Roese
---
arch/mips/mach-octeon/cvmx-pcie.c | 2487
From: Aaron Williams
Import cvmx-qlm.c from 2013 U-Boot. It will be used by the later
added drivers to support PCIe and networking on the MIPS Octeon II / III
platforms.
Signed-off-by: Aaron Williams
Signed-off-by: Stefan Roese
---
arch/mips/mach-octeon/cvmx-qlm.c | 2350
From: Aaron Williams
Import cvmx-helper-util.c from 2013 U-Boot. It will be used by the later
added drivers to support PCIe and networking on the MIPS Octeon II / III
platforms.
Signed-off-by: Aaron Williams
Signed-off-by: Stefan Roese
---
arch/mips/mach-octeon/cvmx-helper-util.c | 1225
From: Aaron Williams
This patch adds the board specific QLM/DLM init code to the Octeon 3
EBB7304 board. The configuration of each port is read from the
environment exactly as done in the 2013 U-Boot version to keep the
board and it's configuration compatible.
Signed-off-by: Aaron Williams
This patch changes the MIPS Octeon defconfig to enable some features
for PCIe enablement. This includes CONFIG_BOARD_LATE_INIT to call the
board specific serdes init code.
With these features enabled, the serdes and PCIe driver including the
Intel E1000 driver can be tested on the Octeon EBB7304.
From: Aaron Williams
Import octeon_fdt.c from 2013 U-Boot. It will be used by the later
added drivers to support PCIe and networking on the MIPS Octeon II / III
platforms.
Signed-off-by: Aaron Williams
Signed-off-by: Stefan Roese
---
arch/mips/mach-octeon/octeon_fdt.c | 1040
This patch adds the PCIe host controller driver for MIPS Octeon II/III.
The driver mainly consist of the PCI config functions, as all of the
complex serdes related port / lane setup, is done in the serdes / pcie
code available in the "arch/mips/mach-octeon" directory.
Signed-off-by: Stefan Roese
This patch adds the PCIe controller node to the MIPS Octeon 73xx dtsi
file.
Signed-off-by: Stefan Roese
---
arch/mips/dts/mrvl,cn73xx.dtsi | 16
1 file changed, 16 insertions(+)
diff --git a/arch/mips/dts/mrvl,cn73xx.dtsi b/arch/mips/dts/mrvl,cn73xx.dtsi
index
From: Aaron Williams
Import cvmx-helper-cfg.c from 2013 U-Boot. It will be used by the later
added drivers to support PCIe and networking on the MIPS Octeon II / III
platforms.
Signed-off-by: Aaron Williams
Signed-off-by: Stefan Roese
---
arch/mips/mach-octeon/cvmx-helper-cfg.c | 1914
From: Aaron Williams
Import cvmx-sso-defs.h header file from 2013 U-Boot. It will be used
by the later added drivers to support PCIe and networking on the MIPS
Octeon II / III platforms.
Signed-off-by: Aaron Williams
Signed-off-by: Stefan Roese
---
Setting CONFIG_SYS_PCI_64BIT is needed for correct PCIe functionality on
MIPS Octeon.
Signed-off-by: Stefan Roese
---
arch/mips/mach-octeon/Kconfig | 4
1 file changed, 4 insertions(+)
diff --git a/arch/mips/mach-octeon/Kconfig b/arch/mips/mach-octeon/Kconfig
index e8596ed99a..d69408cc27
This patch adds the newly added C files to the Makefile to enable
compilation. This is done in a separate step, to not introduce build
breakage while adding the single files with potentially missing
externals.
Signed-off-by: Stefan Roese
---
arch/mips/mach-octeon/Makefile | 11 +++
1
From: Aaron Williams
Import cvmx-pki-defs.h header file from 2013 U-Boot. It will be used
by the later added drivers to support PCIe and networking on the MIPS
Octeon II / III platforms.
Signed-off-by: Aaron Williams
Signed-off-by: Stefan Roese
---
From: Aaron Williams
Import cvmx-helper-fdt.c from 2013 U-Boot. It will be used by the later
added drivers to support PCIe and networking on the MIPS Octeon II / III
platforms.
Signed-off-by: Aaron Williams
Signed-off-by: Stefan Roese
---
arch/mips/mach-octeon/cvmx-helper-fdt.c | 970
From: Aaron Williams
Import cvmx-helper-jtag.c from 2013 U-Boot. It will be used by the later
added drivers to support PCIe and networking on the MIPS Octeon II / III
platforms.
Signed-off-by: Aaron Williams
Signed-off-by: Stefan Roese
---
arch/mips/mach-octeon/cvmx-helper-jtag.c | 172
With the newly added headers and their restructuring (which macro is
defined where), some changes in the already existing Octeon files are
necessary. This patch makes the necessary changes.
Signed-off-by: Stefan Roese
---
arch/mips/mach-octeon/bootoctlinux.c | 1 +
From: Aaron Williams
Import cvmx-pip-defs.h header file from 2013 U-Boot. It will be used
by the later added drivers to support PCIe and networking on the MIPS
Octeon II / III platforms.
Signed-off-by: Aaron Williams
Signed-off-by: Stefan Roese
---
From: Aaron Williams
Import cvmx-pow-defs.h header file from 2013 U-Boot. It will be used
by the later added drivers to support PCIe and networking on the MIPS
Octeon II / III platforms.
Signed-off-by: Aaron Williams
Signed-off-by: Stefan Roese
---
To match all other cvmx-* header, this patch moves the already existing
cvmx-lmcx-defs.h header one directory up.
Signed-off-by: Stefan Roese
---
arch/mips/mach-octeon/include/mach/{cvmx => }/cvmx-lmcx-defs.h | 0
arch/mips/mach-octeon/include/mach/octeon_ddr.h| 2 +-
2 files
From: Aaron Williams
Import cvmx-gserx-defs.h header file from 2013 U-Boot. It will be used
by the later added drivers to support PCIe and networking on the MIPS
Octeon II / III platforms.
Signed-off-by: Aaron Williams
Signed-off-by: Stefan Roese
---
.../include/mach/cvmx-gserx-defs.h
From: Aaron Williams
Import cvmx-pcsx-defs.h header file from 2013 U-Boot. It will be used
by the later added drivers to support PCIe and networking on the MIPS
Octeon II / III platforms.
Signed-off-by: Aaron Williams
Signed-off-by: Stefan Roese
---
From: Aaron Williams
Import cvmx-sriox-defs.h header file from 2013 U-Boot. It will be used
by the later added drivers to support PCIe and networking on the MIPS
Octeon II / III platforms.
Signed-off-by: Aaron Williams
Signed-off-by: Stefan Roese
---
.../include/mach/cvmx-sriox-defs.h
From: Aaron Williams
Import cvmx-smix-defs.h header file from 2013 U-Boot. It will be used
by the later added drivers to support PCIe and networking on the MIPS
Octeon II / III platforms.
Signed-off-by: Aaron Williams
Signed-off-by: Stefan Roese
---
From: Aaron Williams
Import cvmx-pepx-defs.h header file from 2013 U-Boot. It will be used
by the later added drivers to support PCIe and networking on the MIPS
Octeon II / III platforms.
Signed-off-by: Aaron Williams
Signed-off-by: Stefan Roese
---
From: Aaron Williams
Import cvmx-sriomaintx-defs.h header file from 2013 U-Boot. It will be used
by the later added drivers to support PCIe and networking on the MIPS
Octeon II / III platforms.
Signed-off-by: Aaron Williams
Signed-off-by: Stefan Roese
---
From: Aaron Williams
Import cvmx-sata-defs.h header file from 2013 U-Boot. It will be used
by the later added drivers to support PCIe and networking on the MIPS
Octeon II / III platforms.
Signed-off-by: Aaron Williams
Signed-off-by: Stefan Roese
---
From: Aaron Williams
Import cvmx-rst-defs.h header file from 2013 U-Boot. It will be used
by the later added drivers to support PCIe and networking on the MIPS
Octeon II / III platforms.
Signed-off-by: Aaron Williams
Signed-off-by: Stefan Roese
---
From: Aaron Williams
Import cvmx-pemx-defs.h header file from 2013 U-Boot. It will be used
by the later added drivers to support PCIe and networking on the MIPS
Octeon II / III platforms.
Signed-off-by: Aaron Williams
Signed-off-by: Stefan Roese
---
From: Aaron Williams
Import cvmx-npi-defs.h header file from 2013 U-Boot. It will be used
by the later added drivers to support PCIe and networking on the MIPS
Octeon II / III platforms.
Signed-off-by: Aaron Williams
Signed-off-by: Stefan Roese
---
From: Aaron Williams
Import cvmx-ipd-defs.h header file from 2013 U-Boot. It will be used
by the later added drivers to support PCIe and networking on the MIPS
Octeon II / III platforms.
Signed-off-by: Aaron Williams
Signed-off-by: Stefan Roese
---
From: Aaron Williams
Import cvmx-fpa-defs.h header file from 2013 U-Boot. It will be used
by the later added drivers to support PCIe and networking on the MIPS
Octeon II / III platforms.
Signed-off-by: Aaron Williams
Signed-off-by: Stefan Roese
---
From: Aaron Williams
Import cvmx-dpi-defs.h header file from 2013 U-Boot. It will be used
by the later added drivers to support PCIe and networking on the MIPS
Octeon II / III platforms.
Signed-off-by: Aaron Williams
Signed-off-by: Stefan Roese
---
From: Aaron Williams
Import cvmx-mio-defs.h header file from 2013 U-Boot. It will be used
by the later added drivers to support PCIe and networking on the MIPS
Octeon II / III platforms.
Signed-off-by: Aaron Williams
Signed-off-by: Stefan Roese
---
From: Aaron Williams
Import cvmx-l2c-defs.h header file from 2013 U-Boot. It will be used
by the later added drivers to support PCIe and networking on the MIPS
Octeon II / III platforms.
Signed-off-by: Aaron Williams
Signed-off-by: Stefan Roese
---
From: Aaron Williams
Import cvmx-asxx-defs.h header file from 2013 U-Boot. It will be used
by the later added drivers to support PCIe and networking on the MIPS
Octeon II / III platforms.
Signed-off-by: Aaron Williams
Signed-off-by: Stefan Roese
---
From: Aaron Williams
Import cvmx-dbg-defs.h header file from 2013 U-Boot. It will be used
by the later added drivers to support PCIe and networking on the MIPS
Octeon II / III platforms.
Signed-off-by: Aaron Williams
Signed-off-by: Stefan Roese
---
This patchset adds the serdes and (mostly networking) device helper
macros and functions, needed to support the still missing Octeon II /
III devices in mainline U-Boot.
Please excuse the massive amount of files in this patch series. Also the
sometimes huge files (mostly headers with register
This will be used by the upcoming Serdes and driver code ported from
the original 2013 U-Boot code to mainline.
Signed-off-by: Stefan Roese
---
arch/mips/include/asm/global_data.h | 9 +
1 file changed, 9 insertions(+)
diff --git a/arch/mips/include/asm/global_data.h
Activate the live DT to reduce the DT parsing time.
For example the boot time is reduced by 200ms on STM32MP157C-EV1 board
for stm32mp15_basic_defconfig (boot with SPL) or
stm32mp15_trusted_defconfig (boot with TF-A).
Signed-off-by: Patrick Delaunay
---
Commit for u-boot/next = v2021.04
The
A common use of memmove() can be handled by memcpy(). Also memcpy()
includes an optimization for large sizes: it copies a word at a time. So
we can get a speed-up by calling memcpy() to handle our move in this case.
Update memmove() to call also memcpy() if the source don't overlap
the
Hi Padmarao,
On Fri, Dec 11, 2020 at 8:07 PM Padmarao Begari wrote:
>
> Hi Bin,
>
> On Fri, Dec 11, 2020 at 2:59 PM Bin Meng wrote:
>>
>> Hi Padmarao,
>>
>> On Fri, Dec 11, 2020 at 4:49 PM Padmarao Begari wrote:
>> >
>> > Hi Bin,
>> >
>> > On Thu, Dec 10, 2020 at 4:08 PM Bin Meng wrote:
>> >>
Hi Padmarao,
On Fri, Dec 11, 2020 at 7:37 PM Padmarao Begari wrote:
>
> Hi Bin,
>
> On Fri, Dec 11, 2020 at 2:55 PM Bin Meng wrote:
>>
>> Hi Padmarao,
>>
>> On Fri, Dec 11, 2020 at 4:32 PM Padmarao Begari wrote:
>> >
>> > Hi Bin,
>> >
>> > On Fri, Dec 11, 2020 at 1:31 PM Bin Meng wrote:
>> >>
From: Patrick Delaunay
Remove the test on data->dfu_seq, because dfu_seq=0 not only when
the DFU is not started (mask with 0x). This flush is mandatory
as the final treatment, common with USB, is done in DFU callback.
This patch avoids issue if the received length is a multiple of
the DFU
Hi Bin,
On Fri, Dec 11, 2020 at 2:57 PM Bin Meng wrote:
> HI Padmarao,
>
> On Fri, Dec 11, 2020 at 4:23 PM Padmarao Begari
> wrote:
> >
> > Hi Bin,
> >
> > On Fri, Dec 11, 2020 at 1:22 PM Bin Meng wrote:
> >>
> >> Hi Padmarao,
> >>
> >> On Fri, Dec 11, 2020 at 3:10 PM Padmarao Begari
>
Hi Bin,
On Fri, Dec 11, 2020 at 2:59 PM Bin Meng wrote:
> Hi Padmarao,
>
> On Fri, Dec 11, 2020 at 4:49 PM Padmarao Begari
> wrote:
> >
> > Hi Bin,
> >
> > On Thu, Dec 10, 2020 at 4:08 PM Bin Meng wrote:
> >>
> >> Hi Padmarao,
> >>
> >> On Thu, Dec 10, 2020 at 6:33 PM Bin Meng wrote:
> >> >
Beacon EmbeddedWorks is releasing a devkit based on the i.MX8M
Nano SoC consisting of baseboard + SOM.
The kit is based on the same design as the Beacon dev kit with
the i.MX8M Mini.
Signed-off-by: Adam Ford
---
V2: Update README file to reference newer DDR firmware
diff --git
Hi Bin,
On Fri, Dec 11, 2020 at 2:55 PM Bin Meng wrote:
> Hi Padmarao,
>
> On Fri, Dec 11, 2020 at 4:32 PM Padmarao Begari
> wrote:
> >
> > Hi Bin,
> >
> > On Fri, Dec 11, 2020 at 1:31 PM Bin Meng wrote:
> >>
> >> Hi Padmarao,
> >>
> >> On Thu, Dec 3, 2020 at 4:44 AM Padmarao Begari
> >>
Hi Pali,
On 11/12/20 1:31 am, Pali Rohár wrote:
> Hello Lokesh, could you please process this patch series? USB serial
> console on Nokia N900 is really useful for debugging and currently in
> U-Boot master code is broken. Pavel has already reviewed patches and
> also CI tests passed.
I am out
On 2020-12-07 07:14, Priyanka Jain wrote:
From: Nikhil Gupta
Add programming of GIC LPI configuration table:
1. Program Redistributor PROCBASER configuration table
The register name is GICR_PROPBASER.
which is common for all redistributors.
2. Program Redistributor pending table
The fsp_types.h header file contains macros for building signatures of
different widths. These signature macros are architecture agnostic,
and can be used in all places which use signatures in a data
structure. Move and rename the fsp_types.h under the common include
header.
Signed-off-by:
Hi Padmarao,
On Fri, Dec 11, 2020 at 4:49 PM Padmarao Begari wrote:
>
> Hi Bin,
>
> On Thu, Dec 10, 2020 at 4:08 PM Bin Meng wrote:
>>
>> Hi Padmarao,
>>
>> On Thu, Dec 10, 2020 at 6:33 PM Bin Meng wrote:
>> >
>> > Hi Padmarao,
>> >
>> > On Thu, Dec 3, 2020 at 4:44 AM Padmarao Begari
>> >
HI Padmarao,
On Fri, Dec 11, 2020 at 4:23 PM Padmarao Begari wrote:
>
> Hi Bin,
>
> On Fri, Dec 11, 2020 at 1:22 PM Bin Meng wrote:
>>
>> Hi Padmarao,
>>
>> On Fri, Dec 11, 2020 at 3:10 PM Padmarao Begari wrote:
>> >
>> > Hi Bin,
>> >
>> > On Thu, Dec 10, 2020 at 4:11 PM Bin Meng wrote:
>> >>
Hi Padmarao,
On Fri, Dec 11, 2020 at 4:32 PM Padmarao Begari wrote:
>
> Hi Bin,
>
> On Fri, Dec 11, 2020 at 1:31 PM Bin Meng wrote:
>>
>> Hi Padmarao,
>>
>> On Thu, Dec 3, 2020 at 4:44 AM Padmarao Begari
>> wrote:
>> >
>> > Add device tree for Microchip PolarFire SoC Icicle Kit.
>> >
>> >
> -Original Message-
> From: Priyanka Jain
> Sent: 2020年12月11日 16:15
> To: Qiang Zhao ; Meenakshi Aggarwal
>
> Cc: u-boot@lists.denx.de; Qiang Zhao
> Subject: RE: [Patch v2] armv8: dts: fsl-lx2162a: add dspi node into qds dts
>
> >-Original Message-
> >From: Qiang Zhao
>
From: Zhao Qiang
Add dspi node into lx2162aqds device tree
Signed-off-by: Zhao Qiang
---
changes for v2:
- add alias part
changes for v3:
- rebase
arch/arm/dts/fsl-lx2162a-qds.dts | 102 +++
1 file changed, 102 insertions(+)
diff --git
> -Original Message-
> From: Priyanka Jain
> Sent: Friday, December 11, 2020 1:49 PM
> To: Wasim Khan ; u-boot@lists.denx.de; Priyanka Jain
> (OSS) ; Varun Sethi ;
> Meenakshi Aggarwal
> Cc: Wasim Khan
> Subject: RE: [PATCH] armv8: lx2162aqds: disable non existing pcie controllers
>
Hello Adam,
> -Original Message-
> From: U-Boot On Behalf Of Adam Ford
> Sent: Thursday, December 10, 2020 5:08 PM
> To: u-boot@lists.denx.de
> Cc: af...@beaconembedded.com; Adam Ford ; Stefano
> Babic ; Fabio Estevam ; NXP i.MX U-
> Boot Team
> Subject: [PATCH] imx: Add support for
disable non existing pcie controllers on lx2162aqds
Signed-off-by: Wasim Khan
---
Changes in v2:
- Rebased to u-boot-fsl-qoriq
arch/arm/dts/fsl-lx2162a-qds.dts | 22 ++
1 file changed, 10 insertions(+), 12 deletions(-)
diff --git a/arch/arm/dts/fsl-lx2162a-qds.dts
Hi Simon,
Am 2020-12-11 02:31, schrieb Simon Glass:
At present each device has two sequence numbers, with 'req_seq' being
set up at bind time and 'seq' at probe time. The idea is that devices
can 'request' a sequence number and then the conflicts are resolved
when
the device is probed.
This
Hi Bin,
On Thu, Dec 10, 2020 at 4:08 PM Bin Meng wrote:
> Hi Padmarao,
>
> On Thu, Dec 10, 2020 at 6:33 PM Bin Meng wrote:
> >
> > Hi Padmarao,
> >
> > On Thu, Dec 3, 2020 at 4:44 AM Padmarao Begari
> > wrote:
> > >
> > > Enable 32-bit or 64-bit DMA in the macb driver based on the macb
> > >
Hi Bin,
On Thu, Dec 10, 2020 at 4:08 PM Bin Meng wrote:
> Hi Padmarao,
>
> On Thu, Dec 10, 2020 at 6:33 PM Bin Meng wrote:
> >
> > Hi Padmarao,
> >
> > On Thu, Dec 3, 2020 at 4:44 AM Padmarao Begari
> > wrote:
> > >
> > > Enable 32-bit or 64-bit DMA in the macb driver based on the macb
> > >
Hi Bin,
On Fri, Dec 11, 2020 at 1:31 PM Bin Meng wrote:
> Hi Padmarao,
>
> On Thu, Dec 3, 2020 at 4:44 AM Padmarao Begari
> wrote:
> >
> > Add device tree for Microchip PolarFire SoC Icicle Kit.
> >
> > Signed-off-by: Padmarao Begari
> > Reviewed-by: Anup Patel
>
> Sorry 2 more warnings,
Hi Bin,
On Fri, Dec 11, 2020 at 1:22 PM Bin Meng wrote:
> Hi Padmarao,
>
> On Fri, Dec 11, 2020 at 3:10 PM Padmarao Begari
> wrote:
> >
> > Hi Bin,
> >
> > On Thu, Dec 10, 2020 at 4:11 PM Bin Meng wrote:
> >>
> >> Hi Padmarao,
> >>
> >> On Thu, Dec 3, 2020 at 4:43 AM Padmarao Begari
> >>
>-Original Message-
>From: U-Boot On Behalf Of Wasim Khan
>Sent: Tuesday, September 29, 2020 12:09 PM
>To: u-boot@lists.denx.de; Priyanka Jain (OSS) ;
>Varun Sethi ; Meenakshi Aggarwal
>
>Cc: Wasim Khan
>Subject: [PATCH] armv8: lx2162aqds: disable non existing pcie controllers
>
>disable
>-Original Message-
>From: Gaurav Jain
>Sent: Monday, September 28, 2020 6:22 PM
>To: u-boot@lists.denx.de; Priyanka Jain
>Cc: Ruchika Gupta ; Gaurav Jain
>
>Subject: [PATCH] configs: lx2162a: Enable OPTEE support
>
>From: Ruchika Gupta
>
>Enable support to compile OPTEE driver, access
>-Original Message-
>From: Yangbo Lu
>Sent: Friday, September 11, 2020 3:57 PM
>To: u-boot@lists.denx.de; Priyanka Jain
>Cc: Y.b. Lu
>Subject: configs: lx2162aqds: enable CONFIG_BOARD_EARLY_INIT_R
>
>From: Guanhua Gao
>
>From: Yangbo Lu
>
>Enable CONFIG_BOARD_EARLY_INIT_R for SDHC
>-Original Message-
>From: Qiang Zhao
>Sent: Friday, October 9, 2020 10:48 AM
>To: Priyanka Jain ; Meenakshi Aggarwal
>
>Cc: u-boot@lists.denx.de; Qiang Zhao
>Subject: [Patch v2] armv8: dts: fsl-lx2162a: add dspi node into qds dts
>
>From: Zhao Qiang
>
>Add dspi node into lx2162aqds
>-Original Message-
>From: Yangbo Lu
>Sent: Tuesday, October 13, 2020 11:48 AM
>To: u-boot@lists.denx.de; Priyanka Jain
>Cc: Y.b. Lu
>Subject: [v2] configs: lx2162aqds: enable eMMC HS400 mode support
>
>Enable eMMC HS400 mode support on LX2162AQDS.
>
>Signed-off-by: Yangbo Lu
>---
>-Original Message-
>From: Z.q. Hou
>Sent: Monday, October 26, 2020 9:28 AM
>To: u-boot@lists.denx.de; Priyanka Jain
>Cc: Wasim Khan ; Z.q. Hou
>Subject: [PATCH] pci: layerscape: fix a dead loop issue
>
>From: Hou Zhiqiang
>
>The commit 8ec619f8fd84 added the PCIe EP nodes fixup of
>-Original Message-
>From: Biwen Li
>Sent: Monday, October 26, 2020 12:44 PM
>To: Priyanka Jain
>Cc: Jiafei Pan ; u-boot@lists.denx.de; Biwen Li
>
>Subject: [PATCH] board/freescale/common: fix a bug that failed to read/write
>eeprom on ls1021atsn
>
>From: Biwen Li
>
>Fix a bug that
>-Original Message-
>From: Biwen Li
>Sent: Monday, October 26, 2020 2:23 PM
>To: Priyanka Jain
>Cc: Jiafei Pan ; u-boot@lists.denx.de; Biwen Li
>
>Subject: [v2] include/configs: ls1012aqds: add default environment variable
>
>From: Biwen Li
>
>This adds default environment variable for
>-Original Message-
>From: Priyanka Singh
>Sent: Tuesday, October 27, 2020 3:50 PM
>To: u-boot@lists.denx.de
>Cc: Priyanka Jain ; Priyanka Singh
>
>Subject: [PATCH 1/1] board: freescale: vid.c: Initialize variable 'i2caddress'
>
>Initialize variable 'i2caddress' in adjust_vdd() to zero
>
>-Original Message-
>From: Madalin Bucur
>Sent: Wednesday, November 4, 2020 6:39 PM
>To: s...@chromium.org; u-boot@lists.denx.de
>Cc: Priyanka Jain ; Shengzhou Liu
>; masahi...@kernel.org; Madalin Bucur (OSS)
>
>Subject: [PATCH 1/2] armv8: ls1043/ls1046aqds: add support for all RGMII
>-Original Message-
>From: Priyanka Singh
>Sent: Monday, November 2, 2020 11:39 AM
>To: u-boot@lists.denx.de
>Cc: Priyanka Jain ; Priyanka Singh
>
>Subject: [PATCH 1/1] layerscape: fdt.c: Check for NULL return value from
>fdt_getprop()
>
>Check for NULL return value from fdt_getprop() in
>-Original Message-
>From: Manish Tomar
>Sent: Thursday, November 5, 2020 2:09 PM
>To: u-boot@lists.denx.de
>Cc: Priyanka Jain ; Manish Tomar
>
>Subject: [PATCH 2/2] lx2160a: Fix address for secure boot headers
>
>Update kernel_size_sd variable with correct value for lx2160a.
>
>-Original Message-
>From: Biwen Li
>Sent: Thursday, November 5, 2020 4:58 PM
>To: Priyanka Jain ; Kuldeep Singh
>
>Cc: Jiafei Pan ; u-boot@lists.denx.de; Xiaobo Xie
>; Biwen Li
>Subject: [v3] net: pfe_eth: read PFE ESBC header flash with spi_flash_read
>API
>
>From: Biwen Li
>
>Read
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