From: Peng Fan
Enable CONFIG_DM_SERIAL. uart2 and its pinmux was already
marked with u-boot,dm-spl.
File generated with make savedefconfig
---
board/freescale/imx8mn_evk/spl.c | 12 ++--
configs/imx8mn_ddr4_evk_defconfig | 4 ++--
configs/imx8mn_evk_defconfig | 4 ++--
3 files
From: Peng Fan
Marked related nodes as u-boot,dm-spl for serial driver model
Enable CONFIG_DM_SERIAL
Signed-off-by: Peng Fan
---
arch/arm/dts/imx8mq-evk-u-boot.dtsi | 32 +
configs/imx8mq_evk_defconfig| 3 ++-
2 files changed, 34 insertions(+), 1
From: Peng Fan
Enable CONFIG_DM_SERIAL. uart2 and its pinmux was already
marked with u-boot,dm-spl.
File generated with make savedefconfig
---
board/freescale/imx8mp_evk/imx8mp_evk.c | 8
configs/imx8mp_evk_defconfig| 4 ++--
2 files changed, 2 insertions(+), 10
From: Peng Fan
Enable CONFIG_DM_SERIAL. uart2 and its pinmux was already
marked with u-boot,dm-spl.
File generated with make savedefconfig
---
board/freescale/imx8mm_evk/spl.c | 12 ++--
configs/imx8mm_evk_defconfig | 4 ++--
2 files changed, 4 insertions(+), 12 deletions(-)
diff
From: Peng Fan
V2:
Include imx8mq-evk in this patchset.
For i.MX8MN/M/P, drop board level uart pinmux settings,
move preloader_console_init after driver probe.
Tested on all four boards. Note i.MX8MQ-EVK not have SPL_DM, so pinmux for
uart still there for spl usage.
Peng Fan (4):
imx:
On Mon, Apr 11, 2022 at 09:10:47PM +0200, Heinrich Schuchardt wrote:
> A image_size parameter has been added to the bootefi parameter.
> Describe all parameters.
>
> Correct how the description of how the device-path in the loaded
> image protocol is determined.
>
> Signed-off-by: Heinrich
From: Peng Fan
Enable CONFIG_DM_SERIAL, and `dm tree` could show:
serial1 [ ] serial_mxc| |-- serial@30a8
Signed-off-by: Peng Fan
---
V2:
Per Fabio's comments, drop board uart pinmux setting.
Mark u-boot,dm-pre-reloc for dm serial
On Tue, Nov 09, 2021 at 03:21:43PM +0800, Rover Mo wrote:
> To prevent booting unsigned images, don't enable the non-secure boot
> commands(booti, bootz .etc) by default if secure boot enabled.
>
> Signed-off-by: Rover Mo
> Cc: Heinrich Schuchardt
> Cc: Simon Glass
> Reviewed-by: Heinrich
On Tue, Mar 29, 2022 at 06:06:07PM +0100, Pierre-Clément Tosi wrote:
> As the register is initialized to a constant value, it can be set at any
> point before the MMU has been enabled. Instead of waiting until the very
> last moment to do so, initialize it during early boot, when we
>
Hi Detlev,
I've recently tried to update U-Boot from 2022.01 to 2022.04 and
noticed a regression introduced by the commit below.
While the unwanted error message ("Add 'reserved-memory' node failed:
FDT_ERR_EXISTS") no longer appears, I now see a lengthy kernel stack
trace in Linux instead:
...
Hi!
I'm about to bump the U-Boot build for MediaTek MT7622 boards in
OpenWrt to U-Boot 2022.04. While practially everything seems to work
fine, I've noticed an error message early in the serial output which
was not present in U-Boot 2022.01. It is even followed by a bunch of
random characters
On Mon, 11 Apr 2022 at 23:15, Heinrich Schuchardt wrote:
>
> On 4/7/22 11:41, Andrew Scull wrote:
> > The sandbox doesn't populate the EFI lists so explicitly set the list
> > start and end symbols to indicate that the lists are empty. This
> > simplifies the linker scripts, removed references to
On 4/7/22 11:41, Andrew Scull wrote:
The sandbox doesn't populate the EFI lists so explicitly set the list
start and end symbols to indicate that the lists are empty. This
simplifies the linker scripts, removed references to non-existant
sections and removes '.' prefixed sections that conflicted
On Mon, Apr 11, 2022 at 03:46:04PM -0600, Simon Glass wrote:
> Hi Andrew,
>
> On Thu, 31 Mar 2022 at 04:29, Andrew Scull wrote:
> >
> > On Sun, 27 Mar 2022 at 21:27, Simon Glass wrote:
> > >
> > > LTO (Link-Time Optimisation) is an very useful feature which can
> > > significantly reduce the
On Mon, Apr 11, 2022 at 05:12:15PM -0400, Tom Rini wrote:
> We need to know where the typedef of 'ofnode' comes from.
>
> Fixes: c86a4de8df61 ("mtd: Add flash_node in struct mtd_info")
> Signed-off-by: Tom Rini
Applied to u-boot/master, thanks!
--
Tom
signature.asc
Description: PGP
Hi Andrew,
On Thu, 31 Mar 2022 at 04:29, Andrew Scull wrote:
>
> On Sun, 27 Mar 2022 at 21:27, Simon Glass wrote:
> >
> > LTO (Link-Time Optimisation) is an very useful feature which can
> > significantly reduce the size of U-Boot binaries. So far it has been
> > made available for selected ARM
Hey,
So here's a problem I have. Today if I'm in a branch that has a commit
that's not in it's upstream branch (so lets say I'm testing a bunch of
patches I grabbed from patchwork in a local branch that knows master is
the upstream) and I do:
export SOURCE_DATE_EPOCH=1649712313
We need to know where the typedef of 'ofnode' comes from.
Fixes: c86a4de8df61 ("mtd: Add flash_node in struct mtd_info")
Signed-off-by: Tom Rini
---
include/linux/mtd/mtd.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/include/linux/mtd/mtd.h b/include/linux/mtd/mtd.h
index
On Mon, Apr 11, 2022 at 2:11 PM Heinrich Schuchardt
wrote:
>
> A image_size parameter has been added to the bootefi parameter.
> Describe all parameters.
>
> Correct how the description of how the device-path in the loaded
> image protocol is determined.
>
> Signed-off-by: Heinrich Schuchardt
>
* Don't check argument of free(). Free does this itself.
* Reduce scope of data_buffer. Remove duplicate free().
* Avoid superfluous NULL assignment.
Signed-off-by: Heinrich Schuchardt
---
fs/squashfs/sqfs.c | 13 +
1 file changed, 5 insertions(+), 8 deletions(-)
diff --git
The power/bd71837.h should no longer be included, since V1.1 SoM
uses only the PCA9450 PMIC and the BD71837 support was removed.
Drop the header too.
Signed-off-by: Marek Vasut
Cc: Fabio Estevam
Cc: Marcel Ziswiler
Cc: Max Krummenacher
Cc: Peng Fan
Cc: Stefano Babic
---
Hi Stefan,
I think I can see the problem with this NSA310s board now. In the old
ad-hoc code to set RGMII delay (same for all Kirkwood boards), I
noticed the last thing was the jump back to page 0. Apparently it is
necessary to do that before doing a soft reset.
And I looked at the MV88E1116R
On Mon, Mar 28, 2022 at 09:13:43AM +, Ville Baillie wrote:
> Backport commit 1cb51a15b576 ("ubifs: Fix journal replay wrt. xattr
> nodes") from the Linux Kernel, which has the following Signed-off-by
> line:
> Signed-off-by: Richard Weinberger
>
> For U-Boot, after comapring with the
On Mon, Mar 28, 2022 at 03:49:08PM +0200, Hajo Noerenberg wrote:
> Add AHCI PCI bindings for Marvell 88SE6121/45 SATA controllers.
>
> The 88SE6121 controller is used, for example, in the Seagate Blackarmor
> NAS440 or the Iomega ix4-200d NAS.
>
> As Pali Rohár explained [1], these controllers
On Thu, Mar 24, 2022 at 11:26:11AM -0400, Sean Anderson wrote:
> Hardware-accelerated hash functions require that the input and output
> buffers be aligned to the minimum DMA alignment. memalign.h helpfully
> provides a macro just for this purpose. It doesn't exist on the host,
> but we don't
On Mon, Mar 21, 2022 at 09:13:37AM +0100, Patrice Chotard wrote:
> In case mtd_info's dev field is not populated (raw nand's case),
> use the flash_node new field which reference the DT flash node where
> can be found "partitions" node with "fixed-partitions" compatible.
>
> Signed-off-by:
On Tue, Mar 22, 2022 at 05:08:43PM +0100, Patrick Delaunay wrote:
> Since the commit bfaa51dd4adf ("cmd: add serial console support
> for the cls command") the cls command is not enough to clear the
> video display when ANSI console is activated.
>
> This patch clears the video device with the
On Mon, Mar 21, 2022 at 09:13:36AM +0100, Patrice Chotard wrote:
> Currently, add_mtd_partitions_of() can be used only if dev field of
> mtd_info struct is populated. It's the case, for example, for a spi nor
> flash, which has a DT compatible "jedec,spi-nor" and an associated
> device. mtd->dev
On Thu, Mar 17, 2022 at 10:29:47AM +0100, Paul HENRYS wrote:
> When probing the LEDs, a default brightness is set based on settings
> from the U-Boot device tree, i.e. the 'default-brightness' property
> of the LED nodes. If that property is not present, the default
> maximum brightness is set.
>
On Tue, Mar 15, 2022 at 04:34:51PM -0400, Jérôme Carretero wrote:
> This was implemented in order to get dual-slot bootloader
> partitions on the BeagleBone Black, whose MLO boots from
> the first bootable partition: MLO chainloads u-boot in the
> same way.
>
> Signed-off-by: Jérôme Carretero
>
On Tue, Mar 15, 2022 at 10:19:32AM -0700, Dhananjay Phadke wrote:
> Set digest_size SHA384 and SHA512 algorithms in pkcs7 and x509,
> (not set by ported linux code, but needed by __UBOOT__ part).
>
> EFI_CAPSULE_AUTHENTICATE doesn't select these algos but required for
> correctness if
On Sat, Mar 12, 2022 at 01:03:14PM +0300, Ivan Vozvakhov wrote:
> Add a driver which allows to use of LEDs connected
> to PWM (Linux compatible).
> MAINTAINERS: add i.vozvakhov as a maintainer of leds-pwm
> C(required during new functionality adding).
>
> Signed-off-by: Ivan Vozvakhov
Applied
On Wed, Mar 09, 2022 at 01:27:17AM -0800, SESA644425 wrote:
> Modify function to support any salt length instead of max
> length only. Function now detects salt length by parsing
> the content of db buffer. Note that it works with (but is
> not limited to) zero-length, digest-length and
On Wed, Mar 09, 2022 at 01:27:16AM -0800, SESA644425 wrote:
> Prior to introduction of modifications in rsassa_pss functions
> related to padding verification, doing a pass to reduce memory
> consumption of function by replacing memory copies of parts of
> const buffer by pointers to the original
On Wed, Mar 09, 2022 at 01:27:15AM -0800, SESA644425 wrote:
> Prior to introduction of modifications in rsassa_pss functions
> related to padding verification, doing a pass to update
> const-correctness in targeted functions to comply with
> coding-rules and avoid const-cast
>
> Signed-off-by:
On Mon, Mar 07, 2022 at 02:55:51PM +0530, Vignesh Raghavendra wrote:
> MCU Timer0 runs at 250MHz, and the clock-frequency defined in DT appears
> incorrect.
>
> Without this delays in R5 SPL are 10x off.
>
> Signed-off-by: Vignesh Raghavendra
Applied to u-boot/master, thanks!
--
Tom
On 4/11/22 21:47, Marek Vasut wrote:
On 4/11/22 21:24, Stefano Babic wrote:
Hi Marek,
Hi,
On 11.04.22 21:11, Marek Vasut wrote:
On 4/11/22 21:06, Stefano Babic wrote:
Hi Tim,
Hi,
On 11.04.22 20:51, Tim Harvey wrote:
On Mon, Apr 11, 2022 at 11:33 AM Stefano Babic wrote:
Hi Marek,
On 4/11/22 21:24, Stefano Babic wrote:
Hi Marek,
Hi,
On 11.04.22 21:11, Marek Vasut wrote:
On 4/11/22 21:06, Stefano Babic wrote:
Hi Tim,
Hi,
On 11.04.22 20:51, Tim Harvey wrote:
On Mon, Apr 11, 2022 at 11:33 AM Stefano Babic wrote:
Hi Marek,
after bisecting, rather this breaks
The i.MX8MP glue needs to be configured based on a couple of DT
properties, implement .glue_configure callback to parse those DT
properties and configure the glue accordingly.
Tested-By: Tim Harvey #imx8mp-venice-gw74xx
Signed-off-by: Marek Vasut
Cc: Angus Ainslie
Cc: Bin Meng
Cc: Fabio
Rename the select_dr_mode callback to glue_configure, the callback is
used for more than enforcing controller mode even on the TI chips, so
change the name to a more generic one. No functional change.
Tested-By: Tim Harvey #imx8mp-venice-gw74xx
Signed-off-by: Marek Vasut
Cc: Angus Ainslie
Cc:
Add DT bindings for a subset of GPCv2 which handles USB and PCIe PDs,
HSIOMIX PD controller and missing USB PD properties. This is required
to bring up the DWC3 USB controller up.
This is based on linux next and patches which are still pending
review, but which are likely going to be part of
Add initial support for i.MX8MP USB PHY, i.MX8MP USB is similar to
the i.MX8MQ, except for clock and power domain design customization.
Tested-By: Tim Harvey #imx8mp-venice-gw74xx
Signed-off-by: Marek Vasut
Cc: Fabio Estevam
Cc: Peng Fan
Cc: Stefano Babic
---
V2: Add TB from Tim
---
Add trivial driver for i.MX8MP HSIOMIX handling. This is responsible
for enabling the GPCv2 power domains and clock for USB 3.0 and PCIe
in the correct order. Currently supported is the USB 3.0 part which
can be tested, PCIe support should be easy to add.
Tested-By: Tim Harvey
Add clock tables required to bring up DWC3 USB, USB PHY and HSIOMIX domain.
Reviewed-by: Peng Fan
Tested-By: Tim Harvey #imx8mp-venice-gw74xx
Signed-off-by: Marek Vasut
Cc: Fabio Estevam
Cc: Peng Fan
Cc: Stefano Babic
Cc: Ye Li
---
V2: - Get and probe 24m clock without registering it again
Add i.MX8MP power domain handling into the driver. This is based on the
Linux GPCv2 driver state which is soon to be in Linux next.
Tested-By: Tim Harvey #imx8mp-venice-gw74xx
Signed-off-by: Marek Vasut
Cc: Fabio Estevam
Cc: Peng Fan
Cc: Stefano Babic
---
V2: Add TB by Tim
---
The arch/arm/include/asm/arch-imx8m/power-domain.h is not included
anywhere except in drivers/power/domain/imx8m-power-domain.c, just
inline the content and drop the header. No functional change.
Tested-By: Tim Harvey #imx8mp-venice-defconfig
Signed-off-by: Marek Vasut
Cc: Fabio Estevam
Cc:
Implement power_domain_get_by_name() convenience function which parses
DT property 'power-domain-names' and looks up power domain by matching
name.
Signed-off-by: Marek Vasut
Cc: Patrick Delaunay
Cc: Simon Glass
---
drivers/power/domain/power-domain-uclass.c | 14 ++
This driver is the only SMCCC dependency in iMX8M U-Boot port. Rework
the driver based on Linux GPCv2 driver to directly control the GPCv2
block instead of using SMCCC calls. This way, U-Boot can operate the
i.MX8M power domains without depending on anything else.
This is losely based on Linux
In case the power domain node structure is gpc@303a/pgc/power-domain@N,
do not bind power domain driver to the 'pgc' node, but rather descend into
it and only bind power domain drivers to power-domain@N subnodes. This way
we do not waste one useless driver instance associated with 'pgc' node.
Add flexspi DT node matching Linux kernel as of commit
d7cd74466651e ("arm64: dts: imx8mp: Reorder flexspi clock-names entry")
Reviewed-by: Peng Fan
Signed-off-by: Marek Vasut
Cc: Fabio Estevam
Cc: Peng Fan
Cc: Stefano Babic
---
V2: Add RB by Peng
---
arch/arm/dts/imx8mp.dtsi | 15
Add PCA9450 regulator driver. This is complementary driver for the BUCKn
and LDOn regulators provided by the PCA9450 PMIC driver. Currently the
driver permits reading the settngs and configuring the BUCKn and LDOn
regulators.
Reviewed-by: Fabio Estevam
Signed-off-by: Marek Vasut
Cc: Fabio
This is the only place where i.MX8M code does SMCCC call, remove it.
The output has little value as it prints some part of commit ID, and
worse, if there is no SMC handler installed, the code outright hangs
or crashes the system.
By removing this one instance of SMCCC call, U-Boot no longer
In case the ops is not implemented, return 0 in the core right away.
This is better than having multiple copies of functions which just
return 0 in each power domain driver. Drop all those empty functions.
Signed-off-by: Marek Vasut
Cc: Patrick Delaunay
Cc: Simon Glass
---
Decode ECSPI boot device in env_get_location() from i.MX8M ROMAPI tables.
This is necessary to correctly identify env is in SPI NOR when the system
boots from SPI NOR attached to ECSPI.
Reviewed-by: Fabio Estevam
Signed-off-by: Marek Vasut
Cc: Fabio Estevam
Cc: Peng Fan
Cc: Stefano Babic
---
The upstream DT regulators node subnodes are named BUCKn and LDOn,
the downstream DT regulators node subnodes are named buckn and ldon,
add the upstream match.
Reviewed-by: Fabio Estevam
Signed-off-by: Marek Vasut
Cc: Fabio Estevam
Cc: Peng Fan
Cc: Stefano Babic
---
V2: Add RB by Fabio
---
The i.MX8M Mini and i.MX8M Plus flexspi IPs are compatible with one
another, however the linux kernel DT uses separate compatible string
for each SoC. Add the missing i.MX8MP compatible into this driver.
Reviewed-by: Peng Fan
Signed-off-by: Marek Vasut
Cc: Fabio Estevam
Cc: Peng Fan
Cc:
Add DT compatible string for PCA9450C PMIC. This is a variant of the
PCA9450 PMIC with 6 A dual-phase buck regulator and 3 A buck regulator,
and is software-wise compatible with the PCA9450B. This variant of the
PCA9450 is designed for use as companion PMIC for i.MX8MP.
Reviewed-by: Fabio Estevam
Add entry for 3732 MT/s mode of operation of the LPDDR4, in
which case the DDR PLL has to be configured in 933 MHz mode.
Reviewed-by: Fabio Estevam
Signed-off-by: Marek Vasut
Cc: Fabio Estevam
Cc: Peng Fan
Cc: Stefano Babic
---
V2: Add RB by Fabio
---
drivers/ddr/imx/imx8m/ddrphy_utils.c |
Add settings for operating PLL at 933 MHz. This setting is useful in
case the LPDDR4 DRAM should operate at 1866 MHz or 3733 MT/s.
Reviewed-by: Fabio Estevam
Signed-off-by: Marek Vasut
Cc: Fabio Estevam
Cc: Peng Fan
Cc: Stefano Babic
---
V2: Add RB by Fabio
---
The correct compatible string for i.MX8MP variant of DWC EQoS MAC
is "nxp,imx8mp-dwmac-eqos", use it. Drop the two current users of
the current wrong compatible string to avoid breaking them.
Reviewed-by: Fabio Estevam
Tested-by: Marcel Ziswiler
Reviewed-by: Ramon Fried
Signed-off-by: Marek
Add compatible string for i.MX8MP, which permits i.MX8MP to use
HS400ES mode, just like all the other i.MX8M.
Reviewed-by: Peng Fan
Signed-off-by: Marek Vasut
Cc: Fabio Estevam
Cc: Haibo Chen
Cc: Peng Fan
Cc: Stefano Babic
---
V2: Add RB from Peng
---
drivers/mmc/fsl_esdhc_imx.c | 1 +
1
On Tue, Apr 12, 2022 at 12:35:42AM +0530, Pratyush Yadav wrote:
> On 08/04/22 10:47AM, Tom Rini wrote:
> > On Thu, Mar 31, 2022 at 03:35:26PM -0400, Tom Rini wrote:
> >
> > > This is a little tricky since SoCFPGA has code to determine this as
> > > runtime. Introduce a guard variable for
Hi Marek,
On 11.04.22 21:11, Marek Vasut wrote:
On 4/11/22 21:06, Stefano Babic wrote:
Hi Tim,
Hi,
On 11.04.22 20:51, Tim Harvey wrote:
On Mon, Apr 11, 2022 at 11:33 AM Stefano Babic wrote:
Hi Marek,
after bisecting, rather this breaks some boards like imx8mm_beacon (it
is not the
From: Marek Behún
Change type of private struct member mdio_base from void * to
phys_addr_t. This allows us to drop 2 casts.
Signed-off-by: Marek Behún
---
drivers/net/ti/keystone_net.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/net/ti/keystone_net.c
From: Marek Behún
Convert fdt parsing functions to ofnode parsing functions.
Signed-off-by: Marek Behún
---
drivers/net/ti/keystone_net.c | 113 +++---
1 file changed, 48 insertions(+), 65 deletions(-)
diff --git a/drivers/net/ti/keystone_net.c
From: Marek Behún
Deduplicate common code in ks2_eth_bind_slaves().
Signed-off-by: Marek Behún
---
drivers/net/ti/keystone_net.c | 75 ---
1 file changed, 34 insertions(+), 41 deletions(-)
diff --git a/drivers/net/ti/keystone_net.c
From: Marek Behún
Hello Ramon,
here comes a tiny batch of changes for keystone_net.
Applicable on top of net/next.
Marek
Marek Behún (3):
driver: net: ti: keystone_net: Deduplicate code
driver: net: ti: keystone_net: Convert to ofnode functions
driver: net: ti: keystone_net: Change priv
On Mon, Apr 11, 2022 at 1:14 PM Heinrich Schuchardt wrote:
>
> On 4/10/22 23:05, kev...@freebsd.org wrote:
> > From: Kyle Evans
> >
> > Up until commit 5f59518a7b1ae ("efi_loader: setting boot device"), we
> > could boot an arbitrary blob with bootefi. Indeed, efi_run_image() even
> > has a
On 4/11/22 21:06, Stefano Babic wrote:
Hi Tim,
Hi,
On 11.04.22 20:51, Tim Harvey wrote:
On Mon, Apr 11, 2022 at 11:33 AM Stefano Babic wrote:
Hi Marek,
after bisecting, rather this breaks some boards like imx8mm_beacon (it
is not the only one):
+In file included from
A image_size parameter has been added to the bootefi parameter.
Describe all parameters.
Correct how the description of how the device-path in the loaded
image protocol is determined.
Signed-off-by: Heinrich Schuchardt
---
doc/usage/cmd/bootefi.rst | 19 ---
1 file changed, 16
Hi Tim,
On 11.04.22 20:51, Tim Harvey wrote:
On Mon, Apr 11, 2022 at 11:33 AM Stefano Babic wrote:
Hi Marek,
after bisecting, rather this breaks some boards like imx8mm_beacon (it
is not the only one):
+In file included from arch/arm/dts/.imx8mp-evk.dtb.pre.tmp:8:
On 08/04/22 10:47AM, Tom Rini wrote:
> On Thu, Mar 31, 2022 at 03:35:26PM -0400, Tom Rini wrote:
>
> > This is a little tricky since SoCFPGA has code to determine this as
> > runtime. Introduce a guard variable for platforms to select if they
> > have a static value to use. Then for
On Tue, Apr 5, 2022 at 4:11 PM Laurent Pinchart
wrote:
>
> Hi Ramon,
>
> On Sun, Apr 03, 2022 at 02:17:26AM +0300, Ramon Fried wrote:
> > On Thu, Mar 31, 2022 at 8:43 AM Ramon Fried wrote:
> > > On Tue, Mar 29, 2022 at 11:28 PM Laurent Pinchart wrote:
> > > >
> > > > Hello,
> > > >
> > > > I've
On Mon, Apr 11, 2022 at 11:33 AM Stefano Babic wrote:
>
> Hi Marek,
>
> after bisecting, rather this breaks some boards like imx8mm_beacon (it
> is not the only one):
>
> +In file included from arch/arm/dts/.imx8mp-evk.dtb.pre.tmp:8:
>
> +arch/arm/dts/imx8mp.dtsi:7:10: fatal error:
>
Add support for Data Modul i.MX8M Mini eDM SBC board. This is an
evaluation board for various custom display units. Currently
supported are serial console, ethernet, eMMC, SD, SPI NOR,
USB host and USB OTG.
Reviewed-by: Fabio Estevam
Signed-off-by: Marek Vasut
Cc: Fabio Estevam
Cc: Peng Fan
Hi Gaurav,
I get breakage for some Layerscape boards after applying your V11 series:
aarch64: + ls1043ardb_sdcard_SECURE_BOOT
+= WARNING ==
+This board does not use CONFIG_DM_SERIAL (Driver Model
+for Serial drivers). Please update the board to
Hi Andrew,
On Thu, 7 Apr 2022 at 03:41, Andrew Scull wrote:
>
> This is a hugely ugly hack to poison and unpoison memory allocated by
> dlmalloc. It wraps every access dlmalloc makes to the metadata breifly
> allow it access, taking care not to then poison the parts of the record
> which
On Thu, 31 Mar 2022 at 04:10, Andrew Scull wrote:
>
> The virtio ring is the basis of virtio communication. Test its basic
> functionality and its resilience against corruption from the device.
>
> Signed-off-by: Andrew Scull
> ---
> test/dm/virtio.c | 72
On Thu, 7 Apr 2022 at 03:41, Andrew Scull wrote:
>
> Add an implementation of LLVMFuzzerTestOneInput() that starts the
> sandbox on a secondary thread and exposes a function to synchronize the
> generation of fuzzing inputs with their consumption by the sandbox.
>
> Signed-off-by: Andrew Scull
>
Hi Andrew,
On Thu, 7 Apr 2022 at 03:41, Andrew Scull wrote:
>
> Add a fuzzing engine driver for the sandbox to take inputs from
> libfuzzer and expose them to the fuzz tests.
>
> Signed-off-by: Andrew Scull
> ---
> arch/Kconfig | 2 ++
>
On Sun, 3 Apr 2022 at 04:39, Andrew Scull wrote:
>
> When do_acpi_dump() converts the table name to upper case, pass the
> actual size of the output buffer so that the null terminator doesn't get
> written beyond the end of the buffer.
>
> Signed-off-by: Andrew Scull
> Cc: Simon Glass
> Cc:
On Thu, 7 Apr 2022 at 03:41, Andrew Scull wrote:
>
> Add the basic infrastructure for declaring fuzz tests and a command to
> invoke them.
>
> Signed-off-by: Andrew Scull
> ---
> Kconfig | 8 +
> include/test/fuzz.h | 51 +++
> test/Makefile|
On Sun, 3 Apr 2022 at 04:39, Andrew Scull wrote:
>
> Use-after-free shouldn't be used, even in tests. It's bad practice and
> makes the test brittle.
>
> Signed-off-by: Andrew Scull
> Cc: Simon Glass
> ---
> test/dm/devres.c | 5 +
> 1 file changed, 1 insertion(+), 4 deletions(-)
On Sun, 3 Apr 2022 at 04:39, Andrew Scull wrote:
>
> Data is written for each channel but is only tracked as having one
> channel written. This resulted in a buffer overflow and corruption of
> the allocator's metadata which caused further problems when the buffer
> was later freed. This could be
On Sun, 3 Apr 2022 at 04:39, Andrew Scull wrote:
>
> This tests calls regmap_read() which takes a uint pointer as an output
> parameter. The test was passing a pointer to a u16 which resulted in an
> overflow when the output was written. Fix this by following the
> regmap_read() API and passing a
On Thu, 7 Apr 2022 at 01:03, Heinrich Schuchardt wrote:
>
> On 3/31/22 12:09, Andrew Scull wrote:
> > The variables `total_sg` and `descs_used` have the same value. Replace
> > the few uses of `total_sg` with `descs_used` to simplify the situation.
> >
> > Signed-off-by: Andrew Scull
>
>
On Sun, 3 Apr 2022 at 04:39, Andrew Scull wrote:
>
> The '--args' parameter to gdb comes before the binary that the debugger
> will be attached to rather than after the binary and before the
> arguments. Fix that in the docs.
>
> Signed-off-by: Andrew Scull
> Cc: Simon Glass
> ---
>
On Thu, 7 Apr 2022 at 03:41, Andrew Scull wrote:
>
> Rename the sections used to implement linker lists so they begin with
> '__u_boot_list' rather than '.u_boot_list'. The double underscore at the
> start is still distinct from the single underscore used by the symbol
> names.
>
> Having a '.'
On Fri, 1 Apr 2022 at 06:44, Paweł Anikiel wrote:
>
> This driver is a child of the rstmgr driver, both of which share the
> same devicetree node. As a result, passing the child's udevice pointer
> to dev_read_addr_ptr results in a failure of reading the #address-cells
> property. Use the parent
On Thu, 31 Mar 2022 at 04:10, Andrew Scull wrote:
>
> When the device returns used buffers, it should refer to the descriptor
> that is the head of the descriptor chain for that buffer. Confirm this
> to be the case by tracking the head of descriptor chains that have been
> made available to the
On Fri, 1 Apr 2022 at 06:44, Paweł Anikiel wrote:
>
> For some reason, on the Mercury+ AA1 module, calling
> fpgamgr_wait_early_user_mode immediately after writing the peripheral
> bitstream leaves the fpga in a broken state (ddr calibration hangs).
> Adding a delay before the first sync word is
On Sun, 3 Apr 2022 at 04:39, Andrew Scull wrote:
>
> There are expecte to be bars 0 through 5, but the last of these was
> missing leading to an read beyond the buffer. Add the missing element
> with zero values.
>
> Signed-off-by: Andrew Scull
> Cc: Simon Glass
> Cc: Bin Meng
> ---
>
On Thu, 31 Mar 2022 at 04:10, Andrew Scull wrote:
>
> Once the virtio-rng driver has been bound, probe it to trigger the pre
> and post child probe hooks of the virtio uclass driver. Check the status
> of the virtio device to confirm it reached the expected state.
>
> Signed-off-by: Andrew Scull
On Thu, 31 Mar 2022 at 04:10, Andrew Scull wrote:
>
> The virtqueue is passed to virtio_notify() so move the virtqueue
> deletion to the end of the test when it's no longer needed. This wasn't
> causing any problems because the sandbox virtio transport driver doesn't
> do anything for
On Thu, 31 Mar 2022 at 04:10, Andrew Scull wrote:
>
> The virtio sandbox transport was setting the device features value to
> the bit index rather than shifting a bit to the right index. Fix this
> using the bit manipulation macros.
>
> Signed-off-by: Andrew Scull
> ---
>
Hi Andrew,
On Thu, 7 Apr 2022 at 04:16, Andrew Scull wrote:
>
> On Thu, 7 Apr 2022 at 08:20, Heinrich Schuchardt wrote:
> >
> > On 3/31/22 12:09, Andrew Scull wrote:
> > > The virtio-rng driver is extremely simple, making it suitable for
> > > testing more of the virtio uclass logic. Have the
On Fri, 1 Apr 2022 at 06:44, Paweł Anikiel wrote:
>
> Before relocating to SDRAM, the ECC is initialized by clearing the
> whole SDRAM. In order to speed this up, dcache_enable is used (see
> sdram_init_ecc_bits).
>
> Since commit 503eea451903 ("arm: cp15: update DACR value to activate
> access
Hi Andrew,
On Thu, 7 Apr 2022 at 03:41, Andrew Scull wrote:
>
> Add a fuzzer to test the vring handling code against unexpected
> mutations from the virtio device.
>
> After building the sandbox with CONFIG_FUZZ=y, the fuzzer can be invoked
> with by:
>
>UBOOT_SB_FUZZ_TEST=fuzz_vring
On Thu, 31 Mar 2022 at 04:10, Andrew Scull wrote:
>
> Check the length of data written by the device is consistent with the
> size of the buffers to avoid out-of-bounds memory accesses in case
> values aren't consistent.
>
> Signed-off-by: Andrew Scull
> Cc: Sughosh Ganu
> ---
>
On Thu, 7 Apr 2022 at 03:41, Andrew Scull wrote:
>
> Move the program's entry point to os.c, in preparation for a separate
> fuzzing entry point to be added.
>
> Signed-off-by: Andrew Scull
> ---
> arch/sandbox/cpu/os.c | 6 ++
> arch/sandbox/cpu/start.c| 2 +-
>
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