On Thu, Sep 15, 2022 at 9:54 PM Pali Rohár wrote:
>
> Signed-off-by: Pali Rohár
> ---
> cmd/pci.c | 1 -
> 1 file changed, 1 deletion(-)
>
Reviewed-by: Bin Meng
() hi Takahiro,
On Fri, 16 Sept 2022 at 07:17, Takahiro Akashi
wrote:
>
> Hi Sughosh,
>
> On Thu, Sep 15, 2022 at 01:44:46PM +0530, Sughosh Ganu wrote:
> > The FWU Multi Bank Update feature supports updation of firmware images
> > to one of multiple sets(also called banks) of images. The
Marvell's proprietary TIM (trusted image) is used on the Armada-3700 and
AlledCat5/5X (and possibly others). It has a whole host of features that
work to implement a version of secure boot.
Kwboot's interest in this format is simply to detect that the image is
one of these and not attempt to
Add support for the Allecat5/Alleycat5X SoC. These are L3 switches with
an integrated CPU (referred to as the CnM block in Marvell's
documentation). These have dual ARMv8.2 CPUs (Cortex-A55). This support
has been ported from Marvell's SDK which is based on a much older
version of U-Boot.
The RD-AC5X-32G16HVG6HLG-A0 development board main components and features
include:
* Main 12V/54V power supply
* 270 Gbps throughput packet processor on the main board
* DDR4:
* SR1: 2GB DDR4 2400MT/S(1GB x 2 pcs ) with ECC(1GB x 1 pcs)
* SR2: 4GB DDR4 2400MT/S(2GB x 2 pcs ) with ECC(2GB x 1
Add a new UCLASS_SAR, the generic SAR code and an Alleycat5 driver. This
has been adapted from the Marvell SDK but only the AC5 driver has been
brought through (other drivers exist for the ap806, ap807 and cp110 IP
blocks).
Signed-off-by: Chris Packham
---
drivers/misc/Kconfig|
This uses the same IP block as the Armada-8K SoCs.
Signed-off-by: Chris Packham
---
drivers/pinctrl/mvebu/Kconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/pinctrl/mvebu/Kconfig b/drivers/pinctrl/mvebu/Kconfig
index 574fb4dfb0..7c51d138c8 100644
---
Unlike the other 64-bit mvebu SoCs the AlleyCat5 uses the older ehci
block from the 32-bit SoCs. Adapt the ehci-marvell.c driver to cope with
the fact that the ac5 does not have the mbus infrastructure the 32-bit
SoCs have and ensure USB_EHCI_IS_TDI is selected.
Signed-off-by: Chris Packham
---
Add support for the AlleyCat5 SoC. This lacks the mbus from the other
users of the mvneta.c driver so a new compatible string is needed to
allow for a different window configuration.
Signed-off-by: Chris Packham
---
drivers/net/Kconfig | 2 +-
drivers/net/mvneta.c | 66
This patchset enhaces the recently added Orion Timer driver to support
all other Kirkwood & 32bit MVEBU Armada platforms. Additionally, this
timer support is then enabled per default for those platforms, so that
the board config files don't need to be changed. Also necessary is
some dts hacking,
Hi Sughosh,
On Thu, Sep 15, 2022 at 01:44:46PM +0530, Sughosh Ganu wrote:
> The FWU Multi Bank Update feature supports updation of firmware images
> to one of multiple sets(also called banks) of images. The firmware
> images are clubbed together in banks, with the system booting images
> from the
Hi Heinrich,
On Thu, 15 Sept 2022 at 14:02, Heinrich Schuchardt
wrote:
>
> Currently block devices are only identified by uclass_id and device number.
> When dealing with removable media this is not enough to uniquely identify
> the medium.
>
> E.g. after host unbind, host bind we can have the
Hi Tom,
On Thu, 15 Sept 2022 at 12:32, Tom Rini wrote:
>
> On Wed, Sep 14, 2022 at 04:39:18PM -0600, Simon Glass wrote:
> > Hi Tom,
> >
> > On Wed, 14 Sept 2022 at 12:47, Tom Rini wrote:
> > >
> > > On Mon, Aug 29, 2022 at 07:57:04AM -0600, Simon Glass wrote:
> > > > The existing shell script
On Wed, 14 Sept 2022 at 12:57, Steven Lawrance
wrote:
>
> Setting an alternative signature info node in "pre_load_sig_info_path"
> allows verification of an image using the bootm pre-load mechanism with
> a different key, e.g.: setenv pre_load_sig_info_path "/alt/sig" ; bootm
> preload [addr]
>
>
On Wed, 14 Sept 2022 at 15:00, Fabio Estevam wrote:
>
> From: Fabio Estevam
>
> There is an extra "most" word in the SPL_DM_USB text that
> makes it confusing.
>
> Remove it.
>
> Signed-off-by: Fabio Estevam
> ---
> drivers/usb/Kconfig | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
On Wed, 14 Sept 2022 at 12:58, Steven Lawrance
wrote:
>
> Putting these definitions in a header will allow signatures to be
> validated independently of bootm.
>
> Signed-off-by: Steven Lawrance
> ---
> boot/image-pre-load.c | 43 ---
> include/image.h
On Thu, Sep 15, 2022 at 10:02:40PM +0200, Heinrich Schuchardt wrote:
> The medium a device like 'mmc 0' or 'usb 0' points to may change over
> time. Hence device type and number are not sufficient to identify the
> inserted medium. The same is true for the device path generated for
> such a
On Thu, Sep 15, 2022 at 08:59:48PM +0200, Pali Rohár wrote:
> Compile U-Boot with UBI/UBIFS support according to doc/board/nokia/rx51.rst
> instructions and add test case for loading kernel image from UBI volume.
>
> Signed-off-by: Pali Rohár
Applied to u-boot/next, thanks!
--
Tom
On Sun, Sep 04, 2022 at 03:29:05AM +0200, Pali Rohár wrote:
> Signed-off-by: Pali Rohár
Applied to u-boot/next, thanks!
--
Tom
signature.asc
Description: PGP signature
On Sun, Sep 04, 2022 at 03:29:04AM +0200, Pali Rohár wrote:
> U-Boot ignores ARCH= variable.
>
> Signed-off-by: Pali Rohár
Applied to u-boot/next, thanks!
--
Tom
signature.asc
Description: PGP signature
On Sun, Sep 04, 2022 at 03:29:03AM +0200, Pali Rohár wrote:
> Disable UBI fastmap support which is not supported by original Maemo 5
> kernel and explicitly set UBI BEB limit to 10%, which is the value used by
> original Maemo 5 kernel. U-Boot default value is 20%.
>
> Signed-off-by: Pali Rohár
On Sun, Sep 04, 2022 at 03:29:02AM +0200, Pali Rohár wrote:
> When reading of image fails then do not call bootm. This prevents false
> positive test result in case something bootable is present in memory.
>
> Signed-off-by: Pali Rohár
Applied to u-boot/next, thanks!
--
Tom
signature.asc
On Sun, Sep 04, 2022 at 03:29:01AM +0200, Pali Rohár wrote:
> Original Nokia UBIFS system image has 1870 LEBs, so set UBIFS volume size
> in test script to the same value. Number of 1870 LEBs corresponds to 230MiB
> (LEB size * num of LEBs = 126KiB * 1870 = 230MiB).
>
> Signed-off-by: Pali Rohár
On Sun, Sep 04, 2022 at 03:29:00AM +0200, Pali Rohár wrote:
> At address 0x8100 are stored initial atags passed to U-Boot by NOLO.
> So do not overwrite them when using $loadaddr variable which value is set
> from CONFIG_SYS_LOAD_ADDR option.
>
> Signed-off-by: Pali Rohár
Applied to
On Sun, Sep 04, 2022 at 03:28:59AM +0200, Pali Rohár wrote:
> If kernel image in uImage or zImage format is not detected by
> lowlevel_init.S code then do not clear memory location where image was
> expected. If image is not detected then this memory region is unknown.
> So do not unconditionally
On Sun, Sep 04, 2022 at 03:28:58AM +0200, Pali Rohár wrote:
> Label copy_kernel_start is now unused. Remove it.
>
> Signed-off-by: Pali Rohár
Applied to u-boot/next, thanks!
--
Tom
signature.asc
Description: PGP signature
On Tue, Aug 30, 2022 at 03:54:30PM +0530, Jayesh Choudhary wrote:
> Add j721s2 High Security EVM defconfig.
>
> These configs are same as for the non-secure part, except for:
> CONFIG_TI_SECURE_DEVICE option set to 'y'
> CONFIG_FIT_IMAGE_POST_PROCESS option set to 'y'
>
On Tue, Aug 30, 2022 at 03:54:29PM +0530, Jayesh Choudhary wrote:
> From: Andrew Davis
>
> Add J7200 High Security EVM defconfig.
>
> These defconfigs are the same as for the non-secure part, except for:
> CONFIG_TI_SECURE_DEVICE option set to 'y'
> CONFIG_BOOTCOMMAND uses FIT images
On Thu, Aug 25, 2022 at 08:54:04AM +0200, Bernhard Messerklinger wrote:
> * Drop legacy /boot/PPTImage.md5 check
> * Update device tree naming
> * Update t30args#0 root cmd line property to support latest kernel
> versions (root=/dev/mmcblk0p2 for linux < 4 and
> root=/dev/mmcblk1p2 for linux
On Thu, Aug 25, 2022 at 08:54:03AM +0200, Bernhard Messerklinger wrote:
> Commit 0ea4fc4dcf90 ("board/BuR: invalidate ${dtbaddr} before cfgscr")
> destroys the boot targets b_t30lgcy#0 and b_t30lgcy#1. The reason behind
> this is, that b_t30lgcy#0 and b_t30lgcy#1 both load the for booting
>
On Thu, Aug 25, 2022 at 08:54:02AM +0200, Bernhard Messerklinger wrote:
> * Remove unnecessary device tree nodes which are not needed in
> U-Boot directly.
> * Move all U-Boot specific device tree properties to u-boot dtsi.
>
> Signed-off-by: Bernhard Messerklinger
>
> Reviewed-by: Wolfgang
On Thu, Aug 25, 2022 at 08:54:01AM +0200, Bernhard Messerklinger wrote:
> Commit 6337d53fdf45 ("arm: dts: sync am33xx with Linux 5.9-rc7") syncs
> the am335x device tree with the latest linux kernel am335x device tree.
> That causes problems with device tree in SPL stage.
> To fix the issues
On Thu, Aug 25, 2022 at 08:54:00AM +0200, Bernhard Messerklinger wrote:
> The SPI and NAND board variants never went into production.
> Drop those board variants.
>
> Signed-off-by: Bernhard Messerklinger
>
> Reviewed-by: Wolfgang Wallner
Applied to u-boot/next, thanks!
--
Tom
From: Rafał Miłecki
DT binding allows specifying NVMEM cells as NVMEM device (provider)
subnodes. Looks for such subnodes when building NVMEM cells.
This allows NVMEM consumers to use U-Boot environment variables.
Signed-off-by: Rafał Miłecki
---
drivers/nvmem/u-boot-env.c | 1 +
1 file
Fill the media ID in the block IO protocol from the block device descriptor
of the driver model.
Signed-off-by: Heinrich Schuchardt
---
lib/efi_loader/efi_disk.c | 6 +-
1 file changed, 1 insertion(+), 5 deletions(-)
diff --git a/lib/efi_loader/efi_disk.c b/lib/efi_loader/efi_disk.c
index
Currently block devices are only identified by uclass_id and device number.
When dealing with removable media this is not enough to uniquely identify
the medium.
E.g. after host unbind, host bind we can have the same device number but a
different backing file.
The EFI specification uses a 32bit
The medium a device like 'mmc 0' or 'usb 0' points to may change over
time. Hence device type and number are not sufficient to identify the
inserted medium. The same is true for the device path generated for
such a device. This is why the EFI_BLOCK_IO_PROTOCOL provides a field
MediaId.
Whenever a
Compile U-Boot with UBI/UBIFS support according to doc/board/nokia/rx51.rst
instructions and add test case for loading kernel image from UBI volume.
Signed-off-by: Pali Rohár
---
Changes in v2:
* Fix issue that script fails at the first run
- File zImage-2.6.28-omap1 needs to be unpacked
On Thursday 15 September 2022 14:34:27 Tom Rini wrote:
> On Sun, Sep 04, 2022 at 03:29:06AM +0200, Pali Rohár wrote:
>
> > Compile U-Boot with UBI/UBIFS support according to doc/board/nokia/rx51.rst
> > instructions and add test case for loading kernel image from UBI volume.
> >
> >
On Sun, Sep 04, 2022 at 03:29:06AM +0200, Pali Rohár wrote:
> Compile U-Boot with UBI/UBIFS support according to doc/board/nokia/rx51.rst
> instructions and add test case for loading kernel image from UBI volume.
>
> Signed-off-by: Pali Rohár
This I believe leads to this failure:
On Wed, Sep 14, 2022 at 04:39:18PM -0600, Simon Glass wrote:
> Hi Tom,
>
> On Wed, 14 Sept 2022 at 12:47, Tom Rini wrote:
> >
> > On Mon, Aug 29, 2022 at 07:57:04AM -0600, Simon Glass wrote:
> > > The existing shell script is a bit ugly. It was picked up by
> > > Chromium OS and then rewritten
On Thu, Sep 15, 2022 at 05:37:58PM +0200, Patrick DELAUNAY wrote:
> Hi Tom,
>
> Please pull the STM32 related fixes for u-boot/master, v2022.10:
> u-boot-stm32-20220915
>
> - Fixes on STM32 I2C drivers
> - Activate SCMI regulator for STM32MP15 defconfig, fix the usb start
Unconditionally clearing DTO when RXDR is set leads to spurious timeouts
in FIFO mode transfers if events occur in the following order:
mask = dwmci_readl(host, DWMCI_RINTSTS);
// Hardware asserts DWMCI_INTMSK_DTO here
dwmci_writel(host, DWMCI_RINTSTS, DWMCI_INTMSK_DTO);
From: Quentin Schulz
CONFIG_SERIAL_TAG is not selectable for ARM64 machines. While
get_board_serial is weakly defined if ENV_VARS_UBOOT_RUNTIME_CONFIG is
defined, it is only called when CONFIG_SUPPORT_PASSING_ATAGS is defined,
which also is not selectable for ARM64 machines. Therefore this is
Change the mask of OTP0 used to close the device on STM32MP
- STM32MP15x: bit 6 of OPT0
- STM32MP13x: 0b11 = 0x3F for OTP_SECURED closed device
And support the 2 keys for STM32MP13x
- PKHTH : Hash of the 8 ECC Public Keys Hashes Table
(ECDSA is the authentication algorithm)
- EDMK :
Split the read_hash_otp function and introduce the helper function
read_close_status to read the close status in OTP separately of the PKH.
This patch is a preliminary step for STM32MP13 support.
Signed-off-by: Patrick Delaunay
---
arch/arm/mach-stm32mp/cmd_stm32key.c | 107
Update the command stm32key to support several keys selected by
key name and managed by the new sub-command:
stm32key list
stm32key select []
stm32key read -a
This patch doesn't change the STM32MP15 behavior, only PKH is
supported, but it is a preliminary patch for STM32MP13 support.
Add defines for value used in stm32key for BSEC permanent lock status
and error.
This patch is a preliminary step to support more lock status in BSEC
driver.
Signed-off-by: Patrick Delaunay
---
arch/arm/mach-stm32mp/cmd_stm32key.c | 15 +--
1 file changed, 9 insertions(+), 6
And support the 2 keys for STM32MP13x
- PKHTH : Hash of the 8 ECC Public Keys Hashes Table
(ECDSA is the authentication algorithm)
- EDMK : Encryption/Decryption Master Key
Only one key is supported for STM32MP15x
- PKH : Hash of the ECC Public Key
(ECDSA is the authentication
On 9/15/22 8:45 AM, Kautuk Consul wrote:
> [You don't often get email from kcon...@ventanamicro.com. Learn why this is
> important at https://aka.ms/LearnAboutSenderIdentification ]
>
> To use semihosting on qemu RISCV virt machine, we need the
> CONFIG_SPL_FS_LOAD_PAYLOAD_NAME define in
Hi Kautuk,
I've already noted my general remarks on this approach in response to
your cover letter. This just has my comments on the RISC-V-specific
parts.
On 9/15/22 8:45 AM, Kautuk Consul wrote:
> We add RISC-V semihosting based serial console for JTAG based early
> debugging.
>
> The RISC-V
Hello! Now I have tested this patch series on Turris Omnia - A385,
loaded via UART kwboot and seems that everything is working fine.
On Thursday 15 September 2022 16:20:35 Stefan Roese wrote:
> This patchset enhaces the recently added Orion Timer driver to support
> all other Kirkwood & 32bit
Hi Alain,
On 9/12/22 10:42, Alain Volmat wrote:
From: Jorge Ramirez-Ortiz
These two device tree properties were not being applied.
Fixes: 1fd9eb68d6 ("i2c: stm32f7: move driver data of each instance in a
privdata")
Signed-off-by: Jorge Ramirez-Ortiz
Reviewed-by: Alain Volmat
---
Hi Tom,
Please pull the STM32 related fixes for u-boot/master, v2022.10:
u-boot-stm32-20220915
- Fixes on STM32 I2C drivers
- Activate SCMI regulator for STM32MP15 defconfig, fix the usb start command
for scmi device tree
CI status:
https://source.denx.de/u-boot/custodians/u-boot-stm
Hi Alain,
On 9/12/22 10:42, Alain Volmat wrote:
Current function stm32_i2c_message_xfer is sending a STOP
whatever the result of the transaction is. This can cause issues
such as making the bus busy since the controller itself is already
sending automatically a STOP when a NACK is generated.
Hi Alain
On 9/12/22 10:42, Alain Volmat wrote:
Current function stm32_i2c_message_xfer is sending a STOP
whatever the result of the transaction is. This can cause issues
such as making the bus busy since the controller itself is already
sending automatically a STOP when a NACK is generated.
Hi Alain,
On 9/12/22 10:41, Alain Volmat wrote:
Functions stm32_i2c_message_start and stm32_i2c_handle_reload
both get a stop boolean indicating if the transfer should end with
a STOP or not. However no specific handling is needed in those
functions hence remove the parameter.
Signed-off-by:
Hi Kautuk,
On 9/15/22 8:45 AM, Kautuk Consul wrote:
> [You don't often get email from kcon...@ventanamicro.com. Learn why this is
> important at https://aka.ms/LearnAboutSenderIdentification ]
>
> Semihosting is a mechanism that enables code running on
> a target to communicate and use the
Hi Alain,
On 9/12/22 10:41, Alain Volmat wrote:
Comment within stm32_i2c_message_start is misleading, indicating
that AUTOEND bit is setted while it is actually cleared.
Moreover, the bit is actually never setted so there is no need
to clear it hence get rid of this bit clear and the bit macro
Hi,
On 8/15/22 16:52, Jorge Ramirez-Ortiz wrote:
Bits should be set to 0, not 1.
Signed-off-by: Jorge Ramirez-Ortiz
---
drivers/i2c/stm32f7_i2c.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/i2c/stm32f7_i2c.c b/drivers/i2c/stm32f7_i2c.c
index
Hi,
On 9/9/22 11:57, Patrice CHOTARD wrote:
Hi Patrick
Don't forget to fix the confis/configs when applying this patch ;-)
On 9/7/22 18:18, Patrick Delaunay wrote:
Activate the support of SCMI regulator to support the scmi_reg11,
scmi_reg18 and scmi_usb33 regulators present in the scmi
On Thu, Sep 15, 2022 at 6:15 PM Kautuk Consul wrote:
>
> We add RISC-V semihosting based serial console for JTAG based early
> debugging.
>
> The RISC-V semihosting specification is available at:
> https://github.com/riscv/riscv-semihosting-spec/blob/main/riscv-semihosting-spec.adoc
>
>
On 9/15/22 16:01, Jae Hyun Yoo wrote:
Gentle ping for this series.
On 8/25/2022 9:42 AM, Jae Hyun Yoo wrote:
Hello,
The FRU handling was added as a Xilinx board dependent support but it
is also useful for other boards, so this commit moves the FRU handling
support to the common region so
With the recent changes in the Orion timer driver Kconfig setup, the
board specific enabling is not needed any more. This patch sync's these
2 boards with their current defconfig version.
Signed-off-by: Stefan Roese
Cc: Michael Walle
Tested-by: Tony Dinh
---
v3:
- New patch
v2:
- New patch
Adding the "u-boot,dm-pre-reloc" DT property to the timer node is
necesssary to support the timer in the early boot phases (e.g.
SPL & pre-reloc).
Signed-off-by: Stefan Roese
Tested-by: Tony Dinh
---
v3:
- No change
v2:
- No change
arch/arm/dts/mvebu-u-boot.dtsi | 11 +++
1 file
Add the DT bindings / descriptions for timer0 & timer1, exactly as done
in mainline Linux.
Signed-off-by: Stefan Roese
Tested-by: Tony Dinh
---
v3:
- No change
v2:
- No change
arch/arm/dts/armada-375.dtsi | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git
This patch changes the compilation, so that the Armada 375 board(s) are
compiled in a separate step. This is necessary for the timer dts
conversion, as A375 has a different / timer description in the dts.
Signed-off-by: Stefan Roese
Tested-by: Tony Dinh
---
v3:
- No change
v2:
- No change
Now that the new timer support is available for these platforms, let's
select this IF for all these platforms. This way it's not necessary
that each board changes it's config header.
Signed-off-by: Stefan Roese
Tested-by: Tony Dinh
---
v3:
- No change
v2:
- No change
arch/arm/Kconfig
Add timer_get_boot_us() to support boards, that have CONFIG_BOOTSTAGE
enabled, like pogo_v4.
Signed-off-by: Stefan Roese
Tested-by: Tony Dinh
---
v3:
- Also support fixed input clock in early timer code
- Consolidate code for this
v2:
- Change timer_get_boot_us() to use the timer_early
This patch adds support for other Marvell Armada SoC's, supporting the
25MHz fixed clock operation, like the Armada XP etc.
Signed-off-by: Stefan Roese
Tested-by: Tony Dinh
---
v3:
- No change
v2:
- Use timer_conv_64() in timer_early_get_count()
drivers/timer/Kconfig | 5 -
While testing on some Kirkwood platforms it was noticed that the timer
did not function correctly all the time. The driver did not correctly
handle 32bit timer value wrap arounds. Using the timer_conv_64()
conversion function fixes this issue.
Fixes: e9e73d78a8fb ("timer: add orion-timer
This patchset enhaces the recently added Orion Timer driver to support
all other Kirkwood & 32bit MVEBU Armada platforms. Additionally, this
timer support is then enabled per default for those platforms, so that
the board config files don't need to be changed. Also necessary is
some dts hacking,
Gentle ping for this series.
On 8/25/2022 9:42 AM, Jae Hyun Yoo wrote:
Hello,
The FRU handling was added as a Xilinx board dependent support but it
is also useful for other boards, so this commit moves the FRU handling
support to the common region so that it can be enabled by CONFIG_CMD_FRU.
On Mon, Aug 29, 2022 at 07:53:15AM +0800, Xiang W wrote:
> The bar of the structure virtio_pci_cap is the index, and each base
> address occupies 4 bytes, so it needs to be multiplied by 4.
>
> This patch fixes a bug reported by Felix Yan
>
On Tue, Aug 30, 2022 at 04:40:37PM -0400, Sean Anderson wrote:
> Normally, readline is not used int SPL. However, it may be useful to
> enable the Freescale DDR interactive mode in SPL, while U-Boot is still
> executing from SRAM. The default settings for readline result in a large
> buffer being
On Tue, Aug 30, 2022 at 02:09:12PM +0200, Patrice Chotard wrote:
> Even pin with GPIOF_UNUSED function can have a label.
> The criteria to add or not a space character is linked to label not to
> the used/unused status.
>
> Signed-off-by: Patrice Chotard
> Reviewed-by: Simon Glass
>
On Tue, Aug 30, 2022 at 02:09:14PM +0200, Patrice Chotard wrote:
> This allows to test if a pin's label if displayed using gpio_get_status()
> when this pin is configured in alternate function.
>
> Signed-off-by: Patrice Chotard
> Reviewed-by: Simon Glass
> Reviewed-by: Patrick Delaunay
On Tue, Aug 30, 2022 at 02:09:13PM +0200, Patrice Chotard wrote:
> Populate uc_priv->name[] with pinmux node's name in order to indicate
> the pinmuxing's name in case GPIO is configured in alternate.
>
> For example, for STM32 SoC's based platform, "gpio status" command
> output :
>
> before
On Tue, Aug 30, 2022 at 02:09:11PM +0200, Patrice Chotard wrote:
> Currently, if pin's function is GPIOF_FUNC, only "func" if displayed
> without any other information. It would be interesting, if information is
> available, to indicate which pinmuxing's name is used.
>
> For example, for STM32
On Mon, Aug 29, 2022 at 05:36:23PM +0200, Pali Rohár wrote:
> Signed-off-by: Pali Rohár
Applied to u-boot/next, thanks!
--
Tom
signature.asc
Description: PGP signature
On Sun, Aug 28, 2022 at 09:30:20PM +0200, Alexander Sowarka wrote:
> The nvme driver falsely assumed that the last entry on a page
> of the prp-list always points to the next page of the prp-list.
> This potentially can lead to the illegal creation of pages on
> the prp-list with only a single
On Tue, Jul 26, 2022 at 04:21:43PM +0200, Etienne Carriere wrote:
> Changes optee_rng driver to register itself has a OP-TEE service so
> that a device is bound for the driver when OP-TEE enumerates the
> PTA RNG service.
>
> Cc: Sughosh Ganu
> Cc: Patrick Delaunay
> Signed-off-by: Etienne
On Tue, Aug 23, 2022 at 03:10:39PM -0400, Sean Anderson wrote:
> This fixes numerous cases of format strings not matching their
> arguments. Also keep the format strings on one line for easier grepping.
>
> Signed-off-by: Sean Anderson
> Reviewed-by: Simon Glass
Applied to u-boot/next,
On Tue, Jul 26, 2022 at 04:21:42PM +0200, Etienne Carriere wrote:
> This change defines resources for OP-TEE service drivers to register
> themselves for being bound to when OP-TEE firmware reports the related
> service is supported. OP-TEE services are discovered during optee
> driver probe
On Tue, Jul 26, 2022 at 04:21:41PM +0200, Etienne Carriere wrote:
> Removes local variable child in optee_probe() that is not used.
>
> Cc: Patrick Delaunay
> Reviewed-by: Patrick Delaunay
> Signed-off-by: Etienne Carriere
Applied to u-boot/next, thanks!
--
Tom
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On Tue, Jun 14, 2022 at 04:12:00PM +0200, Stefan Herbrechtsmeier wrote:
> From: Stefan Herbrechtsmeier
>
> Allocate memory for buffers at a cache-line boundary to avoid
> misaligned buffer address for subsequent reads. This avoids an
> additional sector-based memory copy in the fat file system
On Tue, Jun 14, 2022 at 03:21:30PM +0200, Stefan Herbrechtsmeier wrote:
> From: Stefan Herbrechtsmeier
>
> Add functions to read 8/16-bit integers like the existing functions for
> 32/64-bit to simplify read of 8/16-bit integers from device tree
> properties.
>
> Signed-off-by: Stefan
On Tue, Jun 14, 2022 at 03:21:31PM +0200, Stefan Herbrechtsmeier wrote:
> From: Stefan Herbrechtsmeier
>
> The device tree binding [1] specify the vendor-id, product-id, device-id
> and language-id as 16 bit values and the linux driver reads the boost-up
> value as 8 bit value.
>
> [1]
>
On Wed, 31 Aug 2022 21:13:40 +0200, Heinrich Schuchardt wrote:
> Check the that the hash length is shorter than the message length. This
> avoids:
>
> ./tools/../lib/rsa/rsa-verify.c:275:11: warning:
> ‘*db’ may be used uninitialized [-Wmaybe-uninitialized]
> 275 | db[0] &=
Signed-off-by: Pali Rohár
---
cmd/pci.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/cmd/pci.c b/cmd/pci.c
index 6258699fec81..58a74755c8b2 100644
--- a/cmd/pci.c
+++ b/cmd/pci.c
@@ -450,11 +450,10 @@ static const struct pci_flag_info {
} pci_flag_info[] = {
{ PCI_REGION_IO, "io"
- Remove EFI support as it's not used on this board
- Disable CONFIG_FIT_PRINT to reduce the serial output (minimal speedup)
Signed-off-by: Stefan Roese
---
configs/theadorable_debug_defconfig | 3 +++
1 file changed, 3 insertions(+)
diff --git a/configs/theadorable_debug_defconfig
With the recent changes in the Marvel mvneta network driver, the MDIO
bus is not connected any more. This patch updates the DT nodes to use
the nodes from the dtsi files instead of creating ad-hoc nodes.
Signed-off-by: Stefan Roese
---
arch/arm/dts/armada-xp-theadorable.dts | 27
On Thu, Sep 15, 2022 at 06:53:42AM +0200, Jorge Ramirez-Ortiz, Foundries wrote:
> On 14/09/22, Tom Rini wrote:
> > On Tue, Aug 30, 2022 at 09:56:45PM +0200, Jorge Ramirez-Ortiz wrote:
> >
> > > Early instantiation of this I2C device would lock up when being
> > > probed.
> > >
> > >
This patch enables the following:
1) use preboot configuration to enable usb devices.
2) Enable USB configs so keyboards and other USB devices work,
update the number of ports of the usb root hub.
- with this addition the updated USB device Tree:
1 Hub (12 Mb/s, 0mA)
From: Quentin Schulz
RAM_PX30_DDR4 is for DDR4 support and not DDR3 so let's fix the typo.
Fixes: 2db36c64bd5a ("ram: rockchip: px30: add a config-based ddr selection")
Cc: Quentin Schulz
Signed-off-by: Quentin Schulz
---
drivers/ram/rockchip/Kconfig | 2 +-
1 file changed, 1 insertion(+), 1
From: Quentin Schulz
UART0 can obviously also be used for debug uart in U-Boot, so let's add
its support.
Cc: Quentin Schulz
Signed-off-by: Quentin Schulz
---
arch/arm/include/asm/arch-rockchip/cru_px30.h | 19 ++
arch/arm/mach-rockchip/px30/px30.c| 37 ++-
Hi Peng,
On Wed, Sep 14, 2022 at 9:53 PM Peng Fan (OSS) wrote:
>
> From: Peng Fan
>
> "alloc space exhausted" happens in very early stage, which could be seen
> with DEBUG_UART options enabled and leeds to an non-functional board.
>
> kontron_pitx_imx8m:
> CONFIG_DEBUG_UART_BASE=0x3088 #
From: Quentin Schulz
Now that a single binary containing TPL/SPL correctly formatted for SPI
flashes and U-Boot proper, can be generated by binman, let's do it.
Also update the documentation to tell the user to use this newly
generated file instead of manually generating and flashing the
From: Quentin Schulz
The offset of the SPL payload on Puma is different than for other
Rockchip devices in that it is stored at offset 256K instead of much
further away in the MMC.
Flashing one binary instead of two at different offsets is much more
user friendly so let's migrate to it by
From: Quentin Schulz
The offset of the SPL payload on Lion is different than for other
Rockchip devices in that it is stored at offset 256K instead of much
further away in the MMC.
Flashing one binary instead of two at different offsets is much more
user friendly so let's migrate to it by
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