This driver handles most voltage regulators found in X-Powers AXP PMICs.
It is based on, and intended to replace, the regulator driver in TF-A.
AXP PMIC regulators can be divided into 6 categories:
- Switches without voltage control => fully supported.
- Single linear range => fully supported.
Now that a regulator driver exists for this PMIC, hook it up to the
device tree "regulators" subnodes.
Signed-off-by: Samuel Holland
---
(no changes since v1)
drivers/power/pmic/axp.c | 18 ++
1 file changed, 18 insertions(+)
diff --git a/drivers/power/pmic/axp.c
On Sat, 21 Jan 2023 17:13:05 -0600
Samuel Holland wrote:
Hi Samuel,
> This driver handles most voltage regulators found in X-Powers AXP PMICs.
> It is based on, and intended to replace, the regulator driver in TF-A.
>
> AXP PMIC regulators can be divided into 6 categories:
> - Switches
If the UART bus or baud clock has a gate, it must be enabled before the
UART can be used.
Reviewed-by: Stefan Roese
Signed-off-by: Samuel Holland
---
Changes in v3:
- Switch back to the original patch, now that the phycore-rk3288 build
is fixed by enabling LTO in patch 1.
Changes in v2:
From: Wadim Egorov
The phycore-rk3288 SPL binary is reaching the limits of 32KB very often.
Enable CONFIG_LTO to reduce the size of the SPL and make the board more
future proof for changes increasing the SPL size.
Signed-off-by: Wadim Egorov
Signed-off-by: Samuel Holland
---
Changes in v3:
This allows devm_reset_control_get(dev, NULL) to work and get the first
reset control, which is common in code ported from Linux.
Signed-off-by: Samuel Holland
---
Changes in v2:
- Move index error check inside if statement
- Update function comment
- Add unit test
This allows devm_clock_get(dev, NULL) to work and get the first clock,
which is common in code ported from Linux.
Signed-off-by: Samuel Holland
---
Changes in v2:
- Move index error check inside if statement
- Update function comment
- Add unit test
drivers/clk/clk-uclass.c | 12
Add support for the iproc Broadcom NAND controller,
used in Northstar SoCs for example. Based on the Linux
driver.
Cc: Philippe Reynes
Signed-off-by: Linus Walleij
---
drivers/mtd/nand/raw/Kconfig | 7 +
drivers/mtd/nand/raw/brcmnand/Makefile | 1 +
For BRCMNAND with 1-bit BCH ECC (BCH-1) such as used on the
D-Link DIR-885L and DIR-890L routers, we need to explicitly
select the ECC like this in the device tree:
nand-ecc-algo = "bch";
nand-ecc-strength = <1>;
nand-ecc-step-size = <512>;
This is handled by the Linux kernel but U-Boot
Use a more accurate check for determining if the full format string will
be handled correctly, since SPL_USE_TINY_PRINTF can be disabled.
Signed-off-by: Samuel Holland
---
drivers/core/dump.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/core/dump.c
On sunxi boards, SPL looks for U-Boot at a 32 KiB offset, unless SPL is
larger than 32 KiB, in which case U-Boot immediately follows SPL. See
the logic in spl_mmc_get_uboot_raw_sector() and spl_spi_load_image().
In two cases, the existing binman description mismatches the SPL code.
For 64-bit
This property sets the minimum size of an entry, including padding but
not alignment. It can be used to reserve space for growth of an entry,
or to enforce a minimum offset for later entries in the section.
Signed-off-by: Samuel Holland
---
tools/binman/binman.rst | 8
This was originally part of my series adding SPL FIT support for 32-bit
sunxi boards[0]. I hit this issue building a minimal SPI-only SPL for H5
that ended up fitting in 24 KiB. So it turns out this is a bug and not
just a dependency for a new feature.
I followed Simon's second suggestion from
This series adds a driver for the regulators in X-Powers AXPxxx PMICs.
It supports everything except regulators shared with GPIO pins. Those
have a different register interface, so they may need a separate driver.
Regulator setup in U-Boot proper is needed for Ethernet and HDMI/LCD
display
Subordinate regulator drivers can use this enumerated ID instead of
matching the compatible string again.
Reviewed-by: Andre Przywara
Signed-off-by: Samuel Holland
---
(no changes since v1)
drivers/power/pmic/axp.c | 18 +-
include/axp_pmic.h | 12
2 files
> > Apologies if I have missed it somewhere - but where is patch 12?
> > I don't see it on lore.kernel.org nor in my inbox :(
> https://lore.kernel.org/all/20230118082907.31629-1-yanhong.w...@starfivetech.com/
Oh, thanks! Hopefully I can provide a tested-by so...
> Not sure why it isn't with
On 1/21/23 16:36, Conor Dooley wrote:
On Wed, Jan 18, 2023 at 04:11:15PM +0800, Yanhong Wang wrote:
This series of patches base on the latest branch/master, and add support
for the StarFive JH7110 RISC-V SoC and VisionFive V2 board. In order for
this to be achieved, the respective DT nodes have
On Wed, Jan 18, 2023 at 04:11:15PM +0800, Yanhong Wang wrote:
> This series of patches base on the latest branch/master, and add support
> for the StarFive JH7110 RISC-V SoC and VisionFive V2 board. In order for
> this to be achieved, the respective DT nodes have been added, and the
> required
On Fri, Jan 20, 2023 at 15:11, Simon Glass wrote:
Hi Joost,
On Fri, 20 Jan 2023 at 15:00, Joost van Zwieten
wrote:
On Fri, Jan 13, 2023 at 11:00, Simon Glass wrote:
> Hi Joost,
>
> On Mon, 9 Jan 2023 at 06:31, Joost van Zwieten
> wrote:
>>
>> Dear maintainers,
>>
>>
On 12/23/22 07:33, Sergiu Moga wrote:
This patch series originates from a bigger patch series:
https://lists.denx.de/pipermail/u-boot/2022-December/502865.html
A driver for clock operations on SAM9X60's USB clock has been added as
well as its registration on CCF. In order for USB to work
On Sat, Jan 21, 2023 at 01:20:51PM -0500, Sean Anderson wrote:
> The following changes since commit dd31cd58b02729807934cb699b164b1f8736620f:
>
> Merge tag 'efi-2023-04-rc1-2' of
> https://source.denx.de/u-boot/custodians/u-boot-efi (2023-01-20 14:23:20
> -0500)
>
> are available in the Git
Enable TIMER as default option for add Tegra devices and
enable TEGRA_TIMER for TEGRA_ARMV7_COMMON. Additionally
enable SPL_TIMER if build as SPL part and drop deprecated
configs from common header.
Signed-off-by: Svyatoslav Ryhel
Reviewed-by: Simon Glass
---
arch/arm/Kconfig | 1
Enum clock_osc_freq was designed to use only with T20.
This patch remaps it to use additional frequencies, added in
T30+ SoC while maintaining backwards compatibility with T20.
Tested-by: Andreas Westman Dorcsak # ASUS TF600T T30
Tested-by: Jonas Schwöbel # Surface RT T30
Tested-by: Robert
Add timer support for T20/T30/T114 and T124 based devices.
Driver is based on DM, has device tree support and can be
used on SPL and early boot stage.
Arm64 Tegra according to comment in tegra-common.h uses
architected timer.
Tested-by: Andreas Westman Dorcsak # ASUS TF600T T30
Tested-by: Jonas
- ARM: tegra: remap clock_osc_freq for all Tegra family
Enum clock_osc_freq was designed to use only with T20.
This patch remaps it to use additional frequencies, added in
T30+ SoC while maintaining backwards compatibility with T20.
- drivers: timer: add timer driver for ARMv7 based Tegra devices
On 1/20/23 19:51, Andre Przywara wrote:
> To determine whether we have been booted from an eMMC boot partition, we
> replay some of the checks that the BROM must have done to successfully
> load the SPL. This involves a checksum check, which currently relies on
> the SPL being wrapped in an "eGON"
> From: Simon Glass
> Date: Wed, 18 Jan 2023 12:42:19 -0700
>
> Hi Mark,
>
> On Tue, 17 Jan 2023 at 15:04, Mark Kettenis wrote:
> >
> > In order to support IOMMUs in non-bypass mode we need device ops
> > to map and unmap DMA memory. The map operation enters a mapping
> > for a region
This driver supports the PCIe controller on the Apple M1 and
M2 SoCs. The code is adapted from the Linux driver.
Signed-off-by: Mark Kettenis
---
MAINTAINERS | 1 +
arch/arm/Kconfig | 2 +
drivers/pci/Kconfig | 9 +
drivers/pci/Makefile | 1 +
When a system has multiple XHCI controllers, some of the
properties described in the descriptor of the root hub (such as
the number of ports) might differ between controllers. Fix this
by switching from a single global hub descriptor to a hub
descriptor per controller.
Signed-off-by: Mark
Some Apple Silicon machines have a PCIe XHCI controller in additon
to the DWC3 controllers integrated on the SoC. On the Mac mini
the Type-A ports are handled by this PCIe controller. Enabling
it allows the use of these ports in U-Boot.
Signed-off-by: Mark Kettenis
---
Systems such as Apple's M1 and M2 SoCs may have separate IOMMUs
for each PCIe root port. In this case the right IOMMU for a
PCI device behind a particular root port is described by an
"iommu-map" property in the device tree. Parse this property
and use it to find the right IOMMU device for PCI
Test that we correctly probe an IOMMU that is mapped by an
"iommu-map" device tree property of a PCIe controller node.
Signed-off-by: Mark Kettenis
---
arch/sandbox/dts/test.dts | 2 ++
test/dm/iommu.c | 30 ++
2 files changed, 32 insertions(+)
diff --git
An XHCI controller that sits behind an IOMMU needs to map and unmap
its memory buffers to do DMA. Implement this by inroducing new
xhci_dma_map() and xhci_dma_unmap() helper functions. The
xhci_dma_map() function replaces the existing xhci_virt_to_bus()
function in the sense that it returns the
Implement translation table support for all the variations of
Apple's DART IOMMU that can be found on Apple's M1 and M2 SoCs.
Signed-off-by: Mark Kettenis
---
drivers/iommu/apple_dart.c | 311 +
1 file changed, 277 insertions(+), 34 deletions(-)
diff --git
Test that the map and unmap operations work for devices that
have DMA translated by an IOMMU and devices that don't have
DMA translated by an IOMMU.
Signed-off-by: Mark Kettenis
---
drivers/iommu/sandbox_iommu.c | 58 +++
test/dm/iommu.c | 44
In order to support IOMMUs in non-bypass mode we need device ops
to map and unmap DMA memory. The map operation enters a mapping
for a region specified by CPU address and size into the translation
table of the IOMMU and returns a DMA address suitable for
programming the device to do DMA. The
This series adds support for the PCIe controller found on Apple M1 and
M2 machines and enables support for PCIe XHCI controllers. This makes
the type-A USB ports on the M1 Mac mini work. Since the use of Apples
DART IOMMU is mandatory (these PCIe DARTs don't support bypass mode),
this adds DMA
The FIT generated after the switch to using binman is using different
values for firmware and loadables properties compared to the old script.
With the old script:
firmware = "atf-1";
loadables = "u-boot", "atf-2", ...;
After switch to binman:
firmware = "u-boot";
loadables = "atf-1",
In some cases it is desired for SPL to start TF-A instead of U-Boot
proper. Add support for a new property fit,firmware that picks a
valid entry and prepends the remaining valid entries to the
loadables list generated by the split-elf generator.
Signed-off-by: Jonas Karlman
---
v3:
- Introduce
Add sha256 hash to FIT images when CONFIG_SPL_FIT_SIGNATURE=y.
Signed-off-by: Jonas Karlman
Reviewed-by: Simon Glass
---
v2:
- Collect r-b tag
arch/arm/dts/rockchip-u-boot.dtsi | 20
1 file changed, 20 insertions(+)
diff --git a/arch/arm/dts/rockchip-u-boot.dtsi
Special nodes, hash and signature, is not being added to the nodes
generated for each segment in split-elf operation.
Copy the subnode logic used in _gen_fdt_nodes to _gen_split_elf to
ensure special nodes are added to the generated nodes.
Signed-off-by: Jonas Karlman
Reviewed-by: Simon Glass
When I was trying to run mainline U-Boot on my new Rockchip RK3568 board
I discovered that one segment of vendor TF-A could not successfully be
loaded into SRAM, validation of the image sha256 hash failed.
The issue with loading the data turned out to be because of how SPL load
FIT images. It
SPL load FIT images by reading the data aligned to block length.
Block length aligned image data is read directly to the load address.
Unaligned image data is written to an offset of the load address and
then the data is memcpy to the load address.
This adds a small overhead of having to memcpy
Add support to indicate what alignment to use for the FIT and its
external data. Pass the alignment to mkimage via the -B flag.
Signed-off-by: Jonas Karlman
Reviewed-by: Simon Glass
---
v3:
- Collect r-b tag
v2:
- Add test
- Update entries.rst
tools/binman/btool/mkimage.py | 5 ++-
On 1/18/23 03:11, Yanhong Wang wrote:
Add a DM clock driver for StarFive JH7110 SoC.
Signed-off-by: Yanhong Wang
---
drivers/clk/Kconfig | 1 +
drivers/clk/Makefile | 1 +
drivers/clk/starfive/Kconfig | 17 +
drivers/clk/starfive/Makefile
On 1/18/23 03:11, Yanhong Wang wrote:
Add initial device tree for StarFive VisionFive v2 board.
Signed-off-by: Yanhong Wang
---
arch/riscv/dts/Makefile | 2 +-
.../dts/starfive_visionfive2-u-boot.dtsi | 84 +++
arch/riscv/dts/starfive_visionfive2.dts
On 1/18/23 03:11, Yanhong Wang wrote:
Add all clock outputs for the StarFive JH7110 clock generator.
Signed-off-by: Yanhong Wang
---
include/dt-bindings/clock/starfive-jh7110.h | 271
1 file changed, 271 insertions(+)
create mode 100644
On 1/21/23 13:20, Sean Anderson wrote:
The following changes since commit d3ccdc0fce206c1d54fbdc607333de6184e19e75:
Merge tag 'efi-2022-10-rc6' of
https://source.denx.de/u-boot/custodians/u-boot-efi (2022-09-30 08:30:38 -0400)
are available in the Git repository at:
The following changes since commit dd31cd58b02729807934cb699b164b1f8736620f:
Merge tag 'efi-2023-04-rc1-2' of
https://source.denx.de/u-boot/custodians/u-boot-efi (2023-01-20 14:23:20 -0500)
are available in the Git repository at:
https://source.denx.de/u-boot/custodians/u-boot-clk.git
On Tue, 13 Dec 2022 14:57:10 +0100, Patrick Delaunay wrote:
> The clock UCLASS need to be probed to allow availability of the
> private data (struct clk *), get in show_clks() with dev_get_clk_ptr()
> before use them.
>
> Without this patch the clock dump can cause crash because all the
> private
On 1/21/23 13:17, Sean Anderson wrote:
On Wed, 18 Jan 2023 13:13:17 -0700, Simon Glass wrote:
On a second and third look, a recent patch seems to be writing to the
wrong place - updating offsets from the address of the pointer instead
of what the pointer points to.
Fix it.
[...]
Applied,
On Wed, 18 Jan 2023 13:13:17 -0700, Simon Glass wrote:
> On a second and third look, a recent patch seems to be writing to the
> wrong place - updating offsets from the address of the pointer instead
> of what the pointer points to.
>
> Fix it.
>
>
> [...]
Applied, thanks!
[1/1] ifwitool: Fix
On Fri, 23 Dec 2022 14:33:09 +0200, Sergiu Moga wrote:
> This patch series originates from a bigger patch series:
> https://lists.denx.de/pipermail/u-boot/2022-December/502865.html
>
> A driver for clock operations on SAM9X60's USB clock has been added as
> well as its registration on CCF. In
On Mon, 21 Nov 2022 17:15:28 +0800, Jim Liu wrote:
> Fix bug for npcm7xx bmc calculate pll clock.
> PLLCON1 need to divide by 2.
>
>
Applied, thanks!
[1/1] clk: nuvoton: fix bug for calculate pll clock
commit: af7237596290f8278b1c10f9949020cc6bc47acf
Best regards,
--
Sean Anderson
On Mon, 19 Dec 2022 12:31:23 +0100, Dario Binacchi wrote:
> This series is a backport of the linux seris [1]. Like that series, this
> one was also tested on the BSH SystemMaster (SMM) S2 board.
>
> [1]
> https://lore.kernel.org/all/20221117113637.1978703-1-dario.binac...@amarulasolutions.com
>
On 1/18/23 15:13, Simon Glass wrote:
On a second and third look, a recent patch seems to be writing to the
wrong place - updating offsets from the address of the pointer instead
of what the pointer points to.
Fix it.
Signed-off-by: Simon Glass
Fixes: 2d1b2ac13fe ("tool: ifwitool: Fix buffer
On Wed, Jan 18, 2023 at 8:46 AM Michal Simek wrote:
>
>
>
> On 1/9/23 02:07, Jassi Brar wrote:
> > Add code to support FWU_MULTI_BANK_UPDATE.
> > The platform does not have gpt-partition storage for
> > Banks and MetaData, rather it used SPI-NOR backed
> > mtd regions for the purpose.
> >
> >
On 1/18/23 03:11, Yanhong Wang wrote:
Add board support for StarFive VisionFive v2.
Signed-off-by: Yanhong Wang
---
board/starfive/visionfive2/MAINTAINERS| 7 ++
board/starfive/visionfive2/Makefile | 7 ++
board/starfive/visionfive2/spl.c | 118
On 1/19/23 16:44, Marek Vasut wrote:
The DWMAC clock in i.MX8M Plus were so far configured via ad-hoc
architecture code. Replace that with DM clock instead. This way,
the driver claims all its required clock, enables and disables
them, and even gets the CSR clock rate and sets the TX clock rate,
On 1/19/23 16:44, Marek Vasut wrote:
Add clock for the DWMAC EQoS block. This is used among other things
to configure the MII clock via DM CLK.
Signed-off-by: Marek Vasut
---
Cc: "Ariel D'Alessandro"
Cc: "NXP i.MX U-Boot Team"
Cc: Andrey Zhizhikin
Cc: Fabio Estevam
Cc: Joe Hershberger
Cc:
On 1/9/23 04:31, yanhong wang wrote:
On 2023/1/5 3:13, Sean Anderson wrote:
On 12/11/22 21:50, Yanhong Wang wrote:
+static const struct starfive_pllx_rate jh7110_pll2_tbl[] = {
+ PLLX_RATE(122880UL, 15, 768, 1, 1, 1),
+ PLLX_RATE(118800UL, 2, 99, 1, 1, 1),
+};
All of these
Le sam. 21 janv. 2023 à 17:35, Pali Rohar a écrit :
>
> On Saturday 21 January 2023 17:31:15 Paul-Erwan RIO wrote:
> > Le sam. 21 janv. 2023 à 17:21, Pali Rohar a écrit :
> > >
> > > On Saturday 21 January 2023 17:08:42 Paul-Erwan RIO wrote:
> > > > Le sam. 21 janv. 2023 à 16:56, Pali Rohar a
On Saturday 21 January 2023 17:31:15 Paul-Erwan RIO wrote:
> Le sam. 21 janv. 2023 à 17:21, Pali Rohar a écrit :
> >
> > On Saturday 21 January 2023 17:08:42 Paul-Erwan RIO wrote:
> > > Le sam. 21 janv. 2023 à 16:56, Pali Rohar a écrit :
> > > >
> > > > On Saturday 21 January 2023 16:47:41
Le sam. 21 janv. 2023 à 17:21, Pali Rohar a écrit :
>
> On Saturday 21 January 2023 17:08:42 Paul-Erwan RIO wrote:
> > Le sam. 21 janv. 2023 à 16:56, Pali Rohar a écrit :
> > >
> > > On Saturday 21 January 2023 16:47:41 Paul-Erwan Rio wrote:
> > > > The secure boot features cannot be built
* add return values
* move configuration to separate section to match other man-pages
* fix typo
Signed-off-by: Heinrich Schuchardt
---
doc/usage/cmd/font.rst | 19 ---
1 file changed, 12 insertions(+), 7 deletions(-)
diff --git a/doc/usage/cmd/font.rst b/doc/usage/cmd/font.rst
On Saturday 21 January 2023 17:08:42 Paul-Erwan RIO wrote:
> Le sam. 21 janv. 2023 à 16:56, Pali Rohar a écrit :
> >
> > On Saturday 21 January 2023 16:47:41 Paul-Erwan Rio wrote:
> > > The secure boot features cannot be built without 'LIBCRYPTO' enabled.
> > > This kind of reverts some of
> > >
Le sam. 21 janv. 2023 à 16:56, Pali Rohar a écrit :
>
> On Saturday 21 January 2023 16:47:41 Paul-Erwan Rio wrote:
> > The secure boot features cannot be built without 'LIBCRYPTO' enabled.
> > This kind of reverts some of
> > changes.
> >
> > Signed-off-by: Paul-Erwan Rio
> > ---
> >
> >
Commit introduced a
target-independent configuration to build crypto features in host tools.
But since commit <2c21256b27d70b5950bd059330cdab027fb6ab7e>, the build
without OpenSSL is broken, due to FIT signature/encryption features. Add
missing conditional compilation tokens to fix this.
The secure boot features cannot be built without 'LIBCRYPTO' enabled.
This kind of reverts some of
changes.
Signed-off-by: Paul-Erwan Rio
---
tools/kwbimage.c | 18 ++
1 file changed, 18 insertions(+)
diff --git a/tools/kwbimage.c b/tools/kwbimage.c
index
A target-independent configuration exists to enable/disable crypto feature
when building the host tools. But the crypto-free build is broken.
Paul-Erwan Rio (2):
tools: kwbimage: disable secure boot build without LIBCRYPTO support
tools: fix build without LIBCRYPTO support
On Saturday 21 January 2023 16:47:41 Paul-Erwan Rio wrote:
> The secure boot features cannot be built without 'LIBCRYPTO' enabled.
> This kind of reverts some of
> changes.
>
> Signed-off-by: Paul-Erwan Rio
> ---
>
> tools/kwbimage.c | 18 ++
> 1 file changed, 18 insertions(+)
From: Aswath Govindraju
Add configs for enabling USB host MSC and USB DFU in U-Boot.
Signed-off-by: Aswath Govindraju
[ rebase from vendor u-boot to upstream ]
Signed-off-by: Sjoerd Simons
---
include/configs/am62x_evm.h | 10 +-
1 file changed, 9 insertions(+), 1 deletion(-)
diff
Update the am62 and am625 device-trees from current ti-k3-next (commit
880932e657f). This needed the following tweaks to the u-boot specific$
dtsi as well:
- Switch tick-timer to the main_timer as it's now defined in the main dtsi
- Add mdio pins to the cpsw3g pinctrl. It moved to a subnode in the
Enable USB host as well as USB gadget and DFU support; This allows using
a single set binaries to load both the u-boot chain and linux from USB DFU,
SD card and emmc.
Signed-off-by: Sjoerd Simons
---
configs/am62x_evm_a53_defconfig | 33 ++---
sdhci0 on the k3-am625-sk is the emmc, enable this in SPL as well to
allow booting from that media.
Signed-off-by: Sjoerd Simons
---
arch/arm/dts/k3-am625-sk-u-boot.dtsi | 8
1 file changed, 8 insertions(+)
diff --git a/arch/arm/dts/k3-am625-sk-u-boot.dtsi
Enable both usb0 as a peripheral for use with DFU and usb1 as a host
port for usage with e.g. usb storage.
Signed-off-by: Sjoerd Simons
---
arch/arm/dts/k3-am625-sk-u-boot.dtsi | 23 +++
1 file changed, 23 insertions(+)
diff --git a/arch/arm/dts/k3-am625-sk-u-boot.dtsi
Add glue code for TI AM62 to the dwc3 driver; Most code adopted from
TI vendor u-boot code.
Signed-off-by: Sjoerd Simons
---
drivers/usb/dwc3/dwc3-generic.c | 102
1 file changed, 102 insertions(+)
diff --git a/drivers/usb/dwc3/dwc3-generic.c
Timer0 is used by u-boot as the tick timer; Add it to the soc devices
list so it can be enabled via the k3 power controller.
Signed-off-by: Sjoerd Simons
---
arch/arm/mach-k3/am62x/dev-data.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/mach-k3/am62x/dev-data.c
THe TI AM654 timer is compatible with the omap-timer implementation, so
add it to the id list
Signed-off-by: Sjoerd Simons
---
drivers/timer/omap-timer.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/timer/omap-timer.c b/drivers/timer/omap-timer.c
index aa2e4360c1b..9b6d97dae67
This series adds more boot sources for the TI am62x. For that the dts'
are synced from the upstream ti-next git tree (to add usb nodes), some
dwc3 glue is and finally the default configuration is tuned to add
support for DFU and USB (host and gadget)
Aswath Govindraju (1):
configs: am62:
Provide a man-page for the sleep command.
Signed-off-by: Heinrich Schuchardt
---
doc/usage/cmd/sleep.rst | 45 +
doc/usage/index.rst | 1 +
2 files changed, 46 insertions(+)
create mode 100644 doc/usage/cmd/sleep.rst
diff --git
The 'Example' heading should be on a lower level than 'bdinfo command'.
Signed-off-by: Heinrich Schuchardt
---
doc/usage/cmd/bdinfo.rst | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/doc/usage/cmd/bdinfo.rst b/doc/usage/cmd/bdinfo.rst
index 6b3cde2ccb..b287d0ff73 100644
---
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