Move the environment to an easily editable text file in the boot
partition
Signed-off-by: Paweł Anikiel
Reviewed-by: Simon Glass
---
board/google/chameleonv3/environment.txt | 13 +
include/configs/socfpga_chameleonv3.h| 9 -
2 files changed, 17 insertions(+), 5 deletio
These changes add the third chameleon variation and make it easier to
deploy images to different boards.
v2 changes:
- rename chameleonv3.dts to .dtsi
- add missing CONFIG_SPL_MAX_SIZE symbol
Paweł Anikiel (6):
socfpga: chameleonv3: Enable ext4 in SPL
socfpga: chameleonv3: Move environment
Hi Ilias,
On Tue, 21 Feb 2023 at 07:18, Ilias Apalodimas
wrote:
>
> Hi Simon,
>
> We had that discussion in the past.
>
>
> On Tue, 21 Feb 2023 at 16:09, Simon Glass wrote:
> >
> > Hi Ilias,
> >
> > On Tue, 21 Feb 2023 at 06:58, Ilias Apalodimas
> > wrote:
> > >
> > > Hi Simon,
> > >
> > > On M
Hi Simon,
We had that discussion in the past.
On Tue, 21 Feb 2023 at 16:09, Simon Glass wrote:
>
> Hi Ilias,
>
> On Tue, 21 Feb 2023 at 06:58, Ilias Apalodimas
> wrote:
> >
> > Hi Simon,
> >
> > On Mon, Feb 20, 2023 at 09:31:24AM -0700, Simon Glass wrote:
> > > Add an option to tell the TPM to
Hi Ilias,
On Tue, 21 Feb 2023 at 06:58, Ilias Apalodimas
wrote:
>
> Hi Simon,
>
> On Mon, Feb 20, 2023 at 09:31:24AM -0700, Simon Glass wrote:
> > Add an option to tell the TPM to commit non-volatile data immediately it
> > is changed, rather than waiting until later. This is needed in some
> > s
Hi Simon,
On Mon, Feb 20, 2023 at 09:31:24AM -0700, Simon Glass wrote:
> Add an option to tell the TPM to commit non-volatile data immediately it
> is changed, rather than waiting until later. This is needed in some
> situations, since if the device reboots it may not write the data.
>
> Add defin
Currently there is only one test and it only works on TPM v2. Update it
to work on v1.2 as well, using a new function to pick up the required
TPM.
Update sandbox to include both a v1.2 and v2 TPM so that this works.
Split out the existing test into two pieces, one for init and one for
the v2-only
Add an implementation of this, moving the common call to tpm_init() up
into the common API implementation.
Add a test.
Signed-off-by: Simon Glass
---
Changes in v2:
- Rebase to master
- Drop unnecessary if...return
include/tpm-common.h | 2 +-
include/tpm-v1.h | 11 +++
lib/tpm-v
This commit adds driver for iMX93 ADC.
The driver is implemented using driver model and provides
ADC uclass's methods for ADC single channel operations:
- adc_start_channel()
- adc_channel_data()
- adc_stop()
ADC features:
- channels: 4
- resolution: 12-bit
Signed-off-by: Luc
Den 2023-02-21 kl. 10:08, skrev Michael Walle:
If it is right or wrong to use that as an MTD is a matter of opinion.
I am still hoping the MTD maintainer would provide input here.
I might be missing something, but what is the reasoning here, to add this
to the mtd subsystem? One is saving spa
It was incorrectly using an old priv->regs pointer, and may lead to null
pointer access.
Signed-off-by: Jiajie Chen
---
drivers/spi/xilinx_spi.c | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/drivers/spi/xilinx_spi.c b/drivers/spi/xilinx_spi.c
index 4e9115dafe..e759b6600
> -Original Message-
> From: Simon Glass
> Sent: 2023年2月21日 3:49
> To: U-Boot Mailing List
> Cc: Bin Meng ; Simon Glass ;
> AKASHI Takahiro ; Andrew Scull
> ; Heinrich Schuchardt ; Ilias
> Apalodimas ; Jason Liu
;
> John Keeping ; Marek Vasut ;
> Masahisa Kojima ; Michal Suchanek
> ; Pa
Hi Ilias,
On Tue, 21 Feb 2023 at 06:10, Ilias Apalodimas
wrote:
>
> Hi Simon,
>
> Unfortunately, this doesn't apply cleanly over
> https://lore.kernel.org/u-boot/20230218152741.528191-1-ilias.apalodi...@linaro.org/
>
> I'll have a look at the conflicts, if they are minor i'll fix them up.
> Other
Hi Simon,
Unfortunately, this doesn't apply cleanly over
https://lore.kernel.org/u-boot/20230218152741.528191-1-ilias.apalodi...@linaro.org/
I'll have a look at the conflicts, if they are minor i'll fix them up.
Otherwise you'll have to respin this
Thanks
/Ilias
On Tue, 21 Feb 2023 at 15:08, Si
Hi Ilias,
On Tue, 21 Feb 2023 at 06:03, Ilias Apalodimas
wrote:
>
> Hi Simon,
>
> On Mon, Feb 20, 2023 at 02:27:36PM -0700, Simon Glass wrote:
> > Add an implementation of this, moving the common call to tpm_init() up
> > into the common API implementation.
> >
> > Add a test.
> >
> > Signed-off-
On Mon, Feb 20, 2023 at 02:27:35PM -0700, Simon Glass wrote:
> Currently there is only one test and it only works on TPM v2. Update it
> to work on v1.2 as well, using a new function to pick up the required
> TPM.
>
> Update sandbox to include both a v1.2 and v2 TPM so that this works.
> Split out
Hi Simon,
On Mon, Feb 20, 2023 at 02:27:36PM -0700, Simon Glass wrote:
> Add an implementation of this, moving the common call to tpm_init() up
> into the common API implementation.
>
> Add a test.
>
> Signed-off-by: Simon Glass
> ---
>
> include/tpm-common.h | 2 +-
> include/tpm-v1.h | 11
According to the PLL vendor, we should keep the PLL power on, so we
shouldn't toggle the power-down bit during PLL initialization.
Signed-off-by: Dylan Hung
---
drivers/ram/aspeed/sdram_ast2600.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/ram/aspeed/sdram_a
There are several PLLs in AST2600 that provide clock sources for various
hardware blocks. According to the PLL vendor, the setting sequence was
incorrect, since the PLL power should kept on during initialization.
This patch series fixes the PLL setting sequence, including the MPLL in
the DRAM drive
According to the PLL vendor, we should keep the PLL power on, so we
shouldn't toggle the power-down bit during PLL initialization.
Signed-off-by: Dylan Hung
---
drivers/clk/aspeed/clk_ast2600.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/drivers/clk/aspeed/clk_ast2600.c
Den 2023-02-21 kl. 02:13, skrev Marek Vasut:
On 2/21/23 00:47, Ulf Samuelsson wrote:
Den 2023-02-20 kl. 23:34, skrev Marek Vasut:
On 2/20/23 22:29, Ulf Samuelsson wrote:
[...]
To sum it up:
- The only part of the MTD subsystem that is in use by this driver
is the write callback, everyt
Hi Kever,
On Tue, 21 Feb 2023 at 15:08, Kever Yang wrote:
>
> Hi Jagan,
>
> On 2023/2/17 05:44, Jonas Karlman wrote:
>
> + prate = priv->cpll_hz;
>
> Should be gpll_hz instead of cpll_hz.
>
> Do you have new patchset for this series, I will fix this if there is no new
> version for other patches
Sorry, I didn't follow this too closely. Do you have some pointers?
I just saw your latest mail. Thanks.
-michael
Am 2023-02-21 11:42, schrieb Ulf Samuelsson:
Den 2023-02-21 kl. 10:08, skrev Michael Walle:
If it is right or wrong to use that as an MTD is a matter of
opinion.
I am still hoping the MTD maintainer would provide input here.
I might be missing something, but what is the reasoning here, to add
Hi Guys,
We are currently discussing how to support passive serial configuration
of FPGAs in u-boot.
Checking the u-boot source code reveals that only your boards
actually supports this.
board/beckhoff/mx53cx9020/mx53cx9020.c:...Altera_CYC2_Passive_Serial ...
$ scripts/get_maintainer.pl board/
Help question PNX8473🙏 i have write one e-mail to
Vincent Stehlé
> On 21 Feb 2023, at 01:24, Cento50Shopping Michele della guardia
> wrote:
>
> Hello Mr Vincent i have found your e-mail in the group dex.de U-Boot
> I have send one post in the group mail list but not see if this are publish
>
Hi Jagan,
On 2023/2/17 05:44, Jonas Karlman wrote:
+ prate = priv->cpll_hz;
Should be gpll_hz instead of cpll_hz.
Do you have new patchset for this series, I will fix this if there is no
new version for other patches.
Thanks,
- Kever
On 2023/2/17 19:58, Jagan Teki wrote:
From: Manoj Sai
=> usb start
starting USB...
Bus usb@fd00: Register 2000140 NbrPorts 2
Starting the controller
USB XHCI 1.10
Bus usb@fd80: USB EHCI 1.00
scanning bus usb@fd00 for devices... cannot reset port 1!?
2 USB Device(s) found
scanning
On 2023/2/17 19:58, Jagan Teki wrote:
From: Manoj Sai
Select the DM_REGULATOR_FIXED on RK3568 platform.
Co-developed-by: Suniel Mahesh
Signed-off-by: Suniel Mahesh
Signed-off-by: Manoj Sai
Reviewed-by: Kever Yang
Thanks,
- Kever
---
arch/arm/mach-rockchip/Kconfig | 1 +
1 file chan
On 2023/2/17 19:58, Jagan Teki wrote:
From: Jagan Teki
Add driver supporting pin multiplexing on rk3568 platform.
Co-developed-by: Manoj Sai
Signed-off-by: Manoj Sai
Co-developed-by: Jianqun Xu
Signed-off-by: Jianqun Xu
Signed-off-by: Jagan Teki
Reviewed-by: Kever Yang
Thanks,
- Keve
On 2023/2/17 19:58, Jagan Teki wrote:
From: Jagan Teki
combphy1 is failing to probe due to unhandled assigned-clocks and
assigned-clocks-rates.
=> usb start
starting USB...
Bus usb@fd00: Failed to get PHY1 for usb@fd00
Port not available.
Bus usb@fd80: USB EHCI 1.00
There is no
On 2023/2/17 19:58, Jagan Teki wrote:
From: Jagan Teki
RK3568 has three combo phys, and PCIe/USB3/SATA/QSGMII controllers
share one pipe interface for each combo phy, here is the diagram
of the complex connection.
++
|| +--+
| USB3 OTG CTRL0 |>|
On 2023/2/17 19:58, Jagan Teki wrote:
From: Manoj Sai
RK3568 has two USB 2.0 PHYs, and each PHY has two ports, the OTG port
of PHY0 support OTG mode with charging detection function, they are
similar to previous Rockchip SoCs.
However, there are three different designs for RK3568 USB 2.0 PHY
On 2023/2/17 19:58, Jagan Teki wrote:
New Rockchip devices have the usb phy nodes as standalone devices.
These nodes have register nodes with #address_cells = 2, but only
use 32 bit addresses.
Adjust the driver to check if the returned address is "0", and adjust
the index in that case.
Derive
On 2023/2/17 19:58, Jagan Teki wrote:
Radxa Compute Module 3(CM3) IO board an application board from Radxa
and is compatible with Raspberry Pi CM4 IO form factor.
Specification:
- 1x HDMI,
- 2x MIPI DSI
- 2x MIPI CSI2
- 1x eDP
- 1x PCIe card
- 2x SATA
- 2x USB 2.0 Host
- 1x USB 3.0
- 1x USB 2.
On 2023/2/17 19:58, Jagan Teki wrote:
Like other rockchip SoCs, DM_RESET is useful across rk3568
platform.
Select it from arch kconfig.
Signed-off-by: Jagan Teki
Reviewed-by: Kever Yang
Thanks,
- Kever
---
arch/arm/mach-rockchip/Kconfig | 1 +
configs/evb-rk3568_defconfig | 1 -
2
> Date: Tue, 21 Feb 2023 01:46:22 +0100
> From: Marek Vasut
Hi Marek,
> On 2/21/23 00:45, Simon Glass wrote:
> > On Sat, 21 Jan 2023 at 12:28, Mark Kettenis wrote:
> >>
> >> When a system has multiple XHCI controllers, some of the
> >> properties described in the descriptor of the root hub (suc
On 2023/1/30 22:57, Jagan Teki wrote:
Neural Compute Module 6(Neu6) IO board is an industrial form factor
ready-to-use IO board from Edgeble AI.
IO board offers plenty of peripherals and connectivity options and
this patch enables basic eMMC and UART which is enough to successfully
boot Linux.
On 2023/1/30 22:57, Jagan Teki wrote:
Neural Compute Module 6(Neu2) is a 96boards SoM-CB compute module
based on Rockchip RK3588 from Edgeble AI.
General features:
- Rockchip RK3588
- up to 32GB LPDDR4x
- up to 128GB eMMC
- 2x MIPI CSI2 FPC
On module WiFi6/BT5 is available in the following Ne
On 2023/2/19 23:06, Jonas Karlman wrote:
Latest vendor TPL for RK3328 has grown past the current init size limit
of 28KiB and the current init size limit for RK3568 of 76KiB is too big
to fit in 64KiB SRAM.
Sync init size limit from vendor u-boot for the following SoCs:
rk3328: 30KiB (+2KiB
>> If it is right or wrong to use that as an MTD is a matter of opinion.
>
> I am still hoping the MTD maintainer would provide input here.
I might be missing something, but what is the reasoning here, to add this
to the mtd subsystem? One is saving space, but I agree with Marek, this
isn't a val
On 2/21/23 00:47, Mark Kettenis wrote:
From: Eugen Hristev
Date: Thu, 16 Feb 2023 15:29:05 +0200
RK3588 has two memory gaps when using 16 GiB DRAM size:
[0x3fc00 , 0x3fc50]
and
[0x3fff0 , 0x3]
If the kernel is agnostic to these gaps, accessing the area causes
a SError panic
Greetings! Did buildman run smoothly?
I have fixed DSI support and DC related patches are already sent.
Best regards,
Svyatoslav R.
пт, 17 лют. 2023 р. о 18:27 Tom Warren пише:
>
> OK, now it's working fine on top of u-boot-tegra/master, and rebasing that
> result against u-boot/master TOT is
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