On Sat, 2 Sept 2023 at 06:09, Simon Glass wrote:
> Hi Maxim,
>
> On Fri, 1 Sept 2023 at 08:49, Maxim Uvarov
> wrote:
> >
> >
> >
> > On Wed, 23 Aug 2023 at 00:58, Simon Glass wrote:
> >>
> >> Hi Maxim,
> >>
> >> On Tue, 22 Aug 2023 at 03:39, Maxim Uvarov
> wrote:
> >> >
> >> > U-Boot recently
On Mon, Aug 28, 2023 at 06:49:36PM +0900, Chanho Park wrote:
> Below warning can be occurred when CONFIG_BOOTSTAGE and
> !CONFIG_SPL_BOOTSTAGE. It should be guarded by using CONFIG_IS_ENABLED
> for SPL build.
>
> arch/riscv/lib/bootm.c:46:9: warning: implicit declaration of
> function 'bootstage_r
On Fri, Aug 25, 2023 at 12:25:21AM +0800, Shengyu Qu wrote:
> SPL_SYS_MALLOC_CLEAR_ON_INIT would enable SYS_MALLOC_CLEAR_ON_INIT by
> default, but that's not need on JH7110, so disable that.
>
> Signed-off-by: Shengyu Qu
> ---
> configs/starfive_visionfive2_defconfig | 2 ++
> 1 file changed, 2
On Fri, Aug 25, 2023 at 12:25:20AM +0800, Shengyu Qu wrote:
> Starfive JH7110 needs to clear L2 LIM to zero before use or ECC error
> would be triggered. Currently, we use DDR ram for SPL malloc arena on
> Visionfive 2 board in defconfig, but it's also possible to use L2 LIM as
> SPL malloc arena.
On Fri, Aug 11, 2023 at 04:12:25PM +0900, Seung-Woo Kim wrote:
> fdt_fixup_ethernet() sets eth0 mac address from ethaddr. Set
> ethaddr to environment instead of eth0addr.
>
> Signed-off-by: Seung-Woo Kim
> ---
> board/starfive/visionfive2/visionfive2-i2c-eeprom.c | 2 +-
> 1 file changed, 1 ins
On Mon, Aug 14, 2023 at 06:05:33PM +0200, Torsten Duwe wrote:
> The JH7110 has the arhitectural CPU timer on all 5 rv64 cores.
> Note that in the device tree.
>
> Signed-off-by: Torsten Duwe
> ---
> arch/riscv/dts/jh7110.dtsi | 9 +
> 1 file changed, 9 insertions(+)
Reviewed-by: Leo Yu-
On Mon, Aug 14, 2023 at 06:05:28PM +0200, Torsten Duwe wrote:
> For the architectural timer on riscv, there already is a defined
> device tree binding[1]. Allow timer instances to be created from
> device tree matches, but for now retain the old mechanism, which
> registers the timer biggy-back wit
Hi Nishanth,
On 14:15-20230901, Nishanth Menon wrote:
> On 12:32-20230901, Manorit Chawdhry wrote:
> > The documentation is based off J7200 documentation tailored for J721S2.
>
> You can drop the documentation based off j7200... Just state this
> documentation is for J721S2.
>
> >
> > TRM for J
On Sat, Aug 19, 2023 at 03:12:50PM +0200, Heinrich Schuchardt wrote:
> Use the DBCN SBI extension to implement a debug console.
> Make it the default for S-mode RISC-V.
>
> Signed-off-by: Heinrich Schuchardt
> ---
> drivers/serial/Kconfig | 3 ++-
> drivers/serial/serial_sbi.c | 19 +++
On Sat, Aug 19, 2023 at 03:12:49PM +0200, Heinrich Schuchardt wrote:
> The DBCN extension provides a Console Write Byte call.
> Implement function sbi_dbcn_write_byte to invoke it.
>
> Signed-off-by: Heinrich Schuchardt
> ---
> arch/riscv/include/asm/sbi.h | 1 +
> arch/riscv/lib/sbi.c
Hi Simon,
On Thu, Aug 17, 2023 at 9:58 AM Simon Glass wrote:
>
> This driver is not actually built since a Kconfig was never created for
> it.
>
> Add a Kconfig (which is already implied by COREBOOT) and update the
> implementation to avoid using unnecessary memory. Drop the #ifdef at the
> top s
Hi Simon,
On Thu, Aug 17, 2023 at 9:58 AM Simon Glass wrote:
>
> This changed a few years ago to include an overflow flag. Bring in the
> new structure.
s/This/Coreboot
"Bring in the new structure" does not sound correct to me. The
structure is not changed. It's adding a comment block and some
Hi Massimo,
On 2023/9/3 18:04, Massimo Pegorer wrote:
Il giorno sab 2 set 2023 alle ore 18:32 Massimo Pegorer
ha scritto:
There is no support to initialize DRAM on RK3308 SoC using U-Boot
TPL and therefore an external TPL binary must be used to generate
a bootable u-boot-rockchip.bin image.
I
Display the STMicroelectronics logo with features VIDEO_LOGO and
SPLASH_SCREEN on stm32f469-disco board.
Signed-off-by: Dario Binacchi
---
configs/stm32f469-discovery_defconfig | 3 +++
include/configs/stm32f469-discovery.h | 2 ++
tools/logos/stm32f469-discovery.bmp | Bin 0 -> 18532 byt
Add support to Orise Tech OTM8009A display on stm32f469-disco board.
It was necessary to retrieve the framebuffer address from the device tree
because the address returned by the video-uclass driver pointed to a memory
area that was not usable.
Furthermore, unlike Linux, the DSI driver requires t
As described in [1], the "clocks" property contains "a phandle to the
clock device node, an index selecting between gated clocks (0) and other
clocks (1), and an index specifying the clock to use." The current version
of the clock driver, unlike the kernel, is currently able to properly
handle node
As described in [1], the "clocks" property contains "a phandle to the
clock device node, an index selecting between gated clocks (0) and other
clocks (1), and an index specifying the clock to use." The current version
of the clock driver, unlike the kernel, is currently able to properly
handle node
Sync the devicetree with linux 6.5 for stm32f746-disco board.
Signed-off-by: Dario Binacchi
---
arch/arm/dts/stm32f469-disco.dts | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/dts/stm32f469-disco.dts b/arch/arm/dts/stm32f469-disco.dts
index 6e0ffc1903be..c9acab
The series adds support for the Orise Tech OTM8009A display on the
stm32f469-disco board. Substantial differences in the drivers for clock
management, LTDC and DSI compared to Linux, made it necessary to modify
the device tree. These changes were made in stm32f469-disco-uboot.dtsi to
avoid altering
The patch applies the changes from Linux commit 10a970bc3ebfa ("ARM: dts:
stm32: support display on stm32f746-disco board") and removes the same
settings from stm32f746-disco-u-boot.dtsi.
Signed-off-by: Dario Binacchi
---
arch/arm/dts/stm32f746-disco-u-boot.dtsi | 89 ++--
commit 0637e66f8250c61f75042131fcb7f88ead2ad436 Linux upstream.
Add pin configurations for using i2c3 controller on stm32f7.
Signed-off-by: Dario Binacchi
Signed-off-by: Alexandre Torgue
---
arch/arm/dts/stm32f7-pinctrl.dtsi | 10 ++
1 file changed, 10 insertions(+)
diff --git a/arch
commit e4e724099f04072053cf411456e3e9aae48c4af1 Linux upstream.
In the schematics of document UM1907, the power supply for the micro SD
card is the same 3v3 voltage that is used to power other devices on the
board. By generalizing the name of the voltage regulator, it can be
referenced by other no
commit ba287d1a0137702a224b1f48673d529257b3c4bf Linux upstream.
Add pin configurations for using LTDC (LCD-tft Display Controller) on
stm32f746-disco board.
Signed-off-by: Dario Binacchi
Reviewed-by: Raphaël Gallais-Pou
Signed-off-by: Alexandre Torgue
---
arch/arm/dts/stm32f7-pinctrl.dtsi |
The patch applies the changes from Linux commit 008ef8b3a1a00 ("Add LTDC
(Lcd-tft Display Controller) support") and removes the same settings
from stm32f746-disco-u-boot.dtsi.
Signed-off-by: Dario Binacchi
---
arch/arm/dts/stm32f746-disco-u-boot.dtsi | 18 ++
arch/arm/dts/stm32f
commit 7a5f349e592c254f3c1ac34665b6c3905576efc2 Linux upstream.
The patch replaces the number 12 with the appropriate numerical constant
already defined in the file stm32f7-rcc.h.
Signed-off-by: Dario Binacchi
Signed-off-by: Alexandre Torgue
---
arch/arm/dts/stm32f746.dtsi | 2 +-
1 file chan
commit f0215440069c4fb12958d2d321e05faa2708a11d Linux upstream.
The patch adds support for touchscreen on the stm32f746-disco board.
Signed-off-by: Dario Binacchi
Signed-off-by: Alexandre Torgue
---
arch/arm/dts/stm32f746-disco.dts | 19 ++-
1 file changed, 18 insertions(+), 1
commit 0920ccdf41e3078a4dd2567eb905ea154bc826e6 Linux upstream.
Add support for bxcan (Basic eXtended CAN controller) to STM32F746. The
chip contains three CAN peripherals, CAN1 and CAN2 in dual peripheral
configuration and CAN3 in single peripheral configuration:
- Dual CAN peripheral configurati
commit 011644249686f2675e142519cd59e81e04cfc231 Linux upstream.
Add pin configurations for using CAN controller on stm32f7.
Signed-off-by: Dario Binacchi
Link:
https://lore.kernel.org/all/20230427204540.3126234-4-dario.binac...@amarulasolutions.com
Signed-off-by: Marc Kleine-Budde
---
arch/a
commit 8f3ef556f8e1a670895f59ef3f01e4e26edd63e3 Linux upstream.
Add binding definition for CAN3 peripheral.
Signed-off-by: Dario Binacchi
Link:
https://lore.kernel.org/r/20230423172528.1398158-2-dario.binac...@amarulasolutions.com
Signed-off-by: Lee Jones
---
include/dt-bindings/mfd/stm32f7-
This series contains my patches on the device tree for stm32f746-disco board
that have already been merged into the Linux mainline. Since most of them
applied perfectly, and for the remaining ones, only minimal changes were made,
I preferred not to merge them into a single patch, which would have b
Enable the bootflow based on this bootmeth if the BootOrder EFI
variable is set.
Signed-off-by: Mark Kettenis
---
ChangeLog:
v2: - Initialize EFI subsystem to populate EFI variables
boot/bootmeth_efi_mgr.c | 17 -
1 file changed, 16 insertions(+), 1 deletion(-)
diff --git a/
I still have not received any reply from you.
On Wednesday 30 August 2023 20:14:59 Pali Rohár wrote:
> Simon, why you are contacting me? You have wrote to me that you would
> ignore my reviews here, so what you want now? Could you please explain
> what you are trying to achieve? I'm not going to r
You are not saying truth here, you are lying and you know it. mvebu
changes? ignored, no answer. ppc changes? ignored no answer in 10
months. mmc changes, no answer at all. rx-51 bug reports and regression
which you and your people broke? you wrote me: fuck you and fix it
yourself. So what does com
commit 559a6e75b4bcf0fc9e41d34865e72cf742f67d8e Linux upstream.
Add pin configurations for using CAN controller on stm32f469-disco
board. They are located on the Arduino compatible connector CN5 (CAN1)
and on the extension connector CN12 (CAN2).
Signed-off-by: Dario Binacchi
Link:
https://lore.
commit 6b443faa313c519db755ff90be32758fd9c66453 Linux upstream.
This is a preparation patch for the upcoming support to manage CAN
peripherals in single configuration.
The addition ensures backwards compatibility.
Signed-off-by: Dario Binacchi
Link:
https://lore.kernel.org/all/20230427204540.3
commit 7355ad1950f41e755e6dc451834be3b94f82acd4 Linux upstream.
Add support for bxcan (Basic eXtended CAN controller) to STM32F429. The
chip contains two CAN peripherals, CAN1 the primary and CAN2 the secondary,
that share some of the required logic like clock and filters. This means
that the seco
This series contains my patches on the device tree for stm32f429 platform
that have already been merged into the mainline of Linux. Since they applied
perfectly, I preferred not to merge them into a single patch, which would have
been less readable.
Dario Binacchi (3):
ARM: dts: stm32: add CAN
On Sun, Sep 03, 2023 at 12:09:39PM -0600, Simon Glass wrote:
> Hi Tom,
>
> On Fri, 1 Sept 2023 at 14:41, Tom Rini wrote:
> >
> > Currently, most sandbox runs take a long time (due to running so many
> > tests) while QEMu based test.py runs are fairly short. Split the
> > pipeline here so that we
On Sun, Sep 03, 2023 at 12:06:13PM -0600, Simon Glass wrote:
> Hi Tom,
>
> On Sun, 3 Sept 2023 at 10:42, Tom Rini wrote:
> >
> > On Thu, Aug 31, 2023 at 06:15:19PM -0600, Simon Glass wrote:
> > > Hi Tom,
> > >
> > > On Wed, 23 Aug 2023 at 09:14, Tom Rini wrote:
> > > >
> > > > On Wed, Aug 23, 20
On Fri, 1 Sept 2023 at 14:42, Tom Rini wrote:
>
> Both to aide in debugging of any test.py issues as well as to make it
> easier to split the current matrix in two, have a new job that creates
> and publishes the current wrapper script we use for test.py jobs.
>
> Signed-off-by: Tom Rini
> ---
>
Hi Tom,
On Fri, 1 Sept 2023 at 14:41, Tom Rini wrote:
>
> Currently, most sandbox runs take a long time (due to running so many
> tests) while QEMu based test.py runs are fairly short. Split the
> pipeline here so that we get more consistent average run times.
>
> Signed-off-by: Tom Rini
> ---
Hi Tom,
On Sun, 3 Sept 2023 at 10:42, Tom Rini wrote:
>
> On Thu, Aug 31, 2023 at 06:15:19PM -0600, Simon Glass wrote:
> > Hi Tom,
> >
> > On Wed, 23 Aug 2023 at 09:14, Tom Rini wrote:
> > >
> > > On Wed, Aug 23, 2023 at 07:42:03AM -0600, Simon Glass wrote:
> > >
> > > > When lmb runs out of spa
On Thu, Aug 31, 2023 at 06:15:19PM -0600, Simon Glass wrote:
> Hi Tom,
>
> On Wed, 23 Aug 2023 at 09:14, Tom Rini wrote:
> >
> > On Wed, Aug 23, 2023 at 07:42:03AM -0600, Simon Glass wrote:
> >
> > > When lmb runs out of space in its internal tables, it gives errors on
> > > every fs load operati
The 64-bit app is supported now, so update the documentation.
Signed-off-by: Simon Glass
---
doc/develop/uefi/u-boot_on_efi.rst | 26 +++---
1 file changed, 11 insertions(+), 15 deletions(-)
diff --git a/doc/develop/uefi/u-boot_on_efi.rst
b/doc/develop/uefi/u-boot_on_efi.r
Il giorno sab 2 set 2023 alle ore 18:32 Massimo Pegorer
ha scritto:
>
> There is no support to initialize DRAM on RK3308 SoC using U-Boot
> TPL and therefore an external TPL binary must be used to generate
> a bootable u-boot-rockchip.bin image.
>
> Imply ROCKCHIP_EXTERNAL_TPL by default for RK330
Hi Johan,
Il giorno dom 3 set 2023 alle ore 10:36 Johan Jonker
ha scritto:
>
>
>
> On 9/2/23 18:32, Massimo Pegorer wrote:
> > Update documentation about build steps for RK3308, using an external
> > TPL. Add RK3308 case to rST document. Add ROCK Pi S in the list of
> > supported boards.
> >
> >
On 9/2/23 18:32, Massimo Pegorer wrote:
> Update documentation about build steps for RK3308, using an external
> TPL. Add RK3308 case to rST document. Add ROCK Pi S in the list of
> supported boards.
>
> Signed-off-by: Massimo Pegorer
> ---
> doc/README.rockchip | 4 ++--
> doc/b
On 2023-08-03 18:11, Sean Anderson wrote:
> On 8/3/23 04:31, Xavier Drudis Ferran wrote:
>> El Mon, Jul 31, 2023 at 06:42:57PM -0400, Sean Anderson deia:
>>> This converts the mmc loader to spl_load. Legacy images are handled by
>>> spl_load (via spl_parse_image_header), so mmc_load_legacy can be
>
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