Hi Maxi,
I'd drop this from the series. It's useful in the long run, but let's just
get the minimum functionality in first
Thanks
/Ilias
On Fri, Sep 08, 2023 at 07:53:20PM +0600, Maxim Uvarov wrote:
> Allow to specify HTTP port instead of just using default for wget command.
>
> Signed-off-by: M
On Fri, Sep 08, 2023 at 07:53:12PM +0600, Maxim Uvarov wrote:
> U-Boot recently got support for an alternative network stack using LWIP.
> Replace ping command with the LWIP variant while keeping the output and
> error messages identical. ping uses lwIP contrib/apps/ping/ping.c code.
> Custom timeo
> 4 files changed, 128 insertions(+)
> create mode 100644 net/lwip/apps/http/Makefile
> create mode 100644 net/lwip/apps/http/lwip-wget.c
>
> diff --git a/include/net/lwip.h b/include/net/lwip.h
> index c9e2982a78..85f08343fd 100644
> --- a/include/net/lwip.h
> +++ b/include/net/lwip.h
> @@ -28,
> +
> +/*
> + * (C) Copyright 2023 Linaro Ltd.
> + */
> +
> +#include
> +#include
> +#include
> +#include
> +
> +#include "tftp_client.h"
> +#include "tftp_server.h"
> +#include
> +
> +#include
> +
> +#include
> +
> +static ulong daddr;
> +static ulong size;
> +
> +static void *tftp_open(co
On Fri, Sep 08, 2023 at 07:53:09PM +0600, Maxim Uvarov wrote:
> +
> +#include
> +#include
> +#include
> +
> +#include
> +#include
> +#include "lwip/timeouts.h"
> +
> +#include
> +#include
> +
> +#define DHCP_WAIT_MS 2000
Is this the time we wait for a dhcp reply? If so we should bump it to
On 9/13/2023 1:05 PM, Heinrich Schuchardt wrote:
>
>
> Am 13. September 2023 04:23:14 MESZ schrieb "Wu, Fei" :
>> On 9/5/2023 6:09 PM, Fei Wu wrote:
>>> In order to enable PCIe passthrough on qemu riscv, the physical memory
>>> range between 3GB and 4GB is reserved. Therefore if guest has 4GB ram
On Fri, Sep 08, 2023 at 07:53:08PM +0600, Maxim Uvarov wrote:
> U-Boot recently got support for an alternative network stack using LWIP.
> Replace dns command with the LWIP variant while keeping the output and
> error messages identical.
>
> Signed-off-by: Maxim Uvarov
> ---
> include/net/lwip.h
Am 13. September 2023 04:23:14 MESZ schrieb "Wu, Fei" :
>On 9/5/2023 6:09 PM, Fei Wu wrote:
>> In order to enable PCIe passthrough on qemu riscv, the physical memory
>> range between 3GB and 4GB is reserved. Therefore if guest has 4GB ram,
>> two ranges are created as [2G, 3G) and [4G, 7G), curr
For J7200, R5/SPL TI_SCI_POWER_DOMAIN should be
disabled as DM is a separate binary like other
SOC of J7* family.
Fixes: 02dff65efe70 ("configs: j7200_evm_r5: Add initial support")
Signed-off-by: Udit Kumar
---
configs/j7200_evm_r5_defconfig | 1 -
1 file changed, 1 deletion(-)
diff --git a/co
TI SOC has two clock domains CLK_TI_SCI and
CLK_K3. These are mutually exclusive.
Adding conditional check for CLK_TI_SCI
and CLK_K3 along with other associated configs options.
Suggested-by: Nishanth Menon
Signed-off-by: Udit Kumar
Reviewed-by: Nishanth Menon
---
drivers/clk/ti/Kconfig | 8 +
TI SOC has two power domain TI_SCI_POWER_DOMAIN and
TI_POWER_DOMAIN. These are mutually exclusive.
So adding rule to select one, in case defconfig enabled both.
Suggested-by: Nishanth Menon
Signed-off-by: Udit Kumar
Reviewed-by: Nishanth Menon
---
drivers/power/domain/Kconfig | 2 +-
1 file ch
This series, updates enabling mutually exclusive power and clock configs
for TI SOCs.
Sorry to push clock and power changes in one series,
managed by two maintainers. But In my quick grep,
I am not able to active PR raise from both trees.
So copying maintainers of clock and power for review.
Cha
On 9/5/2023 6:09 PM, Fei Wu wrote:
> In order to enable PCIe passthrough on qemu riscv, the physical memory
> range between 3GB and 4GB is reserved. Therefore if guest has 4GB ram,
> two ranges are created as [2G, 3G) and [4G, 7G), currently u-boot sets
> ram_top to 4G - 1 if the gd->ram_top is abo
From: Sean Edmond
Use the newly introduced common API fdt_fixup_kaslr_seed() in the
kaslrseed command.
Signed-off-by: Sean Edmond
---
cmd/kaslrseed.c | 22 --
1 file changed, 8 insertions(+), 14 deletions(-)
diff --git a/cmd/kaslrseed.c b/cmd/kaslrseed.c
index 8a1d8120cd..
From: Dhananjay Phadke
fdt_fixup_kaslr_seed() will update given ofnode with random seed value.
Source for random seed can be TPM or RNG driver in u-boot or sec
firmware (ARM).
Signed-off-by: Dhananjay Phadke
Signed-off-by: Sean Edmond
---
arch/arm/cpu/armv8/sec_firmware.c | 39 +++
From: Sean Edmond
Required to fix the following compile error when building sandbox:
/tmp/cci9ibby.ltrans21.ltrans.o: In function `do_cedit_load':
:(.text+0x601d): undefined reference to `oftree_dispose'
Signed-off-by: Sean Edmond
---
drivers/core/ofnode.c | 12 ++--
1 file changed, 6
From: Sean Edmond
There is a preference to use the "ofnode" API for FDT fixups
moving forward. The FDT fixup will usually be for the kernel FDT. To
fixup the kernel FDT with the ofnode API, it's required to set the
OFNODE_MULTI_TREE option.
To ensure existing users of kaslr fdt fixup are not i
From: Sean Edmond
This patch series creates a common API (fdt_fixup_kaslr_seed()) for
populating the kaslr seed in the DTB. Existing users (kaslrseed,
and ARMv8 sec firmware) have been updated to use this common API.
New functionality has been introduced to populate the kaslr using
the RNG. T
From: Dhananjay Phadke
Add support for KASLR seed from the RNG device. Invokes dm_rng_read()
API to read 8-bytes of random bytes. Performs the FDT fixup using event
spy. To enable use CONFIG_KASLR_RNG_SEED
Signed-off-by: Dhananjay Phadke
Signed-off-by: Drew Kluemke
Signed-off-by: Sean Edmond
> From: Simon Glass
> Date: Sun, 10 Sep 2023 13:13:16 -0600
>
> Hi Mark,
>
> On Sun, 10 Sept 2023 at 08:57, Mark Kettenis wrote:
> >
> > > From: Simon Glass
> > > Date: Thu, 7 Sep 2023 09:57:34 -0600
> > >
> > > Hi Mark,
> > >
> > > On Thu, 7 Sept 2023 at 07:08, Mark Kettenis
> > > wrote:
>
Am 12. September 2023 14:50:35 MESZ schrieb Marcel Ziswiler
:
>On Fri, 2023-09-08 at 16:35 +0530, Apurva Nandan wrote:
>> TI K3 J784S4 and AM69 SK are new additions to the K3 SoC family.
>> Add documentation about the J784S4 EVM and AM69 SK.
>>
>> Signed-off-by: Dasnavis Sabiya
>> Signed-off-
I've been testing the boostd for a few Marvell boards and seeing this
error on the Thecus N2350 (Marvell Armada 385, dual-core CPU). The
"bootflow scan scsi" command triggered the "CACHE: Misaligned
operation at range" error. However, this error did not affect the
result of the scan, i.e. the bootf
Hi Maxim,
On Tue, 12 Sept 2023 at 05:42, Maxim Uvarov wrote:
>
> On Fri, 8 Sept 2023 at 19:59, Tom Rini wrote:
>
> > On Fri, Sep 08, 2023 at 07:53:05PM +0600, Maxim Uvarov wrote:
> >
> > > Before apply these patches it is needed to create lwIP merge into
> > U-Boot:
> > > git subtree add --pref
Hi Michal,
On Mon, 11 Sept 2023 at 06:32, Michal Simek wrote:
>
> tputq() requires variables to have 64bit width that's why make them 64bit
> to clean alignment requirement.
>
> Signed-off-by: Michal Simek
> ---
>
> tools/proftool.c | 3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)
Rev
Hi Michal,
On Mon, 11 Sept 2023 at 06:32, Michal Simek wrote:
>
> Current alignment which is using 16 bytes is not correct in connection to
> trace_clocks description and it's length.
> That's why use start_addr variable and record proper size based on used
> entries.
>
> Fixes: be16fc81b2ed ("tr
On Mon, 11 Sept 2023 at 06:32, Michal Simek wrote:
>
> Flyrecord tracing data are page aligned that's why it is necessary to
> calculate alignment properly. Because trace_clocks description is the part
> of record length it is necessary to have information about length earlier.
>
> Signed-off-by:
On 9/12/23 06:01, Venkatesh Yadav Abbarapu wrote:
[ Piyush: Ported from Linux kernel commit
b84ba26c922a ("usb: dwc3: core: add external vBus
supply support for ulpi phy") ]
Some ULPI USB PHY does not support internal VBUS supply, to drive the CPEN
pin,
On 18:36-20230912, Udit Kumar wrote:
> For J7200, R5/SPL TI_SCI_POWER_DOMAIN should be
> disabled as DM is a separate binary like other
> SOC of J7* family.
>
> Fixes: 02dff65efe7 (configs: j7200_evm_r5: Add initial support)
Fixes: 02dff65efe70 ("configs: j7200_evm_r5:
On 18:36-20230912, Udit Kumar wrote:
> TI SOC has two clock domains CLK_TI_SCI and
> CLK_K3. These are mutually exclusive.
>
> Adding conditional check for CLK_TI_SCI
> and CLK_K3 along with other associated configs options.
>
> Suggested-by: Nishanth Menon
> S
On 18:36-20230912, Udit Kumar wrote:
> TI SOC has two power domain TI_SCI_POWER_DOMAIN and
> TI_POWER_DOMAIN. These are mutually exclusive.
> So adding rule to select one, in case defconfig enabled both.
>
> Suggested-by: Nishanth Menon
> Signed-off-by: Udit Kumar
> ---
&g
On Sat, Sep 02, 2023 at 09:35:21AM +0200, Heinrich Schuchardt wrote:
> Rename disk_partition_type_uuid to disk_partition_type_guid.
>
> Provide function descriptions for the getter and setter.
>
> Fixes: bcd645428c34 ("part: Add accessors for struct disk_partition
> type_uuid")
> Signed-off-by:
On Thu, Aug 31, 2023 at 10:51:36AM -0600, Joshua Watt wrote:
> Re-create a clean disk image for each test to prevent modifications from
> one test affecting another
>
> Signed-off-by: Joshua Watt
For the series, applied to u-boot/next, thanks!
--
Tom
signature.asc
Description: PGP signature
From: Fabio Estevam
Trying to boot a fitImage after a successful hab_auth_img operation
causes the following error:
## Loading kernel from FIT Image at 8800 ...
Using 'conf-imx7d-smegw01.dtb' configuration
Trying 'kernel-1' kernel subimage
Description: Linux kernel
Type:
Hi Mark,
On Mon, 11 Sept 2023 at 14:25, Mark Kettenis wrote:
>
> > From: Simon Glass
> > Date: Sun, 10 Sep 2023 16:36:48 -0600
> >
> > Hi,
> >
> > On Wed, 6 Sept 2023 at 15:50, Janne Grunau wrote:
> > >
> > > Apple's M2 Ultra SoC are somewhat similar to the M1 Ultra but needs
> > > a tweaked me
On Thu, 27 Jul 2023 at 19:51, Simon Glass wrote:
>
> Hi Dan,
>
> On Thu, 27 Jul 2023 at 04:56, Dan Carpenter wrote:
> >
> > On Wed, Jul 26, 2023 at 06:49:44PM -0600, Simon Glass wrote:
> > > Hi Dan,
> > >
> > > On Tue, 25 Jul 2023 at 09:40, Dan Carpenter
> > > wrote:
> > > >
> > > > The > compa
Hi Simon,
On 11/09/23 04:44, Simon Glass wrote:
> Hi Devarsh,
>
> On Thu, 17 Aug 2023 at 09:10, Tom Rini wrote:
>>
>> On Wed, Aug 16, 2023 at 09:16:05PM +0530, Devarsh Thakkar wrote:
>>> Hi Simon,
>>>
>>> On 15/08/23 20:14, Simon Glass wrote:
Hi Devarsh,
On Tue, 15 Aug 2023 at 03:
For J7200, R5/SPL TI_SCI_POWER_DOMAIN should be
disabled as DM is a separate binary like other
SOC of J7* family.
Fixes: 02dff65efe7 (configs: j7200_evm_r5: Add initial support)
Signed-off-by: Udit Kumar
---
configs/j7200_evm_r5_defconfig | 1 -
1 file changed, 1 deletion(-)
diff --git a/confi
TI SOC has two clock domains CLK_TI_SCI and
CLK_K3. These are mutually exclusive.
Adding conditional check for CLK_TI_SCI
and CLK_K3 along with other associated configs options.
Suggested-by: Nishanth Menon
Signed-off-by: Udit Kumar
---
drivers/clk/ti/Kconfig | 8
1 file changed, 4 in
This series, updates enabling mutually exclusive power and clock configs
for TI SOCs.
Sorry to push clock and power changes in one series,
managed by two maintainers. But In my quick grep,
I am not able to active PR raise from both trees.
So copying maintainers of clock and power for review.
Cha
TI SOC has two power domain TI_SCI_POWER_DOMAIN and
TI_POWER_DOMAIN. These are mutually exclusive.
So adding rule to select one, in case defconfig enabled both.
Suggested-by: Nishanth Menon
Signed-off-by: Udit Kumar
---
drivers/power/domain/Kconfig | 2 +-
1 file changed, 1 insertion(+), 1 dele
On Fri, 2023-09-08 at 16:35 +0530, Apurva Nandan wrote:
> TI K3 J784S4 and AM69 SK are new additions to the K3 SoC family.
> Add documentation about the J784S4 EVM and AM69 SK.
>
> Signed-off-by: Dasnavis Sabiya
> Signed-off-by: Apurva Nandan
> ---
> board/ti/j784s4/MAINTAINERS | 1 +
> doc/b
On 12:20-20230912, Marcel Ziswiler wrote:
[...]
> > diff --git a/arch/arm/dts/k3-am69-r5-sk.dts b/arch/arm/dts/k3-am69-r5-sk.dts
> > new file mode 100644
> > index 00..8c789c4f28valuation module (EVM) is a pl
> > --- /dev/null
> > +++ b/arch/arm/dts/k3-am6
On 12:10-20230912, Marcel Ziswiler wrote:
> On Fri, 2023-09-08 at 16:35 +0530, Apurva Nandan wrote:
> > From: Dasnavis Sabiya
> >
> > Introduce the basic am69-sk evm dts from the next-20230905 tag of the
> > linux kernel.
> >
> > Signed-off-by: Dasnavis S
On 11:21-20230912, Marcel Ziswiler wrote:
> On Fri, 2023-09-08 at 16:35 +0530, Apurva Nandan wrote:
> > Add support for J784S4 SoC Identification.
> >
> > Signed-off-by: Hari Nagalla
> > Signed-off-by: Apurva Nandan
> > ---
> > arch/arm/mach-k3/include
On 13:06-20230907, Reid Tonking wrote:
> The ti,j7200-vtm and ti,j721e-vtm compatibles are used for voltage
> and thermal monitoring (VTM) by (drivers/thermal/k3_j72xx_bandgap.c)
> in Linux, but the same hardware is used for adaptive voltage scaling
> (AVS) in u-boot, This brings both drivers in li
On Fri, 2023-09-08 at 16:35 +0530, Apurva Nandan wrote:
> From: Dasnavis Sabiya
>
> Introduce the base dts files needed for u-boot or to augment the linux
> dtbs for use in the u-boot-spl and u-boot binaries.
>
> Signed-off-by: Dasnavis Sabiya
> Signed-off-by: Apurva Nandan
> ---
> arch/arm/d
On lun., sept. 11, 2023 at 09:02, Nishanth Menon wrote:
> Sync device tree with v6.6-rc1
>
> Signed-off-by: Nishanth Menon
Reviewed-by: Mattijs Korpershoek
> ---
> arch/arm/dts/k3-am62-main.dtsi | 52 -
> arch/arm/dts/k3-am62-mcu.dtsi| 24 +
> arch/arm/dts/k3-am62
On Fri, 2023-09-08 at 16:35 +0530, Apurva Nandan wrote:
> From: Dasnavis Sabiya
>
> Introduce the basic am69-sk evm dts from the next-20230905 tag of the
> linux kernel.
>
> Signed-off-by: Dasnavis Sabiya
> Signed-off-by: Apurva Nandan
> ---
> arch/arm/dts/Makefile | 3 +-
> arch/arm/
On lun., sept. 11, 2023 at 09:02, Nishanth Menon wrote:
> Sync pinctrl header with v6.6-rc1
>
> Signed-off-by: Nishanth Menon
Reviewed-by: Mattijs Korpershoek
> ---
> arch/arm/dts/k3-pinctrl.h | 12
> 1 file changed, 12 insertions(+)
>
> diff --git a/arch/arm/dts/k3-pinctrl.h b/
On Fri, 8 Sept 2023 at 19:59, Tom Rini wrote:
> On Fri, Sep 08, 2023 at 07:53:05PM +0600, Maxim Uvarov wrote:
>
> > Before apply these patches it is needed to create lwIP merge into
> U-Boot:
> > git subtree add --prefix net/lwip/lwip-external
> https://git.savannah.nongnu.org/git/lwip.git maste
On Fri, 2023-09-08 at 16:35 +0530, Apurva Nandan wrote:
> Add support for DMA in J784S4 SoC.
>
> Signed-off-by: Jayesh Choudhary
> Signed-off-by: Hari Nagalla
> Signed-off-by: Apurva Nandan
> ---
> drivers/dma/ti/Makefile | 1 +
> drivers/dma/ti/k3-psil-j784s4.c | 166 +++
On Fri, 2023-09-08 at 16:35 +0530, Apurva Nandan wrote:
> Add clk and device data which can be used by respective drivers
> to configure clocks and PSC.
>
> Signed-off-by: Hari Nagalla
> Signed-off-by: Apurva Nandan
> ---
> arch/arm/mach-k3/j784s4/Makefile | 5 +
> arch/arm/mach-k3/j784
Hi all,
Warm greetings all.
I working on enabling RAM test as POST operation in u-boot 2022, for the imx8mp
processor board.
Can you suggest me how to make things work.
Any leads are appreciated.
Regards,
Lavakumar S
GE CommonOs & Platforms
[ Piyush: Ported from Linux kernel commit
b84ba26c922a ("usb: dwc3: core: add external vBus
supply support for ulpi phy") ]
Some ULPI USB PHY does not support internal VBUS supply, to drive the CPEN
pin, which requires the configuration of the ULPI DRVVBUS
The xhci host controller driver trying to queue the URB's and it is
getting halted at the endpoint, thereby hitting the BUG_ON's.
Mostly these kind of random issues are seen on faulty boards.
Removing these BUG_ON's from the U-Boot xhci code, as in Linux kernel
xhci code BUG_ON/BUG's are removed en
For reference clocks, PM_CLK_GET_PARENT call is not allowed.
PM_CLK_GET_PARENT only allowed for MUX clocks. Rename the
versal_clock_ref() with versal_clock_get_ref_rate() for better
readability. Fix the versal_clock_get_ref_rate function by
passing the parent_id, and check whether the parent_id
bel
On Fri, 2023-09-08 at 16:35 +0530, Apurva Nandan wrote:
> Add support for J784S4 SoC Identification.
>
> Signed-off-by: Hari Nagalla
> Signed-off-by: Apurva Nandan
> ---
> arch/arm/mach-k3/include/mach/hardware.h | 1 +
> drivers/soc/soc_ti_k3.c | 3 +++
> 2 files changed, 4 in
On Fri, 2023-09-08 at 16:35 +0530, Apurva Nandan wrote:
> Add j784s4 initialization files for initial SPL boot.
>
> Signed-off-by: Hari Nagalla
> [ add firewall configurations and change the R5 MCU scratchpad ]
> Signed-off-by: Manorit Chawdhry
> Signed-off-by: Dasnavis Sabiya
> Signed-off-by:
On Fri, 2023-09-08 at 16:35 +0530, Apurva Nandan wrote:
> Hello Everyone!
>
> This series will introduce basic support (SD and UART) support for Texas
> Instruments J784S4 EVM.
>
> The J784S4 SoC device tree patches are taken from kernel patch submissions
> and will be updated as they are accepte
Out-of-tree users could run an out-of-tree CI with limited coverage,
however it is convenient to be able to run the upstream CI from time
to time. To enable that we would need to change job rules to be able
to run on any GitLab event. Excerpt from GitLab documentation:
> Jobs with no rules default
Hi Nishanth
On 11/09/23 16:53, Nishanth Menon wrote:
On 19:44-20230907, Neha Malcom Francis wrote:
Sync k3-j721e DTS with kernel.org v6.5-rc1.
Signed-off-by: Neha Malcom Francis
[...]
This file has:
* tps659413 -> Should come in from upstream kernel please.
[...]
we have tps659412
Currently spi driver gets flash parameter from first subnode.
Few boards have more than one flash with different parameters
and selection of flash is done by on board switch settings.
In such case, uboot needs to be recompiled with updated
device tree to align with board switch settings.
This pat
From: Sean Edmond
Add documentation for anti-rollback verification, optional properties in
FIT image, and UCLASS_ROLLBACK device.
Signed-off-by: Sean Edmond
---
doc/develop/driver-model/index.rst | 1 +
doc/develop/driver-model/rollback-info.rst | 42 +
doc/usage/fit/s
From: Sean Edmond
Adds a test for a sandbox and TPM backed rollback driver.
Allows for testing of anti-rollback version number get/set API using the
rollback driver.
Signed-off-by: Sean Edmond
---
arch/sandbox/dts/test.dts | 9 +
configs/sandbox_defconfig | 3 ++
test/dm/Makefile
From: Sean Edmond
The TPM 2.0 command reference shows "auth" (type TPM2B_AUTH) before
"publicInfo" (type TPM2B_NV_PUBLIC).
The TPM v2 driver was updated to add this field. The sandbox driver
needs to be updated to match the driver implementation.
Signed-off-by: Sean Edmond
---
drivers/tpm/tp
From: Stephen Carlson
This implementation of the rollback uclass driver allows existing TPM2
devices declared in the device tree to be referenced for storing the OS
anti-rollback counter, using the TPM2 non-volatile storage API. The
rollback device must be a child of the TPM device. For example
From: Stephen Carlson
Rollback devices currently implement operations to store an OS
anti-rollback monotonic counter. Existing devices such as the Trusted
Platform Module (TPM) already support this operation, but this uclass
provides abstraction for current and future devices that may support
dif
From: Sean Edmond
The TPM 2.0 command reference states that "auth" (type TPM2B_AUTH)
should come before "publicInfo" (type TPM2B_NV_PUBLIC) in the
"TPM2_NV_DefineSpace" command. Let's add an empty "auth" (size 0), so
that this can work with compliant TPMs.
Make sure that NV index used in tpm2_n
From: Stephen Carlson
New config CONFIG_FIT_ROLLBACK_CHECK_GRACE to add a one unit grace version
to OS anti-rollback protection, allowing images with anti-rollback
counters exactly one less than the platform value to still be loaded. No
update to the platform anti-rollback counter will be perform
From: Stephen Carlson
New config CONFIG_ROLLBACK_CHECK to enable enforcement of OS anti-rollback
counter during image loading.
Images with an anti-rollback counter value "rollback" declared in the FDT
will be compared against the current device anti-rollback counter value,
and older images will
From: Sean Edmond
Adds Add anti-rollback version protection. Images with an anti-rollback counter
value "rollback" declared in the kernel FDT will be compared against the
current device
anti-rollback counter value, and older images will not pass signature
validation. If the image is newer, the
Hi Udit
On 07/09/23 14:51, Udit Kumar wrote:
Currently spi driver gets flash parameter from first subnode.
Few boards have more than one flash with different parameters
and selection of flash is done by on board switch settings.
In such case, uboot needs to be recompiled with updated
device tre
Hi Kamlesh,
On 14:49-20230912, Kamlesh Gurudasani wrote:
> Manorit Chawdhry writes:
>
> > This is a start to firewall ATF and OP-TEE memory regions using the
> > firewalls present in K3 SoCs. Please give reviews as to what can be
> > better in the implementation.
> &
Manorit Chawdhry writes:
> This is a start to firewall ATF and OP-TEE memory regions using the
> firewalls present in K3 SoCs. Please give reviews as to what can be
> better in the implementation.
>
> Signed-off-by: Manorit Chawdhry
Hi Manorit, thanks for the patches.
I hope this solution is ea
On Mon, 2023-09-11 at 18:32, Jami Kettunen wrote:
> From: Jami Kettunen
>
> Used to select mainline kernel fdtfile based on board revision.
>
> Signed-off-by: Jami Kettunen
Tested-by: Milan P. Stanić
> ---
> configs/starfive_visionfive2_defconfig | 1 +
> 1 file changed, 1 insertion(+)
>
>
On Mon, 2023-09-11 at 18:32, Jami Kettunen wrote:
> From: Jami Kettunen
>
> Linux mainline kernel device tree files[1] are named:
> - jh7110-starfive-visionfive-2-v1.2a
> - jh7110-starfive-visionfive-2-v1.3b
>
> which should be selected accordingly by U-Boot to have a proper extlinux
> experienc
On Fri, Sep 08, 2023 at 07:53:06PM +0600, Maxim Uvarov wrote:
> Add initial documentation of lwIP network IP stack integration
> to the U-Boot (net_lwip.rst).
>
> Signed-off-by: Maxim Uvarov
> Reviewed-by: Simon Glass
> ---
> doc/develop/index.rst| 1 +
> doc/develop/net_lwip.rst | 75
On Sep 11, 2023 at 09:02:55 -0500, Nishanth Menon wrote:
> Sync pinctrl header with v6.6-rc1
>
> Signed-off-by: Nishanth Menon
> ---
> arch/arm/dts/k3-pinctrl.h | 12
> 1 file changed, 12 insertions(+)
>
> diff --git a/arch/arm/dts/k3-pinctrl.h b/arch/arm/dts/k3-pinctrl.h
> index c
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