The sequence erroneously launched the DDR controller
initialization before the pad muxing was done, causing
DRAM size computation to hang.
Configuring the pads first then launching DDR controller
initialization prevents the DRAM hanging.
Signed-off-by: Albert ARIBAUD (3ADEV) <albert.a
not apply, as target configs in this file
never have descriptions.
Albert ARIBAUD (3ADEV) (6):
pcm052: fix MTD partitioning
pcm052: remove target-specific dtb name from env
pcm052: add 'm4go' command
tools: mkimage: add support for Vybrid image format
pcm052: allow specifying onboard DDR
Signed-off-by: Albert ARIBAUD (3ADEV) <albert.arib...@3adev.fr>
---
arch/arm/Kconfig | 4 ++
arch/arm/dts/Makefile| 3 +-
arch/arm/dts/bk4r1.dts | 48 +
arch/arm/dts/vf.dtsi | 4 +-
board/phytec/pcm052/Kconfig | 20 ++
board/
This format can be flashed directly at address 0 of
the NAND FLASH, as it contains all necessary headers.
Signed-off-by: Albert ARIBAUD (3ADEV) <albert.arib...@3adev.fr>
---
Makefile | 6 ++
arch/arm/config.mk| 3 +
arch/arm/cpu/armv7/vf610/Ma
PCM052 SoMs may be equipped with various sizes of DDR.
Keep default of 256MB; new PCM052-based targets will
specify their actual DDR size.
Linux command line is auto-adjusted to DDR size.
Signed-off-by: Albert ARIBAUD (3ADEV) <albert.arib...@3adev.fr>
---
board/phytec/pcm052/Kconf
Signed-off-by: Albert ARIBAUD (3ADEV) <albert.arib...@3adev.fr>
---
include/configs/pcm052.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/include/configs/pcm052.h b/include/configs/pcm052.h
index 302c7dd..1858662 100644
--- a/include/configs/pcm052.h
+++ b/include/c
Add the 'm4go' command to pcm052-based targets.
It loads scatter file images.
Signed-off-by: Albert ARIBAUD (3ADEV) <albert.arib...@3adev.fr>
---
board/phytec/pcm052/pcm052.c | 38 ++
1 file changed, 38 insertions(+)
diff --git a/board/phytec/pcm052/pc
arguments.
Signed-off-by: Albert ARIBAUD (3ADEV) <albert.arib...@3adev.fr>
---
include/configs/pcm052.h | 14 ++
1 file changed, 6 insertions(+), 8 deletions(-)
diff --git a/include/configs/pcm052.h b/include/configs/pcm052.h
index 57a7630..302c7dd 100644
--- a/include/configs/pc
what they really representing.
>
> The U-Boot version currently does not support RAW NAND write
> when using the HW ECC engine.
>
> Signed-off-by: Bhuvanchandra DV <bhuvanchandra...@toradex.com>
> Signed-off-by: Stefan Agner <ste...@agner.ch>
Tested-by: Albert
MTD partitioning in current pcm052 configuration is inconsistent.
Fix it across MTDPARTS_DEFAULT, CONFIG_EXTRA_ENV_SETTINGS, and
CONFIG_ENV_OFFSET[_REDUND].
Signed-off-by: Albert ARIBAUD (3ADEV) <albert.arib...@3adev.fr>
---
include/configs/pcm052.h
TFTP source and destination port variable names are
'tftpsrcp' and 'tftpdstp' in the code, but 'tftpsrcport'
and 'tftpdstport' in the README file. Fix the README.
Add environment variable 'tftptimeoutcountmax'. As per the
comments about the global variable tftp_timeout_count_max,
make sure
-by: Albert ARIBAUD (3ADEV) <albert.arib...@3adev.fr>
---
Changes in v2:
- Make MXC I2C1 and I2C2 optional
README| 8 ++--
drivers/i2c/mxc_i2c.c | 6 ++
include/configs/apf27.h | 2 ++
include/configs/aristainetos-common
-git a/board/phytec/pcm052/MAINTAINERS b/board/phytec/pcm052/MAINTAINERS
new file mode 100644
index 000..a877436
--- /dev/null
+++ b/board/phytec/pcm052/MAINTAINERS
@@ -0,0 +1,6 @@
+PCM052 BOARD
+M: Albert ARIBAUD (3ADEV) <albert.arib...@3adev.fr>
+S: Maintained
+F: board/phyte
The VF610 DDRMC driver code contains settings which are
board-specific. Move these out to boards so that new boards
can define their own without having to modify the driver.
Signed-off-by: Albert ARIBAUD (3ADEV) <albert.arib...@3adev.fr>
---
Changes in v2:
- reverted from all-custom to JED
the
comments about the global variable tftp_timeout_count_max,
make sure tftptimeoutcount is nonnegative.
Signed-off-by: Albert ARIBAUD (3ADEV) albert.arib...@3adev.fr
---
README | 8
net/tftp.c | 10 ++
2 files changed, 18 insertions(+)
diff --git a/README b/README
index
'. As per the
comments about the global variable tftp_timeout_count_max,
make sure tftptimeoutcountmax is nonnegative.
Signed-off-by: Albert ARIBAUD (3ADEV) albert.arib...@3adev.fr
---
Changes in v2: fixed env var name in commit message
README | 8
net/tftp.c | 10 ++
2 files
'. As per the
comments about the global variable tftp_timeout_count_max,
make sure tftptimeoutcountmax is nonnegative.
Signed-off-by: Albert ARIBAUD (3ADEV) albert.arib...@3adev.fr
---
Changes in v3:
- fixed mixup between tctp_timeout_count_max and timeout_count_max.
Changes in v2:
- fixed env var name
Hello Vladimir,
On Mon, 6 Jul 2015 07:22:09 +0300, Vladimir Zapolskiy v...@mleia.com
wrote:
This is an update to LPC32xx MAC driver, which needs to have small
quirks in order to properly work with an external phy connected by
RMII interface.
RMII mode of MAC operation is selected, if
This removes the following two warnings from buildman:
WARNING: no status info for 'cairo'
WARNING: no maintainers for 'cairo'
Signed-off-by: Albert ARIBAUD (3ADEV) albert.arib...@3adev.fr
---
board/quipos/cairo/MAINTAINERS | 6 ++
1 file changed, 6 insertions(+)
create
/phytec/pcm052/pcm052.c at line 98. It seems spurious to me,
as this construct has the exact same spacing as all others in the
file.
Albert ARIBAUD (3ADEV) (5):
net: fec_mxc: remove useless struct nbuf
vf610: refactor DDRMC code
i2c: fix vf610 support
tools: mkimage: fix imximage header size
., there is no way to detect a bug
occurrence, apart from the higher layer failure (e.g. TFTP
timeout). At this point I suspect this to be a silicon bug.
Patch-series: 1
Signed-off-by: Albert ARIBAUD (3ADEV) albert.arib...@3adev.fr
---
arch/arm/Kconfig | 5 +
board/phytec/pcm052/Kconfig
imximage header size is 4-byte, not 8-byte aligned.
This produces .imx images that a Vybrid cannot boot
on.
Fix by adding a padding field in header.
Signed-off-by: Albert ARIBAUD (3ADEV) albert.arib...@3adev.fr
---
tools/imximage.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/tools
The VF610 DDRMC driver code contains settings which are
board-specific. Move these out to boards so that new boards
can define their own without having to modify the driver.
Signed-off-by: Albert ARIBAUD (3ADEV) albert.arib...@3adev.fr
---
arch/arm/imx-common/ddrmc-vf610.c | 239
Add support in mxc_i2c driver, iomux_v3 and vf610 architecture for the four
I2C instances available in VF610.
Signed-off-by: Albert ARIBAUD (3ADEV) albert.arib...@3adev.fr
---
arch/arm/include/asm/arch-vf610/crm_regs.h| 3 +++
arch/arm/include/asm/arch-vf610/imx-regs.h| 3 +++
arch
This locally defined struct is actually only used once
and as an opaque type. Remove it for clarity.
Signed-off-by: Albert ARIBAUD (3ADEV) albert.arib...@3adev.fr
---
drivers/net/fec_mxc.c | 20 +---
1 file changed, 5 insertions(+), 15 deletions(-)
diff --git a/drivers/net
Signed-off-by: Albert ARIBAUD (3ADEV) albert.arib...@3adev.fr
---
Changes in v7:
- removed SRAM section and custom linker script
Changes in v6:
- added some missing readl() wraps
- moved descriptors and buffers to SRAM
Changes in v5: None
Changes in v4: None
Changes in v3: None
Changes in v2
The controller's Reed-Solomon ECC hardware is
used except of course for raw reads and writes.
It covers in- and out-of-band data together.
The SPL framework is supported.
Signed-off-by: Albert ARIBAUD (3ADEV) albert.arib...@3adev.fr
---
Changes in v7:
- rewrite SPL image load logic
Changes
'single flashable file' make target
Changes in v2:
- move from legacy to Driver Model support
- added MUX setting for SSP0
- cosmetic: added a blank line before copyright
- move boot image generation to mkimage framework
Albert ARIBAUD (3ADEV) (9):
lpc32xx: add Ethernet support
lpc32xx: mtd
This driver only supports Driver Model, not legacy model.
Signed-off-by: Albert ARIBAUD (3ADEV) albert.arib...@3adev.fr
---
Changes in v7: None
Changes in v6: None
Changes in v5: None
Changes in v4: None
Changes in v3:
- move DM dependency constraint into Kconfig
- move regs pointer and function
Signed-off-by: Albert ARIBAUD (3ADEV) albert.arib...@3adev.fr
---
Changes in v7: None
Changes in v6: None
Changes in v5: None
Changes in v4: None
Changes in v3: None
Changes in v2:
- cosmetic: added a blank line before copyright
drivers/hwmon/Makefile | 1 +
drivers/hwmon/ds620.c | 65
Reviewed-by: Jagannadha Sutradharudu Teki jagannadh.t...@gmail.com
Signed-off-by: Albert ARIBAUD (3ADEV) albert.arib...@3adev.fr
---
Changes in v7:
- fixed erroneous 'zynq' comment
Changes in v6: None
Changes in v5: None
Changes in v4: None
Changes in v3:
- move regs and functions in private
Signed-off-by: Albert ARIBAUD (3ADEV) albert.arib...@3adev.fr
---
Changes in v7: None
Changes in v6: None
Changes in v5: None
Changes in v4: None
Changes in v3: None
Changes in v2: None
arch/arm/cpu/arm926ejs/lpc32xx/devices.c | 11 ++
arch/arm/include/asm/arch-lpc32xx/clk.h | 4
introduce CONFIG_SPL_PANIC_ON_RAW_IMAGE.
An SPL which define this will panic() if the
image it has loaded does not have a mkimage
signature.
Signed-off-by: Albert ARIBAUD (3ADEV) albert.arib...@3adev.fr
---
Changes in v7: None
Changes in v6: None
Changes in v5: None
Changes in v4: None
Changes
)
- DACs (2 x MAX518)
- SPI (through SSP interface)
- Port expander MAX6957
- LCD display (HD44780-compatible), controlled
through the port expander and DACs
This board has SPL support, and uses the LPC32XX boot
image format.
Signed-off-by: Albert ARIBAUD (3ADEV) albert.arib...@3adev.fr
Signed-off-by: Albert ARIBAUD (3ADEV) albert.arib...@3adev.fr
---
Changes in v7: None
Changes in v6: None
Changes in v5: None
Changes in v4: None
Changes in v3:
- remove script/Makefile.spl change
Changes in v2:
- move boot image generation to mkimage framework
common/image.c | 1
Signed-off-by: Albert ARIBAUD (3ADEV) albert.arib...@3adev.fr
---
Changes in v6:
- added some missing readl() wraps
- moved descriptors and buffers to SRAM
Changes in v5: None
Changes in v4: None
Changes in v3: None
Changes in v2: None
arch/arm/cpu/arm926ejs/lpc32xx/cpu.c | 9
line before copyright
- move boot image generation to mkimage framework
Albert ARIBAUD (3ADEV) (8):
lpc32xx: add Ethernet support
lpc32xx: mtd: nand: add MLC NAND controller
lpc32xx: i2c: add LPC32xx I2C interface support
lpc32xx: add GPIO support
lpc32xx: add LPC32xx SSP support (SPI
This driver only supports Driver Model, not legacy model.
Signed-off-by: Albert ARIBAUD (3ADEV) albert.arib...@3adev.fr
---
Changes in v6: None
Changes in v5: None
Changes in v4: None
Changes in v3:
- move DM dependency constraint into Kconfig
- move regs pointer and function cache into private
Signed-off-by: Albert ARIBAUD (3ADEV) albert.arib...@3adev.fr
---
Changes in v6: None
Changes in v5: None
Changes in v4: None
Changes in v3:
- remove script/Makefile.spl change
Changes in v2:
- move boot image generation to mkimage framework
common/image.c | 1 +
include/image.h
The controller's Reed-Solomon ECC hardware is
used except of course for raw reads and writes.
It covers in- and out-of-band data together.
The SPL framework is supported.
Signed-off-by: Albert ARIBAUD (3ADEV) albert.arib...@3adev.fr
---
Changes in v6:
- rewrite timeout loops
- fix bad block
Signed-off-by: Albert ARIBAUD (3ADEV) albert.arib...@3adev.fr
---
Changes in v6: None
Changes in v5: None
Changes in v4: None
Changes in v3: None
Changes in v2: None
arch/arm/cpu/arm926ejs/lpc32xx/devices.c | 11 ++
arch/arm/include/asm/arch-lpc32xx/clk.h | 4 +
arch/arm/include
Signed-off-by: Albert ARIBAUD (3ADEV) albert.arib...@3adev.fr
---
Changes in v6: None
Changes in v5: None
Changes in v4: None
Changes in v3:
- move regs and functions in private struct
Changes in v2:
- added MUX setting for SSP0
arch/arm/cpu/arm926ejs/lpc32xx/devices.c | 14 +++
arch/arm
Signed-off-by: Albert ARIBAUD (3ADEV) albert.arib...@3adev.fr
---
Changes in v6: None
Changes in v5: None
Changes in v4: None
Changes in v3: None
Changes in v2:
- cosmetic: added a blank line before copyright
drivers/hwmon/Makefile | 1 +
drivers/hwmon/ds620.c | 65
MAX518)
- SPI (through SSP interface)
- Port expander MAX6957
- LCD display (HD44780-compatible), controlled
through the port expander and DACs
This board has SPL support, and uses the LPC32XX boot
image format.
Signed-off-by: Albert ARIBAUD (3ADEV) albert.arib...@3adev.fr
---
Changes in v6
Signed-off-by: Albert ARIBAUD (3ADEV) albert.arib...@3adev.fr
---
Changes in v5: None
Changes in v4: None
Changes in v3:
- move regs and functions in private struct
Changes in v2:
- added MUX setting for SSP0
arch/arm/cpu/arm926ejs/lpc32xx/devices.c | 14 +++
arch/arm/include/asm/arch
This driver only supports Driver Model, not legacy model.
Signed-off-by: Albert ARIBAUD (3ADEV) albert.arib...@3adev.fr
---
Changes in v5: None
Changes in v4: None
Changes in v3:
- move DM dependency constraint into Kconfig
- move regs pointer and function cache into private struct
- discourage
Signed-off-by: Albert ARIBAUD (3ADEV) albert.arib...@3adev.fr
---
Changes in v5: None
Changes in v4: None
Changes in v3: None
Changes in v2: None
arch/arm/cpu/arm926ejs/lpc32xx/cpu.c | 9 +
arch/arm/cpu/arm926ejs/lpc32xx/devices.c | 7 +
arch/arm/include/asm/arch-lpc32xx
Signed-off-by: Albert ARIBAUD (3ADEV) albert.arib...@3adev.fr
---
Changes in v5: None
Changes in v4: None
Changes in v3: None
Changes in v2: None
arch/arm/cpu/arm926ejs/lpc32xx/devices.c | 11 ++
arch/arm/include/asm/arch-lpc32xx/clk.h | 4 +
arch/arm/include/asm/arch-lpc32xx
: added a blank line before copyright
- move boot image generation to mkimage framework
Albert ARIBAUD (3ADEV) (8):
lpc32xx: add Ethernet support
lpc32xx: mtd: nand: add MLC NAND controller
lpc32xx: i2c: add LPC32xx I2C interface support
lpc32xx: add GPIO support
lpc32xx: add LPC32xx SSP
The controller's Reed-Solomon ECC hardware is
used except of course for raw reads and writes.
It covers in- and out-of-band data together.
The SPL framework is supported.
Signed-off-by: Albert ARIBAUD (3ADEV) albert.arib...@3adev.fr
---
Changes in v5:
- switch to CONFIG_SYS_NAND_SELF_INIT
MAX518)
- SPI (through SSP interface)
- Port expander MAX6957
- LCD display (HD44780-compatible), controlled
through the port expander and DACs
This board has SPL support, and uses the LPC32XX boot
image format.
Signed-off-by: Albert ARIBAUD (3ADEV) albert.arib...@3adev.fr
---
Changes in v5
Signed-off-by: Albert ARIBAUD (3ADEV) albert.arib...@3adev.fr
---
Changes in v5: None
Changes in v4: None
Changes in v3:
- remove script/Makefile.spl change
Changes in v2:
- move boot image generation to mkimage framework
common/image.c | 1 +
include/image.h | 1 +
tools
Signed-off-by: Albert ARIBAUD (3ADEV) albert.arib...@3adev.fr
---
Changes in v5: None
Changes in v4: None
Changes in v3: None
Changes in v2:
- cosmetic: added a blank line before copyright
drivers/hwmon/Makefile | 1 +
drivers/hwmon/ds620.c | 65
- add a note re the hard-coded MAC address
- add 'single flashable file' make target
Changes in v2:
- move from legacy to Driver Model support
- added MUX setting for SSP0
- cosmetic: added a blank line before copyright
- move boot image generation to mkimage framework
Albert ARIBAUD (3ADEV) (8
Signed-off-by: Albert ARIBAUD (3ADEV) albert.arib...@3adev.fr
---
Changes in v4: None
Changes in v3: None
Changes in v2: None
arch/arm/cpu/arm926ejs/lpc32xx/cpu.c | 9 +
arch/arm/cpu/arm926ejs/lpc32xx/devices.c | 7 +
arch/arm/include/asm/arch-lpc32xx/config.h| 3 +
arch
Signed-off-by: Albert ARIBAUD (3ADEV) albert.arib...@3adev.fr
---
Changes in v4: None
Changes in v3: None
Changes in v2:
- cosmetic: added a blank line before copyright
drivers/hwmon/Makefile | 1 +
drivers/hwmon/ds620.c | 65 ++
include/dtt.h
The controller's Reed-Solomon ECC hardware is
used except of course for raw reads and writes.
It covers in- and out-of-band data together.
The SPL framework is supported.
Signed-off-by: Albert ARIBAUD (3ADEV) albert.arib...@3adev.fr
---
Changes in v4:
- remove two debugging statements
- add
Signed-off-by: Albert ARIBAUD (3ADEV) albert.arib...@3adev.fr
---
Changes in v4: None
Changes in v3:
- move regs and functions in private struct
Changes in v2:
- added MUX setting for SSP0
arch/arm/cpu/arm926ejs/lpc32xx/devices.c | 14 +++
arch/arm/include/asm/arch-lpc32xx/clk.h
Signed-off-by: Albert ARIBAUD (3ADEV) albert.arib...@3adev.fr
---
Changes in v4: None
Changes in v3: None
Changes in v2: None
arch/arm/cpu/arm926ejs/lpc32xx/devices.c | 11 ++
arch/arm/include/asm/arch-lpc32xx/clk.h | 4 +
arch/arm/include/asm/arch-lpc32xx/cpu.h | 2
MAX518)
- SPI (through SSP interface)
- Port expander MAX6957
- LCD display (HD44780-compatible), controlled
through the port expander and DACs
This board has SPL support, and uses the LPC32XX boot
image format.
Signed-off-by: Albert ARIBAUD (3ADEV) albert.arib...@3adev.fr
---
Changes in v4
This driver only supports Driver Model, not legacy model.
Signed-off-by: Albert ARIBAUD (3ADEV) albert.arib...@3adev.fr
---
Changes in v4: None
Changes in v3:
- move DM dependency constraint into Kconfig
- move regs pointer and function cache into private struct
- discourage readers from using
Signed-off-by: Albert ARIBAUD (3ADEV) albert.arib...@3adev.fr
---
Changes in v4: None
Changes in v3:
- remove script/Makefile.spl change
Changes in v2:
- move boot image generation to mkimage framework
common/image.c | 1 +
include/image.h | 1 +
tools/Makefile | 1
The controller's Reed-Solomon ECC hardware is
used except of course for raw reads and writes.
It covers in- and out-of-band data together.
The SPL framework is supported.
Signed-off-by: Albert ARIBAUD (3ADEV) albert.arib...@3adev.fr
---
Changes in v3: None
Changes in v2: None
arch/arm/cpu
the hard-coded MAC address
- add 'single flashable file' make target
Changes in v2:
- move from legacy to Driver Model support
- added MUX setting for SSP0
- cosmetic: added a blank line before copyright
- move boot image generation to mkimage framework
Albert ARIBAUD (3ADEV) (8):
lpc32xx: add
Signed-off-by: Albert ARIBAUD (3ADEV) albert.arib...@3adev.fr
---
Changes in v3: None
Changes in v2: None
arch/arm/cpu/arm926ejs/lpc32xx/cpu.c | 9 +
arch/arm/cpu/arm926ejs/lpc32xx/devices.c | 7 +
arch/arm/include/asm/arch-lpc32xx/config.h| 3 +
arch/arm/include/asm
MAX518)
- SPI (through SSP interface)
- Port expander MAX6957
- LCD display (HD44780-compatible), controlled
through the port expander and DACs
This board has SPL support, and uses the LPC32XX boot
image format.
Signed-off-by: Albert ARIBAUD (3ADEV) albert.arib...@3adev.fr
---
Changes in v3
Signed-off-by: Albert ARIBAUD (3ADEV) albert.arib...@3adev.fr
---
Changes in v3:
- remove script/Makefile.spl change
Changes in v2:
- move boot image generation to mkimage framework
common/image.c | 1 +
include/image.h | 1 +
tools/Makefile | 1 +
tools/lpc32xximage.c
This driver only supports Driver Model, not legacy model.
Signed-off-by: Albert ARIBAUD (3ADEV) albert.arib...@3adev.fr
---
Changes in v3:
- move DM dependency constraint into Kconfig
- move regs pointer and function cache into private struct
- discourage readers from using functions
Signed-off-by: Albert ARIBAUD (3ADEV) albert.arib...@3adev.fr
---
Changes in v3: None
Changes in v2: None
arch/arm/cpu/arm926ejs/lpc32xx/devices.c | 11 ++
arch/arm/include/asm/arch-lpc32xx/clk.h | 4 +
arch/arm/include/asm/arch-lpc32xx/cpu.h | 2 +
arch/arm/include/asm
Signed-off-by: Albert ARIBAUD (3ADEV) albert.arib...@3adev.fr
---
Changes in v3:
- move regs and functions in private struct
Changes in v2:
- added MUX setting for SSP0
arch/arm/cpu/arm926ejs/lpc32xx/devices.c | 14 +++
arch/arm/include/asm/arch-lpc32xx/clk.h | 3 +
arch/arm
Signed-off-by: Albert ARIBAUD (3ADEV) albert.arib...@3adev.fr
---
Changes in v3: None
Changes in v2:
- cosmetic: added a blank line before copyright
drivers/hwmon/Makefile | 1 +
drivers/hwmon/ds620.c | 65 ++
include/dtt.h | 15
Signed-off-by: Albert ARIBAUD (3ADEV) albert.arib...@3adev.fr
---
Changes in v2:
- move boot image generation to mkimage framework
common/image.c | 1 +
include/image.h | 1 +
scripts/Makefile.spl | 9 +++
tools/Makefile | 1 +
tools/lpc32xximage.c | 178
copyright
- move boot image generation to mkimage framework
Albert ARIBAUD (3ADEV) (8):
lpc32xx: add Ethernet support
lpc32xx: mtd: nand: add MLC NAND controller
lpc32xx: i2c: add LPC32xx I2C interface support
lpc32xx: add GPIO support
lpc32xx: add LPC32xx SSP support (SPI mode)
dtt: add ds620
Signed-off-by: Albert ARIBAUD (3ADEV) albert.arib...@3adev.fr
---
Changes in v2: None
arch/arm/cpu/arm926ejs/lpc32xx/devices.c | 11 ++
arch/arm/include/asm/arch-lpc32xx/clk.h | 4 +
arch/arm/include/asm/arch-lpc32xx/cpu.h | 2 +
arch/arm/include/asm/arch-lpc32xx
This driver only supports Driver Model, not legacy model.
Signed-off-by: Albert ARIBAUD (3ADEV) albert.arib...@3adev.fr
---
Changes in v2:
- move from legacy to Driver Model support
arch/arm/cpu/arm926ejs/lpc32xx/devices.c | 5 +
arch/arm/include/asm/arch-lpc32xx/gpio.h | 43 +
drivers
Signed-off-by: Albert ARIBAUD (3ADEV) albert.arib...@3adev.fr
---
Changes in v2: None
arch/arm/cpu/arm926ejs/lpc32xx/cpu.c | 9 +
arch/arm/cpu/arm926ejs/lpc32xx/devices.c | 7 +
arch/arm/include/asm/arch-lpc32xx/config.h| 3 +
arch/arm/include/asm/arch-lpc32xx
The controller's Reed-Solomon ECC hardware is
used except of course for raw reads and writes.
It covers in- and out-of-band data together.
The SPL framework is supported.
Signed-off-by: Albert ARIBAUD (3ADEV) albert.arib...@3adev.fr
---
Changes in v2: None
arch/arm/cpu/arm926ejs/lpc32xx
Signed-off-by: Albert ARIBAUD (3ADEV) albert.arib...@3adev.fr
---
Changes in v2:
- added MUX setting for SSP0
arch/arm/cpu/arm926ejs/lpc32xx/devices.c | 14 +++
arch/arm/include/asm/arch-lpc32xx/clk.h | 3 +
arch/arm/include/asm/arch-lpc32xx/sys_proto.h | 1 +
drivers/spi
Signed-off-by: Albert ARIBAUD (3ADEV) albert.arib...@3adev.fr
---
Changes in v2:
- cosmetic: added a blank line before copyright
drivers/hwmon/Makefile | 1 +
drivers/hwmon/ds620.c | 65 ++
include/dtt.h | 15 ++--
3 files
MAX518)
- SPI (through SSP interface)
- Port expander MAX6957
- LCD display (HD44780-compatible), controlled
through the port expander and DACs
This board has SPL support, and uses the LPC32XX boot
image format.
Signed-off-by: Albert ARIBAUD (3ADEV) albert.arib...@3adev.fr
---
Changes in v2
This patch extends OMAP3 support for AM/DM37xx and
introduces the AM3703-based Quipos Cairo board.
Signed-off-by: Albert ARIBAUD (3ADEV) albert.arib...@3adev.fr
---
NOTES:
Two checkpatch diagnostics are left uncorrected:
1. warning: arch/arm/cpu/armv7/omap3/Kconfig,94: please write
Hello Simon,
On Fri, 16 Jan 2015 10:20:15 -0700, Simon Glass s...@chromium.org
wrote:
Hi Albert,
On 16 January 2015 at 01:09, Albert ARIBAUD (3ADEV)
albert.arib...@3adev.fr wrote:
Signed-off-by: Albert ARIBAUD (3ADEV) albert.arib...@3adev.fr
---
arch/arm/cpu/armv7/omap3/Kconfig
Hello Marek,
On Fri, 16 Jan 2015 14:08:58 +0100, Marek Vasut ma...@denx.de wrote:
On Friday, January 16, 2015 at 08:19:19 AM, Albert ARIBAUD (3ADEV) wrote:
Signed-off-by: Albert ARIBAUD (3ADEV) albert.arib...@3adev.fr
---
Makefile | 3 +
scripts/Makefile.spl | 11
Hello Simon,
On Fri, 16 Jan 2015 10:17:52 -0700, Simon Glass s...@chromium.org
wrote:
Hi Albert,
On 16 January 2015 at 00:19, Albert ARIBAUD (3ADEV)
albert.arib...@3adev.fr wrote:
Signed-off-by: Albert ARIBAUD (3ADEV) albert.arib...@3adev.fr
---
arch/arm/include/asm/arch-lpc32xx
Signed-off-by: Albert ARIBAUD (3ADEV) albert.arib...@3adev.fr
---
arch/arm/cpu/armv7/omap3/sdrc.c | 6 +-
arch/arm/include/asm/arch-omap3/sys_proto.h | 1 +
2 files changed, 6 insertions(+), 1 deletion(-)
diff --git a/arch/arm/cpu/armv7/omap3/sdrc.c b/arch/arm/cpu/armv7/omap3
These are needed for the upcoming Cairo board support.
Signed-off-by: Albert ARIBAUD (3ADEV) albert.arib...@3adev.fr
---
arch/arm/cpu/armv7/omap3/clock.c | 9 +
1 file changed, 9 insertions(+)
diff --git a/arch/arm/cpu/armv7/omap3/clock.c b/arch/arm/cpu/armv7/omap3/clock.c
index
it
out.
2. check: board/quipos/cairo/cairo.c,87: Avoid CamelCase:
SDP_3430_SDRC_RFR_CTRL_165MHz
Symbol was not defined in this patch. If requested, I will post a
separate change to fix the symbol.
Albert ARIBAUD (3ADEV) (6):
omap3: enable GP9 timer and UART2
omap3: make SDRC SHARING
Signed-off-by: Albert ARIBAUD (3ADEV) albert.arib...@3adev.fr
---
arch/arm/include/asm/arch-omap3/mux.h | 51 +--
1 file changed, 49 insertions(+), 2 deletions(-)
diff --git a/arch/arm/include/asm/arch-omap3/mux.h
b/arch/arm/include/asm/arch-omap3/mux.h
index
Signed-off-by: Albert ARIBAUD (3ADEV) albert.arib...@3adev.fr
---
arch/arm/include/asm/arch-omap3/mmc_host_def.h | 1 +
drivers/mmc/omap_hsmmc.c | 4
2 files changed, 5 insertions(+)
diff --git a/arch/arm/include/asm/arch-omap3/mmc_host_def.h
b/arch/arm/include/asm
Signed-off-by: Albert ARIBAUD (3ADEV) albert.arib...@3adev.fr
---
arch/arm/cpu/armv7/omap3/Kconfig | 5 +
board/quipos/cairo/Kconfig | 12 ++
board/quipos/cairo/Makefile | 8 +
board/quipos/cairo/cairo.c | 90
board/quipos/cairo/cairo.h | 321
Signed-off-by: Albert ARIBAUD (3ADEV) albert.arib...@3adev.fr
---
arch/arm/include/asm/arch-omap3/mem.h | 43 +++
1 file changed, 43 insertions(+)
diff --git a/arch/arm/include/asm/arch-omap3/mem.h
b/arch/arm/include/asm/arch-omap3/mem.h
index 0b78c1c..3ce270c
. As it
never is in any other definition of CONFIG_ETHADDR, I left it
unchanged.
Albert ARIBAUD (3ADEV) (8):
lpc32xx: add Ethernet support
lpc32xx: mtd: nand: add MLC NAND controller
lpc32xx: i2c: add LPC32xx I2C interface support
lpc32xx: add GPIO support
lpc32xx: add LPC32xx SSP support
Signed-off-by: Albert ARIBAUD (3ADEV) albert.arib...@3adev.fr
---
arch/arm/cpu/arm926ejs/lpc32xx/devices.c | 11 ++
arch/arm/include/asm/arch-lpc32xx/clk.h | 4 +
arch/arm/include/asm/arch-lpc32xx/cpu.h | 2 +
arch/arm/include/asm/arch-lpc32xx/sys_proto.h | 1 +
drivers
Signed-off-by: Albert ARIBAUD (3ADEV) albert.arib...@3adev.fr
---
arch/arm/cpu/arm926ejs/lpc32xx/cpu.c | 9 +
arch/arm/cpu/arm926ejs/lpc32xx/devices.c | 7 +
arch/arm/include/asm/arch-lpc32xx/config.h| 3 +
arch/arm/include/asm/arch-lpc32xx/sys_proto.h | 1 +
drivers
The controller's Reed-Solomon ECC hardware is
used except of course for raw reads and writes.
It covers in- and out-of-band data together.
The SPL framework is supported.
Signed-off-by: Albert ARIBAUD (3ADEV) albert.arib...@3adev.fr
---
arch/arm/cpu/arm926ejs/lpc32xx/devices.c | 6
Signed-off-by: Albert ARIBAUD (3ADEV) albert.arib...@3adev.fr
---
arch/arm/include/asm/arch-lpc32xx/gpio.h | 43 ++
drivers/gpio/Makefile| 1 +
drivers/gpio/lpc32xx_gpio.c | 223 +++
3 files changed, 267 insertions(+)
create
Signed-off-by: Albert ARIBAUD (3ADEV) albert.arib...@3adev.fr
---
arch/arm/cpu/arm926ejs/lpc32xx/devices.c | 6 ++
arch/arm/include/asm/arch-lpc32xx/clk.h | 3 +
arch/arm/include/asm/arch-lpc32xx/sys_proto.h | 1 +
drivers/spi/Makefile | 1 +
drivers
MAX518)
- SPI (through SSP interface)
- Port expander MAX6957
- LCD display (HD44780-compatible), controlled
through the port expander and DACs
This board has SPL support, and uses the LPC32XX boot
image format.
Signed-off-by: Albert ARIBAUD (3ADEV) albert.arib...@3adev.fr
---
arch/arm
Signed-off-by: Albert ARIBAUD (3ADEV) albert.arib...@3adev.fr
---
drivers/hwmon/Makefile | 1 +
drivers/hwmon/ds620.c | 64 ++
include/dtt.h | 15 ++--
3 files changed, 73 insertions(+), 7 deletions(-)
create mode 100644 drivers
Signed-off-by: Albert ARIBAUD (3ADEV) albert.arib...@3adev.fr
---
Makefile | 3 +
scripts/Makefile.spl | 11
tools/.gitignore | 1 +
tools/Makefile| 2 +
tools/mklpc32xxboot.c | 169 ++
5 files changed, 186
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