Hi Fabio,
On 03.05.24 14:44, Fabio Estevam wrote:
> Hi Benjamin,
>
> On Fri, May 3, 2024 at 4:01 AM Benjamin Hahn wrote:
>
>> -CONFIG_USB_GADGET_MANUFACTURER="FSL"
>> +CONFIG_USB_GADGET_MANUFACTURER="PHYTEC"
>> CONFIG_USB_GADGET_VENDOR_NU
Set CONFIG_USB_GADGET_MANUFACTURER to PHYTEC for all PHYTEC boards.
Signed-off-by: Benjamin Hahn
---
configs/phycore-imx8mp_defconfig | 2 +-
configs/phycore_am64x_a53_defconfig | 2 +-
configs/phycore_am64x_r5_defconfig | 2 +-
configs/phycore_pcl063_defconfig | 2 +-
configs
define the phytec_get_som_type function also when the SoM detection is
disabled.
Fixes:
commit 110d321a56c3 ("board: phytec: common: phytec_som_detection: Add
phytec_get_som_type")
Signed-off-by: Benjamin Hahn
---
board/phytec/common/phytec_som_detection.c | 5 +
1 file
Hi Fabio,
On 07.03.24 21:26, Fabio Estevam wrote:
> Hi Benjamin,
>
> On Wed, Mar 6, 2024 at 1:18 PM Benjamin Hahn wrote:
>> PCL-070 supports 2GHz RAM-timings from pcb_rev 1 and newer. PCM-070
>> supports 2GHz RAM-timings only from pcb_rev 3 and newer.
>>
>> S
We need to differ between PCL-070 and PCM-070. PCL-070 supports 2GHz RAM
timings from pcb rev 1 or newer. PCM-070 supports 2GHz RAM timings from
pcb rev 3 or newer.
Signed-off-by: Benjamin Hahn
---
board/phytec/phycore_imx8mp/spl.c | 6 --
1 file changed, 4 insertions(+), 2 deletions
PCL-070 supports 2GHz RAM-timings from pcb_rev 1 and newer. PCM-070
supports 2GHz RAM-timings only from pcb_rev 3 and newer.
Signed-off-by: Benjamin Hahn
---
Changes in v3:
- change variable name from somtyp to somtype
- change enum names from PCL to SOM_TYPE_PCL
- Link to v2:
https
Add a function that gets the som_type from the EEPROM.
Add an enum for the som_type.
Signed-off-by: Benjamin Hahn
---
board/phytec/common/phytec_som_detection.c | 10 ++
board/phytec/common/phytec_som_detection.h | 8
2 files changed, 18 insertions(+)
diff --git a/board
On 04.03.24 15:42, Fabio Estevam wrote:
> On Mon, Mar 4, 2024 at 9:31 AM Benjamin Hahn wrote:
>> Add a function that gets the som_type from the EEPROM.
>> Add an enum for the som_type.
>>
>> Signed-off-by: Benjamin Hahn
> Your series does not even
We need to differ between PCL-070 and PCM-070. PCL-070 supports 2GHz RAM
timings from pcb rev 1 or newer. PCM-070 supports 2GHz RAM timings from
pcb rev 3 or newer.
Signed-off-by: Benjamin Hahn
---
board/phytec/phycore_imx8mp/spl.c | 6 --
1 file changed, 4 insertions(+), 2 deletions
PCL-070 supports 2GHz RAM-timings from pcb_rev 1 and newer. PCM-070
supports 2GHz RAM-timings only from pcb_rev 3 and newer.
Signed-off-by: Benjamin Hahn
---
Changes in v2:
- Fix mistakes that prevented building
- Link to v1:
https://lore.kernel.org/r/20240304-pcl-070-patches-v1-0-6aa6c89e3
Add a function that gets the som_type from the EEPROM.
Add an enum for the som_type.
Signed-off-by: Benjamin Hahn
---
board/phytec/common/phytec_som_detection.c | 10 ++
board/phytec/common/phytec_som_detection.h | 8
2 files changed, 18 insertions(+)
diff --git a/board
We need to differ between PCL-070 and PCM-070. PCL-070 supports 2GHz RAM
timings from pcb rev 1 or newer. PCM-070 supports 2GHz RAM timings from
pcb rev 3 or newer.
Signed-off-by: Benjamin Hahn
---
board/phytec/phycore_imx8mp/spl.c | 6 --
1 file changed, 4 insertions(+), 2 deletions
Add a function that gets the som_type from the EEPROM.
Add an enum for the som_type.
Signed-off-by: Benjamin Hahn
---
board/phytec/common/phytec_som_detection.c | 10 ++
board/phytec/common/phytec_som_detection.h | 8
2 files changed, 18 insertions(+)
diff --git a/board
PCL-070 supports 2GHz RAM-timings from pcb_rev 1 and newer. PCM-070
supports 2GHz RAM-timings only from pcb_rev 3 and newer.
Signed-off-by: Benjamin Hahn
---
Benjamin Hahn (2):
board: phytec: common: phytec_som_detection: Add phytec_get_som_type
board: phycore_imx8mp: Use 2GHz RAM
.
NOTE: The polling rate from the devicetree will be used after this
patch. In imx8*.dtsi devicetrees the polling delay is set to 2000ms for
example.
Signed-off-by: Benjamin Hahn
---
drivers/thermal/imx_tmu.c | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/drivers
Enable IMX_TMU driver to prevent the system from booting when it is too
hot.
Signed-off-by: Benjamin Hahn
---
Benjamin Hahn (3):
phycore-imx8mp_defconfig: Enable CONFIG_IMX_TMU
phycore-imx8mm_defconfig: Enable CONFIG_IMX_TMU
imx8mm-phygate-tauri-l_defconfig: Enable
Enable the imx thermal driver to prevent booting when the system is too
hot.
Signed-off-by: Benjamin Hahn
---
configs/phycore-imx8mp_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/configs/phycore-imx8mp_defconfig b/configs/phycore-imx8mp_defconfig
index 0f37286d5d99..c95554283903
Enable the imx thermal driver to prevent booting when the system is too
hot.
Signed-off-by: Benjamin Hahn
---
configs/phycore-imx8mm_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/configs/phycore-imx8mm_defconfig b/configs/phycore-imx8mm_defconfig
index bcc38d51a7b9..3a81ea7bd23d
Enable the imx thermal driver to prevent booting when the system is too
hot.
Signed-off-by: Benjamin Hahn
---
configs/imx8mm-phygate-tauri-l_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/configs/imx8mm-phygate-tauri-l_defconfig
b/configs/imx8mm-phygate-tauri-l_defconfig
index
add support for Serial Downloader Boot via UUU as well as flashing emmc
via UUU on USB0 Port of phyBOARD Pollux.
Reviewed-by: Fabio Estevam
Signed-off-by: Benjamin Hahn
---
board/phytec/phycore_imx8mp/phycore-imx8mp.c | 4
configs/phycore-imx8mp_defconfig | 18
add support for USB mass storage to USB0 port of phyBOARD Pollux.
tested with "ums 0 mmc 2"
Signed-off-by: Benjamin Hahn
---
arch/arm/dts/imx8mp-phyboard-pollux-rdk-u-boot.dtsi | 4
configs/phycore-imx8mp_defconfig| 7 +++
2 files changed, 11 insertion
arm64: dts: imx8mp-phyboard-pollux: Add flexcan support
fa2a1ec50456 arm64: dts: imx8mp-phyboard-pollux: Add missing usdhc clocks
assignment
055e38c76388 arm64: dts: imx8mp-phyboard-pollux-rdk: Fix led sub-node names
Signed-off-by: Benjamin Hahn
---
arch/arm/dts/imx8mp-phyboard-pollux-rdk.dts
The phyBOARD Pollux has two USB ports. Add support for USB host and USB
storage for the USB1 port.
Signed-off-by: Benjamin Hahn
---
configs/phycore-imx8mp_defconfig | 10 ++
1 file changed, 10 insertions(+)
diff --git a/configs/phycore-imx8mp_defconfig b/configs/phycore
add support for various USB features like USB storage, USB mass storage
as well as booting and flashing emmc via UUU.
Signed-off-by: Benjamin Hahn
---
Changes in v3:
- add patch description for the sync with kernel devicetree commit
- Link to v2:
https://lore.kernel.org/r/20240131-usb_support
add support for Serial Downloader Boot via UUU as well as flashing emmc
via UUU on USB0 Port of phyBOARD Pollux.
Reviewed-by: Fabio Estevam
Signed-off-by: Benjamin Hahn
---
board/phytec/phycore_imx8mp/phycore-imx8mp.c | 4
configs/phycore-imx8mp_defconfig | 18
add support for USB mass storage to USB0 port of phyBOARD Pollux.
tested with "ums 0 mmc 2"
Signed-off-by: Benjamin Hahn
---
arch/arm/dts/imx8mp-phyboard-pollux-rdk-u-boot.dtsi | 4
configs/phycore-imx8mp_defconfig| 7 +++
2 files changed, 11 insertion
The phyBOARD Pollux has two USB ports. Add support for USB host and USB
storage for the USB1 port.
Signed-off-by: Benjamin Hahn
---
configs/phycore-imx8mp_defconfig | 10 ++
1 file changed, 10 insertions(+)
diff --git a/configs/phycore-imx8mp_defconfig b/configs/phycore
add support for various USB features like USB storage, USB mass storage
as well as booting and flashing emmc via UUU.
Signed-off-by: Benjamin Hahn
---
Changes in v2:
- sync kernel devicetree before making changes
- Link to v1:
https://lore.kernel.org/r/20240129-usb_support-v1-0-8bd2fe840
Signed-off-by: Benjamin Hahn
---
arch/arm/dts/imx8mp-phyboard-pollux-rdk.dts | 162 +++-
1 file changed, 159 insertions(+), 3 deletions(-)
diff --git a/arch/arm/dts/imx8mp-phyboard-pollux-rdk.dts
b/arch/arm/dts/imx8mp-phyboard-pollux-rdk.dts
index 6aa720bafe..c8640cac3e
add support for Serial Downloader Boot via UUU as well as flashing emmc
via UUU on USB0 Port of phyBOARD Pollux.
Signed-off-by: Benjamin Hahn
---
board/phytec/phycore_imx8mp/phycore-imx8mp.c | 4
configs/phycore-imx8mp_defconfig | 18 --
include/configs
add support for USB mass storage to USB0 port of phyBOARD Pollux.
tested with "ums 0 mmc 2"
Signed-off-by: Benjamin Hahn
---
arch/arm/dts/imx8mp-phyboard-pollux-rdk-u-boot.dtsi | 13 +
configs/phycore-imx8mp_defconfig| 7 +++
2 files changed, 20
The phyBOARD Pollux has two USB ports. Add support for USB host and USB
storage for the USB1 port.
Signed-off-by: Benjamin Hahn
---
arch/arm/dts/imx8mp-phyboard-pollux-rdk-u-boot.dtsi | 13 +
configs/phycore-imx8mp_defconfig| 10 ++
2 files changed, 23
add support for various USB features like USB storage, USB mass storage
as well as booting and flashing emmc via UUU.
Signed-off-by: Benjamin Hahn
---
Benjamin Hahn (3):
phycore-imx8mp: add USB host support
phycore-imx8mp: add USB mass storage support
phycore-imx8mp: add
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