Software Engineer
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greg.topmil...@jdsu.com
From: Carolyn Smith [mailto:carolynsm...@gmail.com]
Sent: Wednesday, November 07, 2012 3:03 PM
To: Greg Topmiller
Cc: Fabio Estevam (feste...@gmail.com); u-boot@lists.denx.de
Subject: Re: PCIe on the i.MX6?
Hi Greg,
What is the exact
I try reading
memory or I/O space, I don't see any bus traffic.
Thanks,
Carolyn
On Thu, Nov 1, 2012 at 11:18 AM, Fabio Estevam festevam at gmail.com
wrote:
On Thu, Nov 1, 2012 at 2:32 PM, Carolyn Smith carolynsmi56 at
gmail.com
wrote:
Hello,
Does anyone have any experience
Hello,
Does anyone have any experience with PCIe on an i.MX6 processor (in
particular the i.MX6 Solo)?
I can access the config space of my PCIe device but can't seem to get its
BARs mapped in properly. I thought I had the viewports set up but when I
try to access the space, I just get a
, Nov 1, 2012 at 2:32 PM, Carolyn Smith carolynsm...@gmail.com
wrote:
Hello,
Does anyone have any experience with PCIe on an i.MX6 processor (in
particular the i.MX6 Solo)?
I can access the config space of my PCIe device but can't seem to get its
BARs mapped in properly. I thought I
On Thu, Sep 27, 2012 at 2:07 PM, Carolyn Smith carolynsm...@gmail.com wrote:
On Thu, Sep 27, 2012 at 12:00 PM, Fabio Estevam feste...@gmail.com wrote:
On Thu, Sep 27, 2012 at 3:27 PM, Carolyn Smith carolynsm...@gmail.com
wrote:
Hello,
Has anyone had any success getting RMII ethernet
Hello,
Has anyone had any success getting RMII ethernet to work on an i.MX6 Solo
or DualLite? I am pretty confident I have the IOMUX registers set up
properly and the clocking configured and working properly but am not seeing
any activity on the TXEN line when trying to transmit a packet.I can
On Thu, Sep 27, 2012 at 12:00 PM, Fabio Estevam feste...@gmail.com wrote:
On Thu, Sep 27, 2012 at 3:27 PM, Carolyn Smith carolynsm...@gmail.com wrote:
Hello,
Has anyone had any success getting RMII ethernet to work on an i.MX6 Solo
or DualLite? I am pretty confident I have the IOMUX
Thanks to Dirk for your previous advice. We had a pullup on one of the
reserved BOOT_CFG pins that caused problems accessing NOR flash.
Now I can put code in the NOR flash. If the code is incorrect in some way
(not sure how yet), I end up with a board that I can't get control of with
the BDI. I
Hello,
I have a custom i.MX6 board that is configured to boot from 16-bit parallel
NOR flash using non-multiplexed I/O with the data on the upper half of the
data bus. I.e. chip select 0 of the EIM bus should be configured so that
MUM = 0 and DSZ = 010b.
However, the board is coming out of reset
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