[PATCH] net: ftgmac100: Add reset control

Add optional reset control, especially for the Aspeed SOC. For the hardware without a reset line, the reset assertion/deassertion will be skipped. Signed-off-by: Dylan Hung --- drivers/net/ftgmac100.c | 12 1 file changed, 12 insertions(+) diff --git a/drivers/net/ftgmac100.c b

[PATCH 1/2] ram: ast2600: Keep MPLL power on

According to the PLL vendor, we should keep the PLL power on, so we shouldn't toggle the power-down bit during PLL initialization. Signed-off-by: Dylan Hung --- drivers/ram/aspeed/sdram_ast2600.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/ram/aspeed

[PATCH 0/2] Keep PLL power on

driver and the others in the clock driver. Dylan Hung (2): ram: ast2600: Keep MPLL power on clk: ast2600: Keep PLL power on drivers/clk/aspeed/clk_ast2600.c | 3 +-- drivers/ram/aspeed/sdram_ast2600.c | 6 +++--- 2 files changed, 4 insertions(+), 5 deletions(-) -- 2.25.1

[PATCH 2/2] clk: ast2600: Keep PLL power on

According to the PLL vendor, we should keep the PLL power on, so we shouldn't toggle the power-down bit during PLL initialization. Signed-off-by: Dylan Hung --- drivers/clk/aspeed/clk_ast2600.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/drivers/clk/aspeed/clk_ast2600

[PATCH 3/3] ram: ast2600: Align the RL and WL setting

Use macro to represent the RL and WL setting to ensure the PHY and controller setting are aligned. Signed-off-by: Dylan Hung --- arch/arm/include/asm/arch-aspeed/sdram_ast2600.h | 4 drivers/ram/aspeed/sdram_ast2600.c | 9 + 2 files changed, 13 insertions(+) diff

[PATCH 1/3] ram: ast2600: Fix incorrect statement of the register polling

Since SDRAM_PHYCTRL0_INIT has already done, remove the unnecessary checking of phy_status[1]. Fixes: fde93143469f ("ram: aspeed: Add AST2600 DRAM control support") Signed-off-by: Dylan Hung --- drivers/ram/aspeed/sdram_ast2600.c | 7 +-- 1 file changed, 1 insertion(+), 6 delet

[PATCH 2/3] ram: ast2600: Improve ddr4 timing and signal quality

to synchronize the MR value on both sides. Note2: the waveform meansurement can be found in item #21 of Aspeed AST26x0 Application note (AP note). Signed-off-by: Dylan Hung --- drivers/ram/aspeed/sdram_ast2600.c | 163 - 1 file changed, 138 insertions(+), 25 deletions

[PATCH 0/3] Improve AST26x0 DDR4 timing and signal quality

This patch series fine-tunes the read & write DQS/DQ timing, CLK/CA timing and termination (RTT_NOM, RTT_PARK and RTT_WR) for Aspeed AST26x0 SOC to get better signal quality and hence improve the stability. Also, a typing error of the DDR-PHY status polling is fixed. Dylan Hung (3):

RE: [PATCH] ram: aspeed: Rework kconfig options

PEED > - help > - enable SDRAM ECC function > - > -if ASPEED_ECC > -config ASPEED_ECC_SIZE > - int "ECC size: 0=driver auto-caluated" > - depends on ASPEED_ECC > - default 0 > - help > - SDRAM size with the error correcting code enabled. The unit is > - in Megabytes. Noted that only the 8/9 of the configured size > - can be used by the system. The remaining 1/9 will be used by > - the ECC engine. If the size is set to 0, the sdram driver will > - calculate the SDRAM size and set the whole range be ECC enabled. > -endif # end of ASPEED_ECC > -endif # end of ASPEED_AST2600 > -endif # end of RAM || SPL_RAM > +endif # End of ASPEED_RAM > -- > 2.34.1 Reviewed-by: Dylan Hung

[next 5/5] clk: ast2600: Revise MII interface delay

The clock delay of the RMII/RGMII interface is controlled by SCU340~35C. These values are obtained by measurement and experiments so we simply use macro to define them. Signed-off-by: Dylan Hung --- drivers/clk/aspeed/clk_ast2600.c | 10 +- 1 file changed, 5 insertions(+), 5 deletions

[next 3/5] ARM: dts: ast2600: Add MDIO devices

There are 4 MDIO bus controllers in AST2600 SOC. Each of them can connect to one or more PHY chips and is flexible to work with the 4 MAC devices in AST2600. On AST2600 EVB, MDIO 0,1,2,3 connect to the PHY chips used by MAC 0,1,2,3 respectively. Signed-off-by: Dylan Hung --- arch/arm/dts

[next 4/5] configs: ast2600: enable DM_MDIO and MDIO driver

Enable DM_MDIO and Aspeed MDIO driver for AST2600 EVB. Signed-off-by: Dylan Hung --- configs/evb-ast2600_defconfig | 2 ++ 1 file changed, 2 insertions(+) diff --git a/configs/evb-ast2600_defconfig b/configs/evb-ast2600_defconfig index 5f00d6a944a6..21af905a047a 100644 --- a/configs/evb

[next 2/5] net: ftgmac100: Add Aspeed AST2600 support

Add support of the MAC controller of Aspeed AST2600 SOC. The MAC controller is the same with AST2500, except it has stand-alone MDIO hardware block. Signed-off-by: Dylan Hung --- drivers/net/ftgmac100.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/net/ftgmac100.c b/drivers/net

[next 1/5] net: ftgmac100: Add DM_MDIO support

Add support for DM_MDIO to connect to PHY. For the systems that have a stand-alone MDIO hardware block, enable CONFIG_DM_MDIO to use driver model for MDIO devices. Signed-off-by: Dylan Hung --- drivers/net/ftgmac100.c | 20 +++- 1 file changed, 15 insertions(+), 5 deletions

[next 0/5] Add support of Ethernet for Aspeed AST2600 SoC

can use external MDIO driver (aspeed_mdio) instead of integrated MDIO drier in ftgmac100.c. The patch series also revises the MII interface delay for better RMII/RGMII timing margin. Dylan Hung (5): net: ftgmac100: Add DM_MDIO support net: ftgmac100: Add Aspeed AST2600 support ARM: dts

[PATCH] drivers: net: add Aspeed MDIO driver

Add a driver for the MDIO interface for Aspeed AST2600 SOC. The driver only supports clause 22 for now. Signed-off-by: Dylan Hung --- drivers/net/Kconfig | 7 +++ drivers/net/Makefile | 1 + drivers/net/aspeed_mdio.c | 128 ++ 3 files changed

[PATCH] aspeed: AST2600 Pinctrl Driver

From: Ryan Chen This driver uses Pinctrl framework and is compatible with the Linux driver for AST2600. Signed-off-by: Ryan Chen Signed-off-by: Dylan Hung --- drivers/pinctrl/Kconfig | 9 + drivers/pinctrl/aspeed/Makefile | 1 + drivers/pinctrl/aspeed

[PATCH 0/2] Refactor ASPEED AST2500 DDR SDRAM driver structure

This patch series improves the maintainability of the ASPEED DDR SDRAM driver. It moves the source code files from arch/arm/mach-aspeed to drives/ram/aspeed and so that it is more easier to add configurations such as dual-x8-die configs. Dylan Hung (2): ram: move aspeed ram driver into drivers

[PATCH 1/2] ram: move aspeed ram driver into drivers/ directory

to improve the maintainability. It is more easier to modify and add configurations of the driver in the centralized ram driver directory. Signed-off-by: Dylan Hung --- arch/arm/mach-aspeed/ast2500/Makefile | 2 +- drivers/ram/Makefile

[PATCH 2/2] ram: add ddr4 dual x8 configuration

the aspeed ddr sdram controller needs to know if the memory chip mounted on the board is dual x8 die or not. Or it may get the wrong size of the memory space. Signed-off-by: Dylan Hung --- drivers/ram/Kconfig| 1 + drivers/ram/aspeed/Kconfig | 10 ++ drivers/ram

[PATCH 1/2] ram: move aspeed ram driver into drivers/ directory

to improve the maintainability. It is more easier to modify and add configurations of the driver in the centralized ram driver directory. Signed-off-by: Dylan Hung --- arch/arm/mach-aspeed/ast2500/Makefile | 2 +- drivers/ram/Makefile

[PATCH 0/2] Refactor ASPEED AST2500 DDR SDRAM driver structure

This patch series improves the maintainability of the ASPEED DDR SDRAM driver. It moves the source code files from arch/arm/mach-aspeed to drives/ram/aspeed and so that it is more easier to add configurations such as dual-x8-die configs. Dylan Hung (2): ram: move aspeed ram driver into drivers

[PATCH 2/2] ram: add ddr4 dual x8 configuration

the aspeed ddr sdram controller needs to know if the memory chip mounted on the board is dual x8 die or not. Or it may get the wrong size of the memory space. Signed-off-by: Dylan Hung --- drivers/ram/Kconfig| 1 + drivers/ram/aspeed/Kconfig | 10 ++ drivers/ram