Hi Daniel,
From: Gupta, Pekon
Hi Daniel,
From: Daniel Mack [mailto:zon...@gmail.com]
Resending this since I got no replies on the first version.
I also fixed up the commit log of #1.
I plan to test this, but there is still a long pending list of patches which
for me to test in kernel and u
From: Tom Rini [mailto:tom.r...@gmail.com] On Behalf Of Rini, Tom
On Sat, Jul 05, 2014 at 12:35:12AM +0530, Pekon Gupta wrote:
Beaglebone Board can be connected to expansion boards to add devices to them.
These expansion boards are called 'capes'. This patch adds support for
following versions
From: Tom Rini [mailto:tom.r...@gmail.com] On Behalf Of Rini, Tom
On Sat, Jul 05, 2014 at 12:35:14AM +0530, Pekon Gupta wrote:
This patch updates pin-mux for beaglebone NOR cape [1]
This cape has 128Mbits(16MBytes), x16, CFI compatible NOR Flash device.
On Beaglebone, GPMC chip-select-0 is
From: Pekon Gupta pe...@ti.com
This patch cleans redundant and unused macros from various board-configs
and architecture specific header files.
Tested using: MAKEALL -s omap 3 -s omap4 -s omap5 -s am33xx
with $ARCH=arm $CROSS_COMPILE=arm-linux-gnueabihf-
Pekon Gupta (3):
From: Tom Rini [mailto:tom.r...@gmail.com] On Behalf Of Rini, Tom
On Sat, Jul 05, 2014 at 12:35:17AM +0530, Pekon Gupta wrote:
This patch adds support for x16 NAND device (MT29F2G16AAD) connected to GPMC
chip-select present on DRA7xx EVM.
On this board, GPMC_WPN and NAND_BOOTn are controlled
Hi Jon,
From: Jon Cormier [mailto:jcorm...@criticallink.com]
On Tue, Jul 15, 2014 at 12:23 AM, Gupta, Pekon pe...@ti.com wrote:
From: Jon Cormier [mailto:jcorm...@criticallink.com]
We have a product based on the 335x that has several different models where
the only difference is the nand
Hi Jon,
From: Jon Cormier [mailto:jcorm...@criticallink.com]
We have a product based on the 335x that has several different models where
the only difference is the nand part. We would like to have a unified u-boot
that can dynamically configure the nand's ECC, page size, block size, etc
From: Stefan Roese [mailto:s...@denx.de]
On 12.07.2014 15:30, Gupta, Pekon wrote:
From: Tom Rini [mailto:tom.r...@gmail.com] On Behalf Of Rini, Tom
On Thu, Jul 10, 2014 at 07:28:00AM +0200, Stefan Roese wrote:
Hi Pekon,
On 09.07.2014 20:22, Gupta, Pekon wrote:
Commit a0a37183 (ARM: omap
From: Tom Rini [mailto:tom.r...@gmail.com] On Behalf Of Rini, Tom
On Thu, Jul 10, 2014 at 07:28:00AM +0200, Stefan Roese wrote:
Hi Pekon,
On 09.07.2014 20:22, Gupta, Pekon wrote:
Commit a0a37183 (ARM: omap: merge GPMC initialization code for all
platform) broke NAND on OMAP3 based platforms
From: Stefan Roese [mailto:s...@denx.de]
These functions have been merged into the common GPMC init code
with this commit a0a37183 (ARM: omap: merge GPMC initialization code
for all platform). The file is not compiled any more. So remove it
as well.
Signed-off-by: Stefan Roese s...@denx.de
Cc:
From: ashchar...@gmail.com
On Mon, Jul 7, 2014 at 11:19 PM, Gupta, Pekon pe...@ti.com wrote:
Sorry seeing this bit late. Were you able to root cause the issue ?
Did you see http://patchwork.ozlabs.org/patch/356984/ ?
This resolves the issue for me but I'd welcome any feedback you have
Hi Stefan,
From: Stefan Roese [mailto:s...@denx.de]
Commit a0a37183 (ARM: omap: merge GPMC initialization code for all
platform) broke NAND on OMAP3 based platforms. I noticed this while
testing the latest 2014.07-rc version on the TAO3530 board. NAND
detection did not work with this error
Hi Ash,
From: ashchar...@gmail.com
Hi,
I'm actually seeing some breakage from this commit
(a0a37183bd75e74608bc78c8d0e2a34454f95a91). When booting the DuoVero
board (no NAND/NOR/ONENAND but a network card on GPMC), it hangs as it
enters the kernel.
These lines in gpmc_init() in
From: Igor Grinberg [mailto:grinb...@compulab.co.il]
Hi Pekon,
On 07/04/14 22:05, Pekon Gupta wrote:
This patch series adds support for parallel NAND devices support connected
via
GPMC chip-select on various boards belonging to AM33xx and OMAPx platforms.
This series also moves some board
Hi Daniel,
From: Daniel Mack [mailto:zon...@gmail.com]
Resending this since I got no replies on the first version.
I also fixed up the commit log of #1.
I plan to test this, but there is still a long pending list of patches which
for me to test in kernel and u-boot. So it might take bit time.
Hi Larry,
From: Wolfgang Denk
In message ba...@usgs.gov wrote:
A recent situation has awakened me to a a behavior of U-Boot that maybe
should be changed.
U-Boot related questions should better be discussed on the U-Boot
(rather than the ELDK) mailing list. I'm adding the U-Boot list on
Cc.
From: Jeroen Hofstee
commit a0a37183bd7 ARM: omap: merge GPMC initialization code for
all platform needs CONFIG_NOR, CONFIG_NAND or CONFIG_CMD_ONENAND
to be set to access flash. Add CONFIG_NAND for tam3517 derived
boards to prevent the following error: nand: error: Unable to
find NAND settings in
From: Stefano Babic [mailto:sba...@denx.de]
[...]
diff --git a/include/configs/tam3517-common.h
b/include/configs/tam3517-common.h
index 3522c1a..bd117d5 100644
--- a/include/configs/tam3517-common.h
+++ b/include/configs/tam3517-common.h
@@ -185,6 +185,7 @@
/* Configure the PISMO */
From: Heiko Schocher [mailto:h...@denx.de]
Am 28.05.2014 23:00, schrieb Tom Rini:
On Tue, May 27, 2014 at 12:21:21PM -0500, Scott Wood wrote:
On Tue, 2014-05-27 at 11:48 +, Gupta, Pekon wrote:
[...]
This series few other patch series are awaiting response from
long time.
Sorry
Hi Stefan, Marek,
From: Stefan Roese [mailto:s...@denx.de]
From: Marek Belisko marek.beli...@gmail.com
On some NAND devices (e.g. Hynix H27U2G8F2CTR-BI on Siemens DXR2 /
Draco boards) the NAND subsystem (SPL U-Boot drivers) issues the following
bit-flip error messages:
nand: bit-flip
Hello Scott, Tom,
From: Gupta, Pekon
*changes v4 - v5*
[PATCH 1/5] no change
[PATCH 2/5] fixed compilation error for OMAP3 platforms
[PATCH 3/5] no change
[PATCH 4/5] dropped old [PATCH] mtd: nand: omap: add
CONFIG_SYS_NAND_BUSWIDTH_16BIT to
indicate NAND device bus-width
instead
From: Tom Rini [mailto:tom.r...@gmail.com] On Behalf Of Rini, Tom
On Thu, May 08, 2014 at 09:43:47PM +0530, pekon gupta wrote:
GPMC controller on TI's OMAP SoC is general purpose controller to interface
with different types of external devices like;
- parallel NOR flash
- parallel NAND
From: Gupta, Pekon
*changes v1-v2*
[PATCH 2/7] fix for BCH4 and BCH16 ECC scheme
[PATCH 7/7] new patch
- white space-clean up
*original v1*
This patch series
- removes un-wanted redundant code in omap_elm and omap_gpmc drivers
- refactors some private struct in omap_gpmc to make them
From: Gupta, Pekon
This patch series intends to:
- Add support for GPMC and ELM controllers for OMAP4 and OMAP5 platform devices
by moving all generic arch specific code shared between
arch/AM33xx, arch/OMAP4 and arch/OMAP5 into arch/omap-common/
- Separate out arch specific header for future
From: Stefan Roese [mailto:s...@denx.de]
From: Marek Belisko marek.beli...@gmail.com
On some NAND devices (e.g. Hynix H27U2G8F2CTR-BI on Siemens DXR2 /
Draco boards) the SPL issues the following bit-flip error messages:
nand: bit-flip corrected @oob=0
...
This patch makes sure that only the
+ Bacem Daasi bacem.daa...@spansion.com
who was first to identify and root-cause the issue. So giving some credit to
him..
From: Stefan Roese [mailto:s...@denx.de]
From: Marek Belisko marek.beli...@gmail.com
On some NAND devices (e.g. Hynix H27U2G8F2CTR-BI on Siemens DXR2 /
Draco boards) the
Hi Scott,
From: Scott Wood [mailto:scottw...@freescale.com]
On Mon, 2014-04-28 at 17:11 +0530, Pekon Gupta wrote:
+ CONFIG_SYS_NAND_DEVICE_WIDTH
+Specifies bus-width of the default NAND device connected to SoC.
+This config is useful for driver which cannot self initialize or
+
Hi Marek,
From: Belisko Marek [mailto:marek.beli...@gmail.com]
[...]
With original patch (or with your) it fix only u-boot but it doesn't
fix loading u-boot from SPL as it using custom nand_read_page (in
am335x_spl_bch.c)
and not from nand_bases there must be other update to fix this issue.
From: Marek Belisko [mailto:marek.beli...@gmail.com]
We need to flip only one bit not assign.
Signed-off-by: Marek Belisko marek.beli...@gmail.com
---
drivers/mtd/nand/omap_gpmc.c |2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/mtd/nand/omap_gpmc.c
Hi Marek,
From: Belisko Marek [mailto:marek.beli...@gmail.com]
On Wed, Apr 23, 2014 at 8:04 PM, Gupta, Pekon pe...@ti.com wrote:
From: Belisko Marek [mailto:marek.beli...@gmail.com]
CC-ing Pekon Gupta which add those changes in commit:
6e562b1106ea6afc78752f50925e87e9dd14f8b4
On Tue, Apr 15
Hello Marek,
From: Belisko Marek [mailto:marek.beli...@gmail.com]
CC-ing Pekon Gupta which add those changes in commit:
6e562b1106ea6afc78752f50925e87e9dd14f8b4
On Tue, Apr 15, 2014 at 12:47 PM, Belisko Marek marek.beli...@gmail.com
wrote:
Hi,
we're running 2014.04-rc3 on custom am335x
Fixed some copy paste typos in ECC layout below..
From: Gupta, Pekon
Hello Marek,
From: Belisko Marek [mailto:marek.beli...@gmail.com]
CC-ing Pekon Gupta which add those changes in commit:
6e562b1106ea6afc78752f50925e87e9dd14f8b4
On Tue, Apr 15, 2014 at 12:47 PM, Belisko Marek marek.beli
Hi Stefan,
From: Stefan Roese [mailto:s...@denx.de]
On 10.04.2014 11:35, Pekon Gupta wrote:
ELM hardware engine support ECC error detection for multiple ECC strengths
like
+--++
|Type | ECC syndrome length|
+--++
|BCH4 |
(re-sending as earlier mail got moderated).
Hi Enric,
From: Enric Balletbo Serra [mailto:eballe...@gmail.com]
2014-04-03 9:09 GMT+02:00 Pekon Gupta pe...@ti.com:
fixes commit e37e954eba3edb5015a0a02880d57517f57425d8
OMAP3: igep00x0: Convert to ti_omap3_common.h.
Above commit introduced
Hi Tom,
From: Tom Rini [mailto:tom.r...@gmail.com] On Behalf Of Rini, Tom
On Thu, Apr 03, 2014 at 09:12:56AM +, Gupta, Pekon wrote:
[...]
Sorry about noise, please ignore this patch. I'll merge these changes with my
other patch, where I move out board-specific configs from ti_armv7_common.h
From: Stefan Roese [mailto:s...@denx.de]
Patch a7e36fc9 (mtd: nand: omap: remove unused #defines from common
omap_gpmc.h) removed some MTD related defines. Including
GPMC_NAND_ECC_LP_x8_LAYOUT. But this define is also needed for the
memory controller configuration (only the x8 defines are needed,
Hello Scott, Tom,
On Tue, Mar 04, 2014 at 08:09:19PM -0600, Scott Wood wrote:
The following changes since commit eeb72e67619b98d2502fe634a3a5d9953de92ad0:
Merge branch 'master' of git://git.denx.de/u-boot-arm (2014-02-26 16:49:58
-0500)
are available in the git repository at:
removing sta...@vger.kernel.org from CC list.
(git send-email --suppress-cc=cc din't work for me)
From: Gupta, Pekon
Fixes: commit a919e51161b58ed7e6e663daba99ab7d558808f3
mtd: nand: omap2: clean-up BCHx_HW and BCHx_SW ECC configurations in
device_probe
Fixes ecclayout mismatch
removing sta...@vger.kernel.org from CC list.
(git send-email --suppress-cc=cc din't work for me)
From: Gupta, Pekon
1) In current implementation, ecclayout-oobfree-offset is calculated with
respect to ecclayout-eccpos[0] which is incorrect because ECC bytes may not
be stored contiguously
removing sta...@vger.kernel.org from CC list.
(git send-email --suppress-cc=cc din't work, may be it should have been
--supress-cc=bodycc)
From: Gupta, Pekon
This patch excludes reserved-marker byte-position from oobfree-length
calculation. Thus all bytes from oobfree-offset till end of OOB
Hi Brian,
From: Brian Norris [mailto:computersforpe...@gmail.com]
On Fri, Dec 13, 2013 at 02:42:57PM +0530, Pekon Gupta wrote:
This patch updates starting offset for free bytes in OOB which can be used by
file-systems to store their metadata (like clean-marker in case of JFFS2).
This should be
Hi Brian,
From: Gupta, Pekon
I'm preparing a 3.14 pull request soon, and since you seem committed to
fixing and properly testing a known regression here, I'd like to see
this go in. But given the late timing and the unanswered questions, I
think it's unlikely to go in -rc1. Perhaps I can send
Hi Brian,
From: Brian Norris
1. This patch series talks extensively about U-Boot. U-Boot is not my
interest, nor should it be the focus of kernel (driver) development.
Any work done here should be framed in the kernel driver context. [1]
Apologies for cross-posting, I understand that you
Hi Brian,
From: Brian Norris
Hi Pekon,
Sorry, I'm revisiting your patch series a bit late. There are a few
factors that contributed to this, though.
1. This patch series talks extensively about U-Boot. U-Boot is not my
interest, nor should it be the focus of kernel (driver) development.
Hi Brian,
From: Enric Balletbo Serra [mailto:eballe...@gmail.com]
2014/1/6 Stefan Roese s...@denx.de:
...
As there were parallel set of patches running between u-boot and kernel.
hence, some patch-sets caused regression for OMAP3x platforms when booting
using u-boot specifically for
From: Jeroen Hofstee [mailto:jer...@myspectrum.nl]
[...]
The gpmc will fail in hw ecc mode when trying to do subpage reads. Pekon any
suggestion for the elm mode, or should this bit just be cleared
unconditionally?
There are two reasons for not supporting sub-page feature in OMAP platforms:
(1)
Hi Jeroen,
The omap_gpmc allows switching ecc at runtime. Since
the NAND_SUBPAGE_READ flag is only set, it is kept when
switching to hw ecc, which is not correct. This leads to
calling chip-ecc.read_subpage which is not a valid
pointer. Therefore also clear the flag so reading in
hw mode works
Hi Enric,
Hi Pekon,
2013/12/10 Gupta, Pekon pe...@ti.com:
Hi Enric,
Sorry I missed your earlier mail, so din't check this..
From: Enric Balletbo Serra [mailto:eballe...@gmail.com]
I saw that the OOB layout is not the same when I flash the rootfs from
the u-boot or from the kernel
Hi Calvin,
From: Artem Bityutskiy [mailto:artem.bityuts...@linux.intel.com]
On Mon, 2014-01-13 at 17:49 +0530, Calvin Johnson wrote:
If the 4th to last-page are left blank and not covered with ECC, what
will happen in case of bit flips on the blank pages? There was an
issue reported some time
From: abraham.varric...@vvdntech.com
Hello,
Thanks to the help I obtained on this mailing list, I've been able to
customize u-boot (2013.10 release) to work on a custom omap4460 board.
Schematically, it's similar to the pandaboard, but uses the twl6032
pmic and has a NAND memory from micron
Hi Artem,
I wanted to check the 'white-space-fixup' and re-reading your
documentation before, so got delayed in replying.
+ my mail got moderated again by mailman..
From: Artem Bityutskiy [mailto:artem.bityuts...@linux.intel.com]
[...]
If you are worried about fragmentation, we can discuss
Hello Enric, Nikita, and other OMAP3 users,
As there were parallel set of patches running between u-boot and kernel.
hence, some patch-sets caused regression for OMAP3x platforms when booting
using u-boot specifically for ecc-schemes (like BCH4_SW).
Hence this patch series fixes those
Hi All,
I have been facing a weird problem, may be someone has a solution.
*_Case-1_ Flashing UBIFS image from u-boot using 'nand write' utility*
For a partially written erased-block..
(a) 1st page is written with 'erase-header'
(b) 2nd page is written with 'volume-header'
(c) '3rd page' is
Hi,
From: Igor Grinberg [mailto:grinb...@compulab.co.il]
On 12/11/13 23:18, Gupta, Pekon wrote:
From: Nikita Kiryanov [mailto:nik...@compulab.co.il]
Commit mtd: nand: omap: enable BCH ECC scheme using ELM for generic
platform
(d016dc42cedbf6102e100fa9ecb58462edfb14f8) changed the way
Hi Nikita,
Just minor feedback ..
From: Nikita Kiryanov [mailto:nik...@compulab.co.il]
Subject: [PATCH] arm: omap: nand: setup sw ecc size using default value
Just include mtd: nand: omap: fix HAM1_SW ... as prefix to your patch title.
Example: mtd: nand: omap: fix HAM1_SW using default setup
From: Nikita Kiryanov [mailto:nik...@compulab.co.il]
Commit mtd: nand: omap: enable BCH ECC scheme using ELM for generic
platform (d016dc42cedbf6102e100fa9ecb58462edfb14f8) changed the way
software ECC is configured, both during boot, and during ecc switch, in a way
that is not backwards
Hi Enric,
From: Enric Balletbo Serra [mailto:eballe...@gmail.com]
Note that look the same except after byte number 16. In the first case is
ff 52 3f 7d 2a 7f a2 98 70
and in the second case is
52 3f 7d 2a 7f a2 98 70
It's possible that something is wrong writting the OOB data ? Any
Hi Nikita,
From: Nikita Kiryanov [mailto:nik...@compulab.co.il]
Commit mtd: nand: omap: enable BCH ECC scheme using ELM for generic platform
(d016dc42cedbf6102e100fa9ecb58462edfb14f8) changed the way software ECC is
configured, both during boot, and during ecc switch, in a way that is not
Hi Enric,
Sorry I missed your earlier mail, so din't check this..
From: Enric Balletbo Serra [mailto:eballe...@gmail.com]
I saw that the OOB layout is not the same when I flash the rootfs from
the u-boot or from the kernel. For example:
If the rootfs is flashed from the kernel the OOB data
Hello Scott,
From: Gupta, Pekon
Subject: [PATCH v9 0/4] mtd: nand: omap: optimize OMAP NAND driver
OMAP NAND drivers support various ecc-schemes like (HAM1, BCH4, BCH8..)
And, each ecc-scheme usually has 2 implementations
- HAM1_HW or BCHx_HW (using in-build h/w engine for all computation
Hi Stefan,
From: Stefan Roese [mailto:s...@denx.de]
On 03.12.2013 17:07, Nikita Kiryanov wrote:
[...]
When based on v2014.01-rc1, SPL itself doesn't boot from NAND (no SPL
header or any visible activity when booting from NAND).
Yes. I have now tested this as well. I have been digging into
Hi Stefan,
From: Stefan Roese [mailto:s...@denx.de]
Subject: [PATCH] mtd: nand: omap_gpmc: cosmetic: Fix indentation
Signed-off-by: Stefan Roese s...@denx.de
Cc: Pekon Gupta pe...@ti.com
Cc: Scott Wood scottw...@freescale.com
---
drivers/mtd/nand/omap_gpmc.c | 86
From: Abraham V. [mailto:abraham.varric...@vvdntech.com]
4. At this point we'll get some complaints about missing static
definitions, so apply the following patch to add them in the common
configuration file;
diff --git a/include/configs/omap4_common.h b/include/configs/omap4_common.h
These
From: Abraham V. [mailto:abraham.varric...@vvdntech.com]
1. Added NAND as a configuration option in boards.cfg
Yes this is correct ..
[...]
2. Added NAND support in omap4_common.h configuration file
as below (Just copied the lines from am335x_evm.h
--- a/include/configs/omap4_common.h
From: u-boot-boun...@lists.denx.de [mailto:u-boot-
Wolfgang,
good morning.
On Monday, October 28, 2013 04:07 AM, Wolfgang Denk wrote:
In message 1382865251-17302-1-git-send-email...@denx.de I wrote:
Building boards that have JFFS2 support enabled will fail when using
U-Boot's builtin
From: Scott Wood [mailto:scottw...@freescale.com]
[..]
-void omap_nand_switch_ecc(uint32_t hardware, uint32_t
eccstrength)
+int __maybe_unused omap_nand_switch_ecc(uint32_t hardware,
uint32_t eccstrength)
{
struct nand_chip *nand;
struct mtd_info *mtd;
From: Scott Wood [mailto:scottw...@freescale.com]
On Thu, Nov 21, 2013 at 10:41:59AM +0530, Pekon Gupta wrote:
*changes in v11*
[PATCH 2/4] fixed 'unused variable' warning
If this is the only thing that changed, and the fix was just to remove
the bch variable, I'll keep the v10 patches
Hi,
From: Abraham V. [abraham.varric...@vvdntech.com]
Pekon Gupta pe...@ti.com wrote:
OMAP NAND drivers support various ecc-schemes like (HAM1, BCH4, BCH8..)
And, each ecc-scheme usually has 2 implementations
- HAM1_HW or BCHx_HW (using in-build h/w engine for all computation)
-
From: Scott Wood [mailto:scottw...@freescale.com]
On Tue, Sep 10, 2013 at 12:55:07PM +0530, pekon gupta wrote:
With increase in NAND flash densities occurence of bit-flips has increased.
Thus stronger ECC schemes are required for detecting and correcting
multiple
simultaneous bit-flips
From: Scott Wood [mailto:scottw...@freescale.com]
On Mon, 2013-11-18 at 19:03 +0530, Pekon Gupta wrote:
@@ -763,77 +903,47 @@ static void __maybe_unused
omap_free_bch(struct mtd_info *mtd)
* @eccstrength- the number of bits that could be corrected
* (1 -
Hi Matti,
From: matti kaasinen [mailto:matti.kaasi...@gmail.com]
I try to use Angstrom distribution as a base for my design. Angstrom provides
3.8.13 kernel for beaglebone. There drivers/mtd/nand/omap2.c seems pretty
demanding as far as changing chip-ecc.bytes configuration is concerned.
From: matti kaasinen [matti.kaasi...@gmail.com]
[...]
You mentioned, that OMAP_ECC_BCH8_CODE_HW mode and
ecc.bytes=14 has to be used. I suppose that at least the
former option requires kernel patching like explained in
http://processors.wiki.ti.com/index.php/AM35x-OMAP35x
From: matti kaasinen [matti.kaasi...@gmail.com]
Sent: Thursday, November 07, 2013 6:11 PM
To: Gupta, Pekon
Cc: Matthias Fuchs; Rini, Tom; scottw...@freescale.com; u-boot@lists.denx.de;
Balbi, Felipe
Subject: Re: [U-Boot] [PATCH v8 0/5] mtd: nand: omap: optimize
From: Scott Wood [mailto:scottw...@freescale.com]
On Tue, Sep 10, 2013 at 06:57:05PM +0530, pekon gupta wrote:
From: Matthieu CASTET matthieu.cas...@parrot.com
This patch is slightly modified from following linux patch
http://lists.infradead.org/pipermail/linux-mtd/2012-
Hi Matti and Matthias
Sorry I was away from my mailbox so couldn't reply you earlier.
I'm still away from my setup and other boards, so cannot replicate
the issue below until early next week. But I'll surely do so asap..
However, please see my replies below, which might help you someway.
From: Scott Wood [mailto:scottw...@freescale.com]
On Wed, 2013-10-16 at 18:44 +, Gupta, Pekon wrote:
Please let me know if you can pick this series, Or if you want me to fix
indentation.
I would be sending another series which also has some of your feedbacks.
I'll take it, but I
Hi,
From: Scott Wood [scottw...@freescale.com]
From: Scott Wood [mailto:scottw...@freescale.com]
On Thu, 2013-10-10 at 16:30 +0530, Pekon Gupta wrote:
[snip]
-#else
+ } else {
/*
* This ecc_size_config setting is for BCH sw library.
*
@@ -333,7 +330,7 @@ static
From: Scott Wood [mailto:scottw...@freescale.com]
On Thu, 2013-10-10 at 16:30 +0530, Pekon Gupta wrote:
[snip]
-#else
+ } else {
/*
* This ecc_size_config setting is for BCH sw library.
*
@@ -333,7 +330,7 @@ static void omap_hwecc_init_bch(struct nand_chip
*chip,
Hi,
On Tue, 2013-10-08 at 11:52 -0500, Scott Wood wrote:
On Tue, 2013-10-08 at 05:30 +, Gupta, Pekon wrote:
Anyways I would take the changes if you wish so..
But request you to please provide comments on all the patches, before
I send next revision. This would help me consolidate all
From: Scott Wood [mailto:scottw...@freescale.com]
On Sat, 2013-10-05 at 06:11 +, Gupta, Pekon wrote:
Hi,
Please see the replies inline..
From: Scott Wood [mailto:scottw...@freescale.com]
On Mon, 2013-09-30 at 19:43 +0530, Pekon Gupta wrote:
+Platform specific options
Hi,
Please see the replies inline..
From: Scott Wood [mailto:scottw...@freescale.com]
On Mon, 2013-09-30 at 19:43 +0530, Pekon Gupta wrote:
+Platform specific options
+=
+
+ CONFIG_NAND_OMAP_ECCSCHEME
+ On OMAP platforms, this specifies NAND ECC scheme.
Hi Scott, Tom,
Subject: [PATCH v7 0/5] mtd: nand: omap: optimize and clean-up of OMAP
NAND driver
*changes in v7*
[PATCH 1/5]
- omap_gpmc.c: fix: free bytes in OOB (ecclayout-
oobfree[0].length)
- omap_gpmc.c: cleanup: redundant code added in previous patch
versions
-
Hi,
Please see last set of queries inline..
From: Scott Wood [mailto:scottw...@freescale.com]
On Sat, 2013-09-28 at 06:24 +, Gupta, Pekon wrote:
From: Scott Wood [mailto:scottw...@freescale.com]
On Fri, 2013-09-27 at 04:18 +, Gupta, Pekon wrote:
[snip]
(1) drivers/mtd/nand
From: u-boot-boun...@lists.denx.de [mailto:u-boot-
Dear pshambhu,
In message 1380547665536-164381.p...@n7.nabble.com you wrote:
As per previous posting i got to know that, there will be only one reset
entry point, can't i have the another entry point in it.
You can talk to your chip
Hi,
From: Wolfgang Denk [mailto:w...@denx.de]
Dear Gupta, Pekon,
In message
20980858cb6d3a4bae95ca194937d5e73ea18...@dbde04.ent.ti.com
you can tweak your hardware to split it, and many micro-controllers
do it (especially for safety critical applications). Example:
Suppose 'default
Hi Mark,
From: Mark Jackson [mailto:mpfj-l...@newflow.co.uk]
To: Gupta, Pekon; scottw...@freescale.com; Rini, Tom
snip
diff --git a/include/configs/am335x_evm.h
b/include/configs/am335x_evm.h
index 978bca7..c92cb2f 100644
--- a/include/configs/am335x_evm.h
+++ b/include/configs
Hi Stefan,
From: Stefan Roese [mailto:s...@denx.de]
On 30.09.2013 16:13, Pekon Gupta wrote:
BCH8_ECC scheme implemented in omap_gpmc.c driver has following
favours
+---+-+-+
|ECC Scheme | ECC
Hi Stefan,
From: Stefan Roese [mailto:s...@denx.de]
On 30.09.2013 16:13, Pekon Gupta wrote:
BCH8_ECC scheme implemented in omap_gpmc.c driver has following
favours
+---+-+-+
|ECC Scheme | ECC
From: Scott Wood [mailto:scottw...@freescale.com]
On Fri, 2013-09-27 at 04:18 +, Gupta, Pekon wrote:
From: Scott Wood [mailto:scottw...@freescale.com]
On Thu, 2013-09-26 at 13:14 +, Gupta, Pekon wrote:
From: Gupta, Pekon pe...@ti.com
[snip]
The changelog
be useful due to size
constraints, and you only care about the boot device), it's best to let
drivers determine the best way to learn about such configuration.
From: Gupta, Pekon pe...@ti.com
NAND driver needs to know bus-width of the connected NAND device, in
order to perform proper I/O
to learn about such configuration.
From: Gupta, Pekon pe...@ti.com
NAND driver needs to know bus-width of the connected NAND device, in
order to perform proper I/O and initialize itself. Currently there is no
CONFIG
option to provide this information to NAND driver.
- SPL NAND driver
From: Scott Wood [mailto:scottw...@freescale.com]
On Thu, 2013-09-26 at 13:14 +, Gupta, Pekon wrote:
From: Gupta, Pekon pe...@ti.com
NAND driver needs to know bus-width of the connected NAND device,
in
order to perform proper I/O and initialize itself. Currently
On Tue, Aug 06, 2013 at 01:45:08PM +0530, Pekon Gupta wrote:
ti814x_evm has on-board socket for using Micron (MT29Fxx) family of
NAND devices to GPMC interface. This patch
- adds NAND related pin-mux configuration for same
- adds #defines for NAND partitions to TI814x configs
-
(apologies for multiple mails, but mails from my client were rejected
due to some client configuration)
On Tue, 2013-09-03 at 11:26 +0530, Pekon Gupta wrote:
diff --git a/doc/README.nand b/doc/README.nand
index 913e9b5..f72f618 100644
--- a/doc/README.nand
+++ b/doc/README.nand
@@
From: Tom Rini [tom.r...@gmail.com] on behalf of Rini, Tom
Sent: Saturday, August 24, 2013 3:49 AM
To: Gupta, Pekon
Cc: scottw...@freescale.com; u-boot@lists.denx.de
Subject: Re: [U-Boot] [PATCH v2 0/4] mtd: nand: omap: optimize and clean-up of
OMAP NAND
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