ld we exchange information w/o ccing the
list?
Best regards,
*Jian Luo
DC-IA/EAH2*
Tel. +49(9352)18-4266
*Be**QIK
*
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot
recalculation is all skipped.
Best regards,
*Jian Luo
DC-IA/EAH2*
Tel. +49(9352)18-4266
*Be**QIK
*
On 19.07.2016 17:21, Christian Gmeiner wrote:
Hi Jian,
For the moment I have no answer to this question. I need to dive into
the vxworks code, which
is not what I like to do now (but needs
Hi Bin,
On 19.07.2016 10:10, Bin Meng wrote:
Hi Jian,
On Tue, Jul 19, 2016 at 4:03 PM, Jian Luo <jian.l...@boschrexroth.de> wrote:
Hallo Christian,
On 19.07.2016 08:02, Christian Gmeiner wrote:
Hi Bin
For the moment I have no answer to this question. I need to dive into
the vxwork
Hi,
please add
Tested-by: Jian Luo <jian.l...@boschrexroth.de> on crownbay
Best regards,
Jian Luo
On 24.09.2015 11:21, Bin Meng wrote:
> This series adds better support of booting VxWorks using 'bootvx'.
>
> Tested by booting a VxWorks 6.9.4 kernel on Intel Crown Bay, an
Hi Dinh, Hi Marek,
any updates on this issue?
Best regards,
Jian Luo
On 04.09.2015 16:32, Marek Vasut wrote:
> On Friday, September 04, 2015 at 04:26:46 PM, Simon Glass wrote:
>> On 4 September 2015 at 08:25, Marek Vasut <ma...@denx.de> wrote:
>>> On Friday, September
Hi Simon,
On 04.09.2015 02:23, Simon Glass wrote:
> Hi,
>
> On 3 September 2015 at 05:14, Marek Vasut <ma...@denx.de> wrote:
>> On Thursday, September 03, 2015 at 01:12:03 PM, Jian Luo wrote:
>>> On 03.09.2015 12:46, Marek Vasut wrote:
>>> > On Thursda
Hi!
On 03.09.2015 11:41, Marek Vasut wrote:
> On Wednesday, September 02, 2015 at 06:27:41 PM, Jian Luo wrote:
>> Hi!
>>
>> this error comes again. It isn't a compiler error after all. :(
>>
>> JTAG inspection shows that the problem is located in
>
On 03.09.2015 12:09, Marek Vasut wrote:
> On Thursday, September 03, 2015 at 12:03:44 PM, Jian Luo wrote:
>> Hi!
>
> Hi!
>
>> On 03.09.2015 11:41, Marek Vasut wrote:
>> > On Wednesday, September 02, 2015 at 06:27:41 PM, Jian Luo wrote:
>> >> Hi!
&
On 03.09.2015 12:46, Marek Vasut wrote:
> On Thursday, September 03, 2015 at 12:17:13 PM, Jian Luo wrote:
>
> Hi!
>
> [...]
>
>> >> Yes, I can. But U-Boot can still have problem with other Image which
>> >> disables ECC.
>> >> I f
Re-enabling OCRAM ECC can cause some value changes in SRAM. Just
clear fake interrupt status and keep other bits intact.
Signed-off-by: Jian Luo <jian.l...@boschrexroth.de>
---
arch/arm/mach-socfpga/spl.c | 14 --
1 file changed, 8 insertions(+), 6 deletions(-)
diff --git a/ar
Re-enabling OCRAM ECC can cause some value changes in SRAM. Just
clear fake interrupt status and keep other bits intact.
Signed-off-by: Jian Luo <jian.l...@boschrexroth.de>
---
Changes for v2:
- add CC to custodian
arch/arm/mach-socfpga/spl.c | 14 --
1 file chan
generic
code.
2. Clear gd afterwards: requires replication of every early stage gd
setting.
Best regards,
Jian Luo
DC-IA/EAH2
Tel. +49(9352)18-4266
BeQIK
On 31.08.2015 15:28, Marek Vasut wrote:
> On Monday, August 31, 2015 at 03:00:22 PM, Jian Luo wrote:
>> Hi,
>
> Hi!
>
Hi Marek,
On 02.09.2015 12:27, Marek Vasut wrote:
> On Tuesday, September 01, 2015 at 02:32:26 PM, Jian Luo wrote:
>> Hi Marek,
>
> Hi!
>
>> On 01.09.2015 14:03, Marek Vasut wrote:
>> > On Tuesday, September 01, 2015 at 01:49:43 PM, Jian Luo wrote:
>> --
ate.
Is any one working on this?
Thanks!
--
Best regards,
Jian Luo
Link and Text of the note:
https://support.criticallink.com/redmine/projects/mityarm-5cs/wiki/Important_Note_about_FPGAHPS_SDRAM_Bridge
Important Note about FPGA/HPS SDRAM Bridge (2013-12-13)
Altera has recently disclo
**
Hi Marek,
On 01.09.2015 11:03, Marek Vasut wrote:
On Tuesday, September 01, 2015 at 10:41:31 AM, Jian Luo wrote:
Hi!
Hi,
I've read about an implementation requirement regarding the usage of
FPGA/HPS SDRAM bridge.
(Link and Text attached at the end.)
The 3. step involves writing
Hi Marek,
On 01.09.2015 14:03, Marek Vasut wrote:
> On Tuesday, September 01, 2015 at 01:49:43 PM, Jian Luo wrote:
snip
>> What about calling socfpga_sdram_apply_static_cfg() direct in
>> socfpga_load() in drivers/fpga/socfpga.c to make it generic?
>
> Which code
Hi,
On 28.08.2015 23:48, Marek Vasut wrote:
On Friday, August 28, 2015 at 02:09:15 PM, Jian Luo wrote:
Hi Marek,
Hi,
On 28.08.2015 14:01, Marek Vasut wrote:
> On Friday, August 28, 2015 at 01:40:08 PM, Jian Luo wrote:
snip
>> "Security policy". :(
>
&
gd-dm_root is not cleared in SPL after warm reset.
This might cause DM initilazation failure.
Signed-off-by: Jian Luo jian.l...@boschrexroth.de
---
arch/arm/mach-socfpga/spl.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/arch/arm/mach-socfpga/spl.c b/arch/arm/mach-socfpga/spl.c
Hi Marek,
On 28.08.2015 11:24, Marek Vasut wrote:
On Friday, August 28, 2015 at 10:41:50 AM, Jian Luo wrote:
gd-dm_root is not cleared in SPL after warm reset.
This might cause DM initilazation failure.
Signed-off-by: Jian Luo jian.l...@boschrexroth.de
Hi!
---
arch/arm/mach-socfpga
On 28.08.2015 12:30, Marek Vasut wrote:
On Friday, August 28, 2015 at 12:27:18 PM, Jian Luo wrote:
Hi Marek,
On 28.08.2015 11:24, Marek Vasut wrote:
On Friday, August 28, 2015 at 10:41:50 AM, Jian Luo wrote:
gd-dm_root is not cleared in SPL after warm reset.
This might cause DM
Hi Marek,
On 28.08.2015 14:01, Marek Vasut wrote:
On Friday, August 28, 2015 at 01:40:08 PM, Jian Luo wrote:
snip
Security policy. :(
But thunderbird works ? Can't you just copy the SMTP settings from
thunderbird
into gitconfig ? :)
I tried w/o success. Might try again another
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