Another related issue that I was confused by is that I expected the FDT address
to be in the variable fdt_addr_r but it is in fdt_addr. In the U-Boot
documentation here
https://u-boot.readthedocs.io/en/latest/usage/environment.html#image-locations,
*_r variables indicate addresses in RAM whereas
I sent a new version of the patch series with a couple of fixes and
instructions for testing with QEMU.
On Tue, Nov 23, 2021 at 10:24 AM Tom Rini wrote:
> On Sun, Oct 24, 2021 at 07:58:03PM -0400, Jim Posen wrote:
>
> > Currently, when U-Boot is running in hypervisor mode on
This machine is run with "qemu-system-arm -M virt,virtualization".
Signed-off-by: Jim Posen
---
Changes in v2:
- Add QEMU config option for ARM32 with virtualization extensions
arch/arm/mach-qemu/Kconfig | 6 ++
1 file changed, 6 insertions(+)
diff --git a/arch/arm/mach-qemu
The link register is at a different offset depending on processor
mode, so ensure it applies the correct adjustment.
Signed-off-by: Jim Posen
---
(no changes since v1)
arch/arm/include/asm/u-boot-arm.h | 14 +++---
arch/arm/lib/interrupts.c | 26
This is the base address register for the vector table when in
hypervisor mode.
Signed-off-by: Jim Posen
---
Changes in v2:
- Fix CP15 register written to in start.S
- Check processor mode as HVBAR register is only accessible in HYP
mode
arch/arm/cpu/armv7/start.S | 8
arch
This code was missed in commit 01abae4d0486 ("Remove
various unused interrupt related code")
Signed-off-by: Jim Posen
---
(no changes since v1)
arch/arm/lib/vectors.S | 32 +---
1 file changed, 1 insertion(+), 31 deletions(-)
diff --git a/arch/arm/lib/v
Create separate vector table for exceptions taken to PL2, which
happens when U-Boot is running in hypervisor mode. The handler logic
is different enough that a separate vector table is the simplest way
to handle it.
Signed-off-by: Jim Posen
---
(no changes since v1)
arch/arm/lib/vectors.S
In order to assemble instructions that read the ELR_hyp register,
which is part of the ARMv7-A virtualization extensions, the assembler
target architecture needs to be changed.
Signed-off-by: Jim Posen
---
(no changes since v1)
arch/arm/Makefile | 4
arch/arm/mach-bcm283x
x CP15 register written to in start.S
- Check processor mode as HVBAR register is only accessible in HYP
mode
- Add QEMU config option for ARM32 with virtualization extensions
Jim Posen (6):
Compile for ARMv7-A with virtualization extensions
Hypervisor mode interrupt vector table
Set HVBAR regi
In the recovery function abort_td run after timed out XHCI transfers,
there's a possible NULL pointer dereference. Instead, explicitly
BUG_ON that condition.
Signed-off-by: Jim Posen
---
drivers/usb/host/xhci-ring.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/usb/host/xhci
The link register is at a different offset depending on processor
mode, so ensure it applies the correct adjustment.
Signed-off-by: Jim Posen
---
arch/arm/include/asm/u-boot-arm.h | 14 +++---
arch/arm/lib/interrupts.c | 26 +-
arch/arm/lib/vectors.S
This code was missed in commit 01abae4d0486 ("Remove
various unused interrupt related code")
Signed-off-by: Jim Posen
---
arch/arm/lib/vectors.S | 32 +---
1 file changed, 1 insertion(+), 31 deletions(-)
diff --git a/arch/arm/lib/vectors.S b/arch/arm/lib
This is the base address register for the vector table when in
hypervisor mode.
Signed-off-by: Jim Posen
---
arch/arm/cpu/armv7/start.S | 5 +
arch/arm/lib/relocate.S| 8
2 files changed, 13 insertions(+)
diff --git a/arch/arm/cpu/armv7/start.S b/arch/arm/cpu/armv7/start.S
Create separate vector table for exceptions taken to PL2, which
happens when U-Boot is running in hypervisor mode. The handler logic
is different enough that a separate vector table is the simplest way
to handle it.
Signed-off-by: Jim Posen
---
arch/arm/lib/vectors.S | 95
In order to assemble instructions that read the ELR_hyp register,
which is part of the ARMv7-A virtualization extensions, the assembler
target architecture needs to be changed.
Signed-off-by: Jim Posen
---
arch/arm/Makefile | 4
arch/arm/mach-bcm283x/Kconfig | 3 +++
arch/arm
ARMv7-A".
I have verified that this patch series works on the ODroid XU4 and
the Raspberry Pi 3B in Aarch32 mode when running in hypervisor mode.
One simple way to verify is by running the miscellaneous "exception"
command (CMD_EXCEPTION).
Jim Posen (5):
Compile for ARMv7-A
I've run into an issue with exception handling on the Raspberry Pi 3 in
32-bit
mode (config rpi_3_32b) and the ODroid XU4 (config odroid-xu3). When
testing
the "exception undefined" command, instead of printing out register info
and
resetting the CPU like it's supposed to, U-Boot just hangs.
I
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