Re: [PATCH] rpi: always set fdt_addr to the correct value

2022-04-12 Thread Jim Posen
Another related issue that I was confused by is that I expected the FDT address to be in the variable fdt_addr_r but it is in fdt_addr. In the U-Boot documentation here https://u-boot.readthedocs.io/en/latest/usage/environment.html#image-locations, *_r variables indicate addresses in RAM whereas

Re: [RFC PATCH 0/5] Exception handling in HYP mode on ARMv7-A

2021-11-24 Thread Jim Posen
I sent a new version of the patch series with a couple of fixes and instructions for testing with QEMU. On Tue, Nov 23, 2021 at 10:24 AM Tom Rini wrote: > On Sun, Oct 24, 2021 at 07:58:03PM -0400, Jim Posen wrote: > > > Currently, when U-Boot is running in hypervisor mode on

[PATCH v2 6/6] Config to target QEMU virt machine with virtualization

2021-11-24 Thread Jim Posen
This machine is run with "qemu-system-arm -M virt,virtualization". Signed-off-by: Jim Posen --- Changes in v2: - Add QEMU config option for ARM32 with virtualization extensions arch/arm/mach-qemu/Kconfig | 6 ++ 1 file changed, 6 insertions(+) diff --git a/arch/arm/mach-qemu

[PATCH v2 5/6] Fix PC adjustment logic in exception handlers

2021-11-24 Thread Jim Posen
The link register is at a different offset depending on processor mode, so ensure it applies the correct adjustment. Signed-off-by: Jim Posen --- (no changes since v1) arch/arm/include/asm/u-boot-arm.h | 14 +++--- arch/arm/lib/interrupts.c | 26

[PATCH v2 3/6] Set HVBAR register correctly

2021-11-24 Thread Jim Posen
This is the base address register for the vector table when in hypervisor mode. Signed-off-by: Jim Posen --- Changes in v2: - Fix CP15 register written to in start.S - Check processor mode as HVBAR register is only accessible in HYP mode arch/arm/cpu/armv7/start.S | 8 arch

[PATCH v2 4/6] Remove dead code

2021-11-24 Thread Jim Posen
This code was missed in commit 01abae4d0486 ("Remove various unused interrupt related code") Signed-off-by: Jim Posen --- (no changes since v1) arch/arm/lib/vectors.S | 32 +--- 1 file changed, 1 insertion(+), 31 deletions(-) diff --git a/arch/arm/lib/v

[PATCH v2 2/6] Hypervisor mode interrupt vector table

2021-11-24 Thread Jim Posen
Create separate vector table for exceptions taken to PL2, which happens when U-Boot is running in hypervisor mode. The handler logic is different enough that a separate vector table is the simplest way to handle it. Signed-off-by: Jim Posen --- (no changes since v1) arch/arm/lib/vectors.S

[PATCH v2 1/6] Compile for ARMv7-A with virtualization extensions

2021-11-24 Thread Jim Posen
In order to assemble instructions that read the ELR_hyp register, which is part of the ARMv7-A virtualization extensions, the assembler target architecture needs to be changed. Signed-off-by: Jim Posen --- (no changes since v1) arch/arm/Makefile | 4 arch/arm/mach-bcm283x

[PATCH v2 0/6] Exception handling in HYP mode on ARMv7-A

2021-11-24 Thread Jim Posen
x CP15 register written to in start.S - Check processor mode as HVBAR register is only accessible in HYP mode - Add QEMU config option for ARM32 with virtualization extensions Jim Posen (6): Compile for ARMv7-A with virtualization extensions Hypervisor mode interrupt vector table Set HVBAR regi

[PATCH] Avoid possible NULL dereference in XHCI driver

2021-10-25 Thread Jim Posen
In the recovery function abort_td run after timed out XHCI transfers, there's a possible NULL pointer dereference. Instead, explicitly BUG_ON that condition. Signed-off-by: Jim Posen --- drivers/usb/host/xhci-ring.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/usb/host/xhci

[RFC PATCH 5/5] Fix PC adjustment logic in exception handlers

2021-10-24 Thread Jim Posen
The link register is at a different offset depending on processor mode, so ensure it applies the correct adjustment. Signed-off-by: Jim Posen --- arch/arm/include/asm/u-boot-arm.h | 14 +++--- arch/arm/lib/interrupts.c | 26 +- arch/arm/lib/vectors.S

[RFC PATCH 4/5] Remove dead code

2021-10-24 Thread Jim Posen
This code was missed in commit 01abae4d0486 ("Remove various unused interrupt related code") Signed-off-by: Jim Posen --- arch/arm/lib/vectors.S | 32 +--- 1 file changed, 1 insertion(+), 31 deletions(-) diff --git a/arch/arm/lib/vectors.S b/arch/arm/lib

[RFC PATCH 3/5] Set HVBAR register correctly

2021-10-24 Thread Jim Posen
This is the base address register for the vector table when in hypervisor mode. Signed-off-by: Jim Posen --- arch/arm/cpu/armv7/start.S | 5 + arch/arm/lib/relocate.S| 8 2 files changed, 13 insertions(+) diff --git a/arch/arm/cpu/armv7/start.S b/arch/arm/cpu/armv7/start.S

[RFC PATCH 2/5] Hypervisor mode interrupt vector table

2021-10-24 Thread Jim Posen
Create separate vector table for exceptions taken to PL2, which happens when U-Boot is running in hypervisor mode. The handler logic is different enough that a separate vector table is the simplest way to handle it. Signed-off-by: Jim Posen --- arch/arm/lib/vectors.S | 95

[RFC PATCH 1/5] Compile for ARMv7-A with virtualization extensions

2021-10-24 Thread Jim Posen
In order to assemble instructions that read the ELR_hyp register, which is part of the ARMv7-A virtualization extensions, the assembler target architecture needs to be changed. Signed-off-by: Jim Posen --- arch/arm/Makefile | 4 arch/arm/mach-bcm283x/Kconfig | 3 +++ arch/arm

[RFC PATCH 0/5] Exception handling in HYP mode on ARMv7-A

2021-10-24 Thread Jim Posen
ARMv7-A". I have verified that this patch series works on the ODroid XU4 and the Raspberry Pi 3B in Aarch32 mode when running in hypervisor mode. One simple way to verify is by running the miscellaneous "exception" command (CMD_EXCEPTION). Jim Posen (5): Compile for ARMv7-A

Exception handling in HYP mode on ARMv7-A

2021-10-12 Thread Jim Posen
I've run into an issue with exception handling on the Raspberry Pi 3 in 32-bit mode (config rpi_3_32b) and the ODroid XU4 (config odroid-xu3). When testing the "exception undefined" command, instead of printing out register info and resetting the CPU like it's supposed to, U-Boot just hangs. I