[U-Boot] [PATCH v3] arm: am33xx: Initialize EMIF REG_PR_OLD_COUNT for BBB and am335x-evm

2016-12-09 Thread Jyri Sarha
when heavy memory load is generated by CPU. 32bpp colors were used in the test. On BBB the video mode used 110MHz pixel clock. The mode supported by the panel of am335x-evm uses 30MHz pixel clock. Signed-off-by: Jyri Sarha <jsa...@ti.com> --- Changes since v2: - Improved the comment in bo

Re: [U-Boot] [PATCH v2] arm: am33xx: Initialize EMIF REG_PR_OLD_COUNT for BBB and am335x-evm

2016-12-08 Thread Jyri Sarha
On 12/08/16 16:30, Tom Rini wrote: > On Thu, Dec 08, 2016 at 12:19:01PM +0200, Jyri Sarha wrote: > >> Initialize EMIF OCP_CONFIG registers REG_COS_COUNT_1, REG_COS_COUNT_2, >> and REG_PR_OLD_COUNT field for Beaglebone-Black and am335x-evm. With >> the default values LC

[U-Boot] [PATCH v2] arm: am33xx: Initialize EMIF REG_PR_OLD_COUNT for BBB and am335x-evm

2016-12-08 Thread Jyri Sarha
when heavy memory load is generated by CPU. 32bpp colors were used in the test. On BBB the video mode used 110MHz pixel clock. The mode supported by the panel of am335x-evm uses 30MHz pixel clock. Signed-off-by: Jyri Sarha <jsa...@ti.com> --- Changes since v2: - Move board sp

Re: [U-Boot] [PATCH] arm: am33xx: Initialize EMIF REG_PR_OLD_COUNT for BBB and am335x-evm

2016-12-02 Thread Jyri Sarha
On 12/02/16 15:06, Jyri Sarha wrote: >>> diff --git a/arch/arm/include/asm/arch-am33xx/ddr_defs.h >>> b/arch/arm/include/asm/arch-am33xx/ddr_defs.h >>> >> index 43e122e..c71cfd0 100644 >>> >> --- a/arch/arm/include/asm/arch-am33xx/ddr_defs

Re: [U-Boot] [PATCH] arm: am33xx: Initialize EMIF REG_PR_OLD_COUNT for BBB and am335x-evm

2016-12-02 Thread Jyri Sarha
On 12/02/16 15:01, Tom Rini wrote: > On Fri, Dec 02, 2016 at 09:54:39AM +0200, Jyri Sarha wrote: > >> Initialize EMIF OCP_CONFIG registers REG_COS_COUNT_1, REG_COS_COUNT_2, >> and REG_PR_OLD_COUNT field for Beaglebone-Black and am335x-evm. With >> the default values LC

[U-Boot] [PATCH] arm: am33xx: Initialize EMIF REG_PR_OLD_COUNT for BBB and am335x-evm

2016-12-02 Thread Jyri Sarha
when heavy memory load is generated by CPU. 32bpp colors were used in the test. On BBB the video mode used 110MHz pixel clock. The mode supported by the panel of am335x-evm uses 30MHz pixel clock. Signed-off-by: Jyri Sarha <jsa...@ti.com> --- This patch have been part of TI's latest 2016LTS