on these patches and I believe
that they should be acceptable for merging into next now.
Cheers,
Kyle Moffett
--
Interested in my work on the Debian powerpcspe port?
I'm keeping a blog here: http://pureperl.blogspot.com/
___
U-Boot mailing list
U-Boot
in an ISO9660 boot
volume (El-Torito format) by reordering the filesystem checks and
reading the 0x55 0xAA DOS boot signature and FAT/FAT32 magic number
from the first sector of the partition instead of from sector 0.
Signed-off-by: Kyle Moffett kyle.d.moff...@boeing.com
--
v2:
I have removed
an error but instead return 0 to
indicate the number of blocks successfully read (IE: None).
The FAT filesystem should defensively check to ensure that it got all of
the sectors that it asked for when reading.
Signed-off-by: Kyle Moffett kyle.d.moff...@boeing.com
--
v2: No change
---
fs/fat
media has a 2048-byte blocksize, resulting in a
maximum transfer size of 40960 bytes, which does not fit.
Since the EHCI specification is impossibly obtuse and far beyond my
comprehension, I chose to dynamically compute the limit based on the
blocksize.
Signed-off-by: Kyle Moffett kyle.d.moff
The included series of 3 patches fixes several bugs in the FAT code
and the USB storage stack to make it possible to read from a FAT
filesystem image embedded as an El-Torito boot image in an ISO9660
volume (IE: a CD or DVD).
This has been tested on the eXMeritus HWW-1U-1A.
in an ISO9660 boot
volume (El-Torito format) by reordering the filesystem checks and
reading the 0x55 0xAA DOS boot signature and FAT/FAT32 magic number
from the first sector of the partition instead of from sector 0.
Signed-off-by: Kyle Moffett kyle.d.moff...@boeing.com
---
fs/fat/fat.c | 123
an error but instead return 0 to
indicate the number of blocks successfully read (IE: None).
The FAT filesystem should defensively check to ensure that it got all of
the sectors that it asked for when reading.
Signed-off-by: Kyle Moffett kyle.d.moff...@boeing.com
---
fs/fat/fat.c | 18
media has a 2048-byte blocksize, resulting in a
maximum transfer size of 40960 bytes, which does not fit.
Since the EHCI specification is impossibly obtuse and far beyond my
comprehension, I chose to dynamically compute the limit based on the
blocksize.
Signed-off-by: Kyle Moffett kyle.d.moff
is very similar to Linux v3.2-rc4.
Signed-off-by: Kyle Moffett kyle.d.moff...@boeing.com
Cc: Wolfgang Denk w...@denx.de
Cc: Mike Frysinger vap...@gentoo.org
--
Changelog:
v3: Fix localversion-* file support and minimize kernel delta.
---
tools/setlocalversion | 185
situations by using different plumbing commands.
The version from the kernel is not directly usable as it has code for
supporting CONFIG_LOCALVERSION from Kconfig, but the version that was
imported is very similar to the one in Linux v3.2-rc4.
Signed-off-by: Kyle Moffett kyle.d.moff...@boeing.com
Cc
VL493T5663D-E6M
2 GiB (DDR2, 64-bit, CL=4, ECC on)
DDR Chip-Select Interleaving Mode: CS0+CS1
After this patch, it is:
DRAM: Detected RDIMM VL493T5663D-E6M
2 GiB (DDR2, 64-bit, CL=4, ECC on)
DDR Chip-Select Interleaving Mode: CS0+CS1
Signed-off-by: Kyle Moffett
uses an address of 0x00.
This fixes the logic for that particular case, hopefully without
breaking any other board configurations.
Signed-off-by: Kyle Moffett kyle.d.moff...@boeing.com
Cc: Heiko Schocher h...@denx.de
---
include/common.h |6 +++---
1 files changed, 3 insertions(+), 3 deletions
-off-by: Kyle Moffett kyle.d.moff...@boeing.com
Cc: Ben Warren biggerbadder...@gmail.com
---
drivers/net/ne2000_base.c | 17 +---
drivers/usb/eth/usb_ether.c |4 +--
net/eth.c | 56 --
3 files changed, 35 insertions(+), 42
.
Signed-off-by: Kyle Moffett kyle.d.moff...@boeing.com
Cc: Andy Fleming aflem...@gmail.com
Cc: Kumar Gala kumar.g...@freescale.com
---
include/configs/HWW1U1A.h |7 +--
1 files changed, 5 insertions(+), 2 deletions(-)
diff --git a/include/configs/HWW1U1A.h b/include/configs/HWW1U1A.h
index
)
Signed-off-by: Kyle Moffett kyle.d.moff...@boeing.com
Cc: Andy Fleming aflem...@gmail.com
Cc: Kumar Gala kumar.g...@freescale.com
---
include/configs/HWW1U1A.h | 29 +++--
1 files changed, 27 insertions(+), 2 deletions(-)
diff --git a/include/configs/HWW1U1A.h b/include
This new #define is set in config_cmd_defaults.h (which is automatically
included on every board by mkconfig), but this allows boards to elect
to omit the reset command if necessary with #undef CONFIG_CMD_RESET.
Signed-off-by: Kyle Moffett kyle.d.moff...@boeing.com
Cc: Wolfgang Denk w...@denx.de
to the version in Linux v3.2-rc4.
Signed-off-by: Kyle Moffett kyle.d.moff...@boeing.com
---
tools/setlocalversion | 138 -
1 files changed, 113 insertions(+), 25 deletions(-)
diff --git a/tools/setlocalversion b/tools/setlocalversion
index e11f54f..70ab70d
to hardware misfeature. Proper
support for the hardware reset mechanism has been left for a later
patch series to address.
Signed-off-by: Kyle Moffett kyle.d.moff...@boeing.com
Cc: Andy Fleming aflem...@gmail.com
Cc: Kumar Gala kumar.g...@freescale.com
--
I believe all review comments have been
from
rebooting after it has encountered an unrecoverable error, this seems to
be the desired behavior for those 27 board configurations.
Signed-off-by: Kyle Moffett kyle.d.moff...@boeing.com
Cc: Wolfgang Denk w...@denx.de
Cc: Mike Frysinger vap...@gentoo.org
Cc: Andy Fleming aflem...@gmail.com
Cc
This new #define is set by default in config_cmd_defaults.h, and
config_cmd_all.h, but this allows boards to conditionally omit the
reset command if necessary.
Signed-off-by: Kyle Moffett kyle.d.moff...@boeing.com
---
README|1 +
common/cmd_boot.c |2
functions. This can be enabled with CONFIG_MPC85XX_GENERIC_GPIO
Signed-off-by: Kyle Moffett kyle.d.moff...@boeing.com
Cc: Andy Fleming aflem...@gmail.com
Cc: Kumar Gala kumar.g...@freescale.com
Cc: Peter Tyser pty...@xes-inc.com
--
Changelog:
v2: Moved the inline functions to a non-board-specific
, 14, 13, 12, 11, 10, 9, 8], ...
--
(MSB is 15, LSB is 0).
Signed-off-by: Kyle Moffett kyle.d.moff...@boeing.com
Cc: Ben Warren biggerbadder...@gmail.com
---
README | 15 ++-
drivers/net/Makefile|1
-by: Kyle Moffett kyle.d.moff...@boeing.com
Cc: Ben Warren biggerbadder...@gmail.com
---
drivers/net/e1000.c | 22 +-
drivers/net/e1000.h | 19 +++
2 files changed, 24 insertions(+), 17 deletions(-)
diff --git a/drivers/net/e1000.c b/drivers/net/e1000.c
index
errors much more
straightforward to handle correctly in boot scripts and the like.
It is also necessary for a followup patch which allows SPI programming
of an e1000 controller's EEPROM even if the checksum is invalid.
Signed-off-by: Kyle Moffett kyle.d.moff...@boeing.com
Cc: Ben Warren
Specifically, the routines are: _ashldi3(), _ashrdi3(), and _lshrdi3().
They were borrowed from arch/powerpc/kernel/misc_32.S as of v2.6.38-rc5,
commit 85e2efbb1db9a18d218006706d6e4fbeb0216213, and are GPLv2+.
The Makefile framework was copied from the U-Boot ARM port.
Signed-off-by: Kyle Moffett
a few days ago.
Comments, critiques, and compliments are highly appreciated.
Cheers,
Kyle Moffett
--
Curious about my work on the Debian powerpcspe port?
I'm keeping a blog here: http://pureperl.blogspot.com/
___
U-Boot mailing list
U-Boot
functions. This can be enabled with CONFIG_MPC85XX_GENERIC_GPIO
Signed-off-by: Kyle Moffett kyle.d.moff...@boeing.com
Cc: Andy Fleming aflem...@gmail.com
Cc: Kumar Gala kumar.g...@freescale.com
Cc: Peter Tyser pty...@xes-inc.com
--
Changelog:
v2: Moved the inline functions to a non-board-specific
The HWW-1U-1A board needs to be able to override the reset command due
to hardware design limitations.
Signed-off-by: Kyle Moffett kyle.d.moff...@boeing.com
Cc: Andy Fleming aflem...@gmail.com
Cc: Kumar Gala kumar.g...@freescale.com
--
Changelog:
v2: Removed in favor of more involved reset
seems to work, but I don't
yet have a usable 36-bit kernel or DTB, so it's mostly untested.
* CPU reset is a little quirky due to hardware misfeature, see the
extensive comments in the board_reset() function in hww1u1a.c
Signed-off-by: Kyle Moffett kyle.d.moff...@boeing.com
Cc: Andy
Signed-off-by: Kyle Moffett kyle.d.moff...@boeing.com
---
arch/powerpc/cpu/mpc8xxx/ddr/util.c | 18 +-
1 files changed, 9 insertions(+), 9 deletions(-)
diff --git a/arch/powerpc/cpu/mpc8xxx/ddr/util.c
b/arch/powerpc/cpu/mpc8xxx/ddr/util.c
index 02908b4..104d360 100644
to be merged.
Cheers,
Kyle Moffett
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot
switch statement.
Signed-off-by: Kyle Moffett kyle.d.moff...@boeing.com
Cc: Andy Fleming aflem...@gmail.com
Cc: Kumar Gala kumar.g...@freescale.com
Cc: Kim Phillips kim.phill...@freescale.com
--
Changelog:
v2: Moved the constants to include/ddr_spd.h and also fixed DDR3
v4: Fixed up excessively
functions. This can be enabled with CONFIG_MPC85XX_GENERIC_GPIO.
Signed-off-by: Kyle Moffett kyle.d.moff...@boeing.com
Cc: Andy Fleming aflem...@gmail.com
Cc: Kumar Gala kumar.g...@freescale.com
Cc: Peter Tyser pty...@xes-inc.com
--
Changelog:
v2: Moved the inline functions to a non-board-specific
The HWW-1U-1A board needs to be able to override the reset command due
to hardware design limitations.
Signed-off-by: Kyle Moffett kyle.d.moff...@boeing.com
Cc: Andy Fleming aflem...@gmail.com
Cc: Kumar Gala kumar.g...@freescale.com
--
Changelog:
v2: Removed in favor of more involved reset
seems to work, but I don't
yet have a usable 36-bit kernel or DTB, so it's mostly untested.
* CPU reset is a little quirky due to hardware misfeature, see the
extensive comments in the board_reset() function in hww1u1a.c
Signed-off-by: Kyle Moffett kyle.d.moff...@boeing.com
Cc: Andy
a full 64-bit divide on my 32-bit PowerPC.
Build-and-boot-tested on the HWW-1U-1A board using DDR2 SPD detection.
Signed-off-by: Kyle Moffett kyle.d.moff...@boeing.com
Acked-by: York Sun york...@freescale.com
Cc: Andy Fleming aflem...@gmail.com
Cc: Kumar Gala kumar.g...@freescale.com
--
Changelog
these 4 patches are ready to be merged, as all concerns presented
so far have been addressed.
Cheers,
Kyle Moffett
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot
functions. This can be enabled with CONFIG_MPC85XX_GENERIC_GPIO
Signed-off-by: Kyle Moffett kyle.d.moff...@boeing.com
Cc: Andy Fleming aflem...@gmail.com
Cc: Kumar Gala kumar.g...@freescale.com
Cc: Peter Tyser pty...@xes-inc.com
---
Changelog:
v2: Moved the inline functions to a non-board-specific
switch statement.
Signed-off-by: Kyle Moffett kyle.d.moff...@boeing.com
Cc: Andy Fleming aflem...@gmail.com
Cc: Kumar Gala kumar.g...@freescale.com
Cc: Kim Phillips kim.phill...@freescale.com
---
Changelog:
v2: Moved the constants to include/ddr_spd.h and also fixed DDR3
v3: No changes
v4: Fixed
The HWW-1U-1A board needs to be able to override the reset command due
to hardware design limitations.
Signed-off-by: Kyle Moffett kyle.d.moff...@boeing.com
Cc: Andy Fleming aflem...@gmail.com
Cc: Kumar Gala kumar.g...@freescale.com
---
Changelog:
v2: Removed in favor of more involved reset
seems to work, but I don't
yet have a usable 36-bit kernel or DTB, so it's mostly untested.
* CPU reset is a little quirky due to hardware misfeature, see the
extensive comments in the board_reset() function in hww1u1a.c
Signed-off-by: Kyle Moffett kyle.d.moff...@boeing.com
Cc: Andy
patches.
It will not cause a build failure however, as this board port simply defines
an otherwise-unused __board_restart() function.
I believe these 3 patches at least are ready to be merged, as all concerns
presented so far have been resolved.
Cheers,
Kyle Moffett
the
MPC85xx-specific functions. This can be enabled with the config option
CONFIG_MPC85XX_GENERIC_GPIO.
Signed-off-by: Kyle Moffett kyle.d.moff...@boeing.com
Cc: Andy Fleming aflem...@gmail.com
Cc: Kumar Gala kumar.g...@freescale.com
Cc: Peter Tyser pty...@xes-inc.com
---
arch/powerpc/include/asm
switch statement.
Signed-off-by: Kyle Moffett kyle.d.moff...@boeing.com
Cc: Andy Fleming aflem...@gmail.com
Cc: Kumar Gala kumar.g...@freescale.com
Cc: Kim Phillips kim.phill...@freescale.com
---
arch/powerpc/cpu/mpc8xxx/ddr/ddr2_dimm_params.c | 23 +++-
arch/powerpc/cpu/mpc8xxx/ddr
seems to work, but I don't
yet have a usable 36-bit kernel or DTB, so it's mostly untested.
* CPU reset is a little quirky due to hardware misfeature, see the
extensive comments in the __board_restart() function in hww1u1a.c
Signed-off-by: Kyle Moffett kyle.d.moff...@boeing.com
Cc: Andy
this:
_machine_restart();
printf(*** restart failed ***\n);
When those platforms are fixed then it should be safe to remove the weak
fallback __arch_restart() function.
Cheers,
Kyle Moffett
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de
. This works for all
hardware platforms which have a properly defined hardware reset
capability.
Signed-off-by: Kyle Moffett kyle.d.moff...@boeing.com
Cc: Wolfgang Denk w...@denx.de
---
api/api.c |3 +-
common/cmd_boot.c | 128
do_reset() functions.
Signed-off-by: Kyle Moffett kyle.d.moff...@boeing.com
Cc: Wolfgang Denk w...@denx.de
---
board/dave/PPChameleonEVB/PPChameleonEVB.c |4 ++--
board/esd/apc405/apc405.c |4 ++--
board/esd/ar405/ar405.c|2 +-
board/esd/ash405/ash405.c
Divide-by-zero errors should be controlled by the CONFIG_PANIC_HANG
configuration variable just like any other kind of trappable U-Boot bug.
Signed-off-by: Kyle Moffett kyle.d.moff...@boeing.com
Cc: Albert Aribaud albert.arib...@free.fr
---
arch/arm/lib/div0.c |6 +++---
1 files changed, 3
-by: Kyle Moffett kyle.d.moff...@boeing.com
Cc: Albert Aribaud albert.arib...@free.fr
---
arch/arm/lib/interrupts.c | 21 +++--
1 files changed, 7 insertions(+), 14 deletions(-)
diff --git a/arch/arm/lib/interrupts.c b/arch/arm/lib/interrupts.c
index 74ff5ce..156a23c 100644
--- a/arch
The exported function table already assigns XF_do_reset properly, so
there should be no need for this processor to manually reassign it.
This change is required before ARM is converted away from using the
legacy do_reset() handler.
Signed-off-by: Kyle Moffett kyle.d.moff...@boeing.com
Cc: Albert
().
Signed-off-by: Kyle Moffett kyle.d.moff...@boeing.com
Cc: Albert Aribaud albert.arib...@free.fr
Cc: Reinhard Meyer u-b...@emk-elektronik.de
---
arch/arm/cpu/arm920t/at91/reset.c |4 ++--
arch/arm/cpu/arm920t/at91rm9200/reset.c |6 +++---
board/atmel/at91rm9200dk/at91rm9200dk.c |2
.
This reset code will probably work even when the CPU is in a bad state,
so no separate __arch_emergency_restart() function is required.
Signed-off-by: Kyle Moffett kyle.d.moff...@boeing.com
Cc: Albert Aribaud albert.arib...@free.fr
---
arch/arm/lib/reset.c |6 +-
1 files changed, 1 insertions(+), 5
The bfin_reset_or_hang function unnecessarily duplicates the panic()
logic based on CONFIG_PANIC_HANG.
This patch deletes 20 lines of code and just calls panic() instead.
This also makes the following generic-restart conversion patch simpler.
Signed-off-by: Kyle Moffett kyle.d.moff...@boeing.com
-off-by: Kyle Moffett kyle.d.moff...@boeing.com
Cc: Reinhard Meyer u-b...@emk-elektronik.de
---
arch/avr32/cpu/cpu.c |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/arch/avr32/cpu/cpu.c b/arch/avr32/cpu/cpu.c
index e4489bb..ca2226b 100644
--- a/arch/avr32/cpu/cpu.c
+++ b/arch
.
This reset code will probably work even when the CPU is in a bad state,
so no separate __arch_emergency_restart() function is required.
Signed-off-by: Kyle Moffett kyle.d.moff...@boeing.com
Cc: Graeme Russ graeme.r...@gmail.com
---
arch/i386/cpu/cpu.c |4 +---
1 files changed, 1 insertions(+), 3
the CPU may be in
a bad or undefined state, but it *appears* to be OK.
As a result no separate __arch_emergency_restart() function should be
needed.
Signed-off-by: Kyle Moffett kyle.d.moff...@boeing.com
Cc: Mike Frysinger vap...@gentoo.org
---
arch/blackfin/cpu/cpu.h |1 -
arch/blackfin
back to their FLASH reset
vector, therefore they have no-op __board_emergency_restart() functions.
(If the CPU is in an invalid state then that probably won't work).
Signed-off-by: Kyle Moffett kyle.d.moff...@boeing.com
Cc: Shinya Kuribayashi skuri...@pobox.com
---
arch/mips/cpu/cpu.c
is in an invalid state then jump-to-FLASH probably won't
work.
Signed-off-by: Kyle Moffett kyle.d.moff...@boeing.com
Cc: Scott McNutt smcn...@psyent.com
---
arch/nios2/cpu/cpu.c | 12 +++-
1 files changed, 11 insertions(+), 1 deletions(-)
diff --git a/arch/nios2/cpu/cpu.c b/arch/nios2/cpu
-off-by: Kyle Moffett kyle.d.moff...@boeing.com
Cc: Nobuhiro Iwamatsu iwama...@nigauri.org
---
arch/sh/lib/board.c |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/arch/sh/lib/board.c b/arch/sh/lib/board.c
index 07361b4..9206311 100644
--- a/arch/sh/lib/board.c
+++ b/arch/sh
.
If the CPU is in an invalid state then jump-to-RAM probably won't work.
All of the rest of the reset code will probably work even when the CPU
is in a bad state, so they should be fine with the defaults.
Signed-off-by: Kyle Moffett kyle.d.moff...@boeing.com
Cc: Wolfgang Denk w...@denx.de
Cc: Stefan
properly supports emergency
restart. A new __board_emergency_restart() may need to be implemented.
Signed-off-by: Kyle Moffett kyle.d.moff...@boeing.com
Cc: Michal Simek mon...@monstr.eu
---
.../xilinx/microblaze-generic/microblaze-generic.c |2 +-
1 files changed, 1 insertions(+), 1 deletions
appear to either use
a CPU hardware feature or an onboard watchdog unit to perform the system
reset. As a hardware reset that will probably work even when the CPU is
in a bad state, so no separate __arch_emergency_restart() is required.
Signed-off-by: Kyle Moffett kyle.d.moff...@boeing.com
Cc
All of the users of the legacy do_reset() function have been converted
to __arch_restart() or __board_restart() as appropriate, so the
compatibility calls to do_reset() may be removed.
In addition the do_generic_reset() function is renamed to the now-unused
name do_reset().
Signed-off-by: Kyle
together and moving
them into common code.
Signed-off-by: Kyle Moffett kyle.d.moff...@boeing.com
Cc: Daniel Hellstrom dan...@gaisler.com
---
arch/sparc/cpu/leon2/cpu.c | 18 --
arch/sparc/cpu/leon3/cpu.c | 19 ---
arch/sparc/lib/board.c | 11
is in an invalid state then jump-to-FLASH probably won't
work.
Signed-off-by: Kyle Moffett kyle.d.moff...@boeing.com
Cc: Daniel Hellstrom dan...@gaisler.com
---
arch/sparc/lib/board.c | 12 +++-
1 files changed, 11 insertions(+), 1 deletions(-)
diff --git a/arch/sparc/lib/board.c b/arch/sparc
together and moving
them into common code.
Signed-off-by: Kyle Moffett kyle.d.moff...@boeing.com
Cc: Nobuhiro Iwamatsu iwama...@nigauri.org
---
arch/sh/cpu/sh2/cpu.c |7 ---
arch/sh/cpu/sh2/watchdog.c |9 -
arch/sh/cpu/sh3/cpu.c |7 ---
arch/sh/cpu/sh3/watchdog.c
Consolidate the test for a dual-port NIC to one location for easy
modification, then fix support for the dual-port 82571.
Signed-off-by: Kyle Moffett kyle.d.moff...@boeing.com
Cc: Ben Warren biggerbadder...@gmail.com
---
No changes since v1
drivers/net/e1000.c | 66
errors much more
straightforward to handle correctly in boot scripts and the like.
It is also necessary for a followup patch which allows SPI programming
of an e1000 controller's EEPROM even if the checksum is invalid.
Signed-off-by: Kyle Moffett kyle.d.moff...@boeing.com
Cc: Ben Warren
this on the wire:
Time
--
... [7, 6, 5, 4, 3, 2, 1, 0, 15, 14, 13, 12, 11, 10, 9, 8], ...
--
(MSB is 15, LSB is 0).
Signed-off-by: Kyle Moffett kyle.d.moff
To make it possible to use the sspi command with the e1000 firmware
EEPROM we add a small generic SPI driver wrapper around the existing
e1000 SPI backend.
Signed-off-by: Kyle Moffett kyle.d.moff...@boeing.com
Cc: Ben Warren biggerbadder...@gmail.com
---
No changes since v1
drivers/net/e1000.c
When fdt_fixup_memory_banks is called with 2-cell address and size
fields in the device-tree (IE: 64-bit address and size), then it will
overflow its on-stack tmp buffer.
This fixes the buffer size and adds a comment explaining how many bytes
need to be allocated per record.
Signed-off-by: Kyle
kernel seems
to require a full 64-bit divide on any 32-bit PowerPC.
Build-and-boot-tested on the HWW-1U-1A board using DDR2 SPD detection.
Signed-off-by: Kyle Moffett kyle.d.moff...@boeing.com
Cc: Andy Fleming aflem...@gmail.com
Cc: Kumar Gala kumar.g...@freescale.com
Cc: Wolfgang Denk w...@denx.de
Cc
functions. This can be enabled with CONFIG_MPC85XX_GENERIC_GPIO
Signed-off-by: Kyle Moffett kyle.d.moff...@boeing.com
Cc: Andy Fleming aflem...@gmail.com
Cc: Kumar Gala kumar.g...@freescale.com
Cc: Peter Tyser pty...@xes-inc.com
---
Changelog:
v2: Moved the inline functions to a non-board-specific
switch statement.
Signed-off-by: Kyle Moffett kyle.d.moff...@boeing.com
Cc: Andy Fleming aflem...@gmail.com
Cc: Kumar Gala kumar.g...@freescale.com
Cc: Kim Phillips kim.phill...@freescale.com
Cc: Wolfgang Denk w...@denx.de
---
Changelog:
v2: Moved the constants to include/ddr_spd.h and also
seems to work, but I don't
yet have a usable 36-bit kernel or DTB, so it's mostly untested.
* CPU reset is a little quirky due to hardware misfeature, see the
extensive comments in the board_reset() function in hww1u1a.c
Signed-off-by: Kyle Moffett kyle.d.moff...@boeing.com
Cc: Andy
of them.
A new generic system_reset() function was introduced which simply calls
board_reset() and cpu_reset() in that order, and all explicit callers of
do_reset() were changed to use system_reset() instead.
Signed-off-by: Kyle Moffett kyle.d.moff...@boeing.com
Cc: Wolfgang Denk w...@denx.de
Cc
() command function instead of
directly poking at the MPC85xx RSTCR (reset control) register.
Signed-off-by: Kyle Moffett kyle.d.moff...@boeing.com
---
arch/powerpc/cpu/mpc85xx/cpu.c |7 +--
1 files changed, 5 insertions(+), 2 deletions(-)
diff --git a/arch/powerpc/cpu/mpc85xx/cpu.c b/arch
Hello again everyone!
After a relatively long hiatus working on other projects, I'm resubmitting
updated versions of our board-support patches for review and inclusion.
This patch series is based off the latest master branch as of Feb 11th,
specifically, commit
Use #define constants to enhance readability of DDR2/3 SPD parsing code.
Also add the DDR2 type for an SO-RDIMM module to the switch statement.
Signed-off-by: Kyle Moffett kyle.d.moff...@boeing.com
---
arch/powerpc/cpu/mpc8xxx/ddr/ddr2_dimm_params.c | 34 +++--
arch/powerpc/cpu
kernel seems
to require a full 64-bit divide on any 32-bit PowerPC.
Build-and-boot-tested on the HWW-1U-1A board using DDR2 SPD detection.
Signed-off-by: Kyle Moffett kyle.d.moff...@boeing.com
---
Author's note: This patch really needs a bunch more review and testing, but
I only have access to a very
issue.
Specifically, the routines are: _ashldi3(), _ashrdi3(), and _lshrdi3().
The Makefile framework was copied from the U-Boot ARM port.
Signed-off-by: Kyle Moffett kyle.d.moff...@boeing.com
---
arch/powerpc/lib/Makefile | 28 -
arch/powerpc/lib/_ashldi3.S | 45
When fdt_fixup_memory_banks is called with 2-cell address and size
fields in the device-tree (IE: 64-bit address and size), then it will
overflow its on-stack tmp buffer.
This fixes the buffer size and adds a comment explaining how many bytes
need to be allocated per record.
Signed-off-by: Kyle
functions. This can be enabled with CONFIG_MPC85XX_GENERIC_GPIO
Signed-off-by: Kyle Moffett kyle.d.moff...@boeing.com
---
arch/powerpc/include/asm/mpc85xx_gpio.h | 124 +++
1 files changed, 124 insertions(+), 0 deletions(-)
create mode 100644 arch/powerpc/include/asm
seems to work, but I don't
yet have a usable 36-bit kernel or DTB, so it's mostly untested.
* CPU reset is a little quirky due to hardware misfeature, see the
extensive comments in the board_reset_r() function in hww-1u-1a.c
Signed-off-by: Kyle Moffett kyle.d.moff...@boeing.com
errors much more
straightforward to handle correctly in boot scripts and the like.
It is also necessary for a followup patch which allows SPI programming
of an e1000 controller's EEPROM even if the checksum is invalid.
Signed-off-by: Kyle Moffett kyle.d.moff...@boeing.com
---
drivers/net/e1000.c
this on the wire:
Time
-
... [7, 6, 5, 4, 3, 2, 1, 0, 15, 14, 13, 12, 11, 10, 9, 8], ...
-
(MSB is 15, LSB is 0).
Signed-off-by: Kyle Moffett kyle.d.moff
(-)
Most of the new code is hidden behind a couple of config options, so it won't
affect other users of e1000 chips unless they explicitly request it.
Cheers,
Kyle Moffett
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo
Consolidate the test for a dual-port NIC to one location for easy
modification, then fix support for the dual-port 82571.
Signed-off-by: Kyle Moffett kyle.d.moff...@boeing.com
---
drivers/net/e1000.c | 66 +-
drivers/net/e1000.h |6
2
To make it possible to use the sspi command with the e1000 firmware
EEPROM we add a small generic SPI driver wrapper around the existing
e1000 SPI backend.
Signed-off-by: Kyle Moffett kyle.d.moff...@boeing.com
---
drivers/net/e1000.c | 92
As an aide to debugging, we should print out the expected value of the
EEPROM checksum in addition to just saying that it is wrong.
Signed-off-by: Kyle Moffett kyle.d.moff...@boeing.com
---
drivers/net/e1000.c | 48 ++--
1 files changed, 30
To make it possible to use the sspi command with the e1000 firmware
EEPROM we add a small generic SPI driver wrapper around the existing
e1000 SPI backend.
Signed-off-by: Kyle Moffett kyle.d.moff...@boeing.com
---
drivers/net/e1000.c | 92
-by: Kyle Moffett kyle.d.moff...@boeing.com
---
arch/powerpc/include/asm/mpc85xx_gpio.h | 67 +++
1 files changed, 67 insertions(+), 0 deletions(-)
create mode 100644 arch/powerpc/include/asm/mpc85xx_gpio.h
diff --git a/arch/powerpc/include/asm/mpc85xx_gpio.h
b/arch
this on the wire:
Time
--
... [7, 6, 5, 4, 3, 2, 1, 0, 15, 14, 13, 12, 11, 10, 9, 8], ...
--
(MSB is 15, LSB is 0).
Signed-off-by: Kyle Moffett kyle.d.moff
Consolidate the test for a dual-port NIC to one location for easy
modification, then fix support for the dual-port 82571.
Signed-off-by: Kyle Moffett kyle.d.moff...@boeing.com
---
drivers/net/e1000.c | 66 +-
drivers/net/e1000.h |6
2
errors much more
straightforward to handle correctly in boot scripts and the like.
It is also necessary for a followup patch which allows SPI programming
of an e1000 controller's EEPROM even if the checksum is invalid.
Signed-off-by: Kyle Moffett kyle.d.moff...@boeing.com
---
drivers/net/e1000.c
this on the wire:
Time
--
... [7, 6, 5, 4, 3, 2, 1, 0, 15, 14, 13, 12, 11, 10, 9, 8], ...
--
(MSB is 15, LSB is 0).
Signed-off-by: Kyle Moffett kyle.d.moff
To make it possible to use the sspi command with the e1000 firmware
EEPROM we add a small generic SPI driver wrapper around the existing
e1000 SPI backend.
Signed-off-by: Kyle Moffett kyle.d.moff...@boeing.com
---
drivers/net/e1000.c | 92
As an aide to debugging, we should print out the expected value of the
EEPROM checksum in addition to just saying that it is wrong.
Signed-off-by: Kyle Moffett kyle.d.moff...@boeing.com
---
drivers/net/e1000.c | 48 ++--
1 files changed, 30
,
Kyle Moffett
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot
1 - 100 of 108 matches
Mail list logo
