Check the core timer status register (TSR) for watchdog reset,
and and set the QRIO's reset reason flag REASON1[0] accordingly.
This allows the appliction SW to identify the cpu watchdog as a
reset reason, by setting the REASON1[0] flag in the QRIO.
Signed-off-by: Rainer Boschung rainer.bosch
The booting of the board is now protected by the CPU watchdog.
A failure during the boot phase will end up in board reset.
Signed-off-by: Rainer Boschung rainer.bosch...@keymile.com
---
include/configs/km/kmp204x-common.h | 8
1 file changed, 8 insertions(+)
diff --git a/include
This patch configures the qrio to trigger a core reset on
a CPU reset request.
Signed-off-by: Rainer Boschung rainer.bosch...@keymile.com
Signed-off-by: Valentin Longchamp valentin.longch...@keymile.com
---
board/keymile/kmp204x/kmp204x.c | 3 +++
1 file changed, 3 insertions(+)
diff --git
To achieve this, the qrio_cpuwd_flag() function that sets the CPU watchdog
flag in the REASON1 reg is added.
Signed-off-by: Rainer Boschung rainer.bosch...@keymile.com
Signed-off-by: Valentin Longchamp valentin.longch...@keymile.com
---
board/keymile/kmp204x/kmp204x.h | 2 ++
board/keymile
in the boot phase.
Signed-off-by: Rainer Boschung rainer.bosch...@keymile.com
---
arch/powerpc/lib/board.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/powerpc/lib/board.c b/arch/powerpc/lib/board.c
index 57b4a09..0ad2fdd 100644
--- a/arch/powerpc/lib/board.c
+++ b/arch/powerpc/lib/board.c
To acheive this, the qrio_uprstreq() function that sets the UPRSTREQN
flag in the qrio RESCNF reg is added.
Signed-off-by: Rainer Boschung rainer.bosch...@keymile.com
Signed-off-by: Valentin Longchamp valentin.longch...@keymile.com
---
board/keymile/kmp204x/kmp204x.h | 5 +
board/keymile
.
The parameter (x) given to the macro specifies the prescaling factor of
the time base clock (fTB):
watchdog_period = 1/fTB * 2^x
Signed-off-by: Rainer Boschung rainer.bosch...@keymile.com
---
arch/powerpc/include/asm/processor.h | 5 +
1 file changed, 5 insertions(+)
diff --git a/arch/powerpc
Function to inititialize the cpu watchdog added.
Signed-off-by: Rainer Boschung rainer.bosch...@keymile.com
---
arch/powerpc/cpu/mpc85xx/cpu.c | 8
1 file changed, 8 insertions(+)
diff --git a/arch/powerpc/cpu/mpc85xx/cpu.c b/arch/powerpc/cpu/mpc85xx/cpu.c
index 684d400..6274f92 100644
TCR watchdog bit are overwritten when dec interrupt is enabled.
This has been fixed with this patch.
Signed-off-by: Rainer Boschung rainer.bosch...@keymile.com
---
arch/powerpc/cpu/mpc85xx/interrupts.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/powerpc/cpu/mpc85xx
I am using the core watchdog of the P2041 on the kmp204x board.
For the watchdog initialization I use the mpc85xx framework and
the powerpc register definitions. However, I had to modify both
for the following reasons (Patches 1 to 4):
-the e500mc register implementation differs from other ppc
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