FPGA using a serial
bitblt process.
Yes, it does slow down the boot by a couple of seconds, but life is
all about trade offs, and for us this is a good one.
Rob Westfall
Xerox Corporation
On Mon, Sep 14, 2020 at 7:49 AM Michal Simek wrote:
>
> Hi,
>
> On 07. 09. 20 19:03, Ulf Sa
and that it is released and new
development will be in v2015.07.
Thanks,
Rob Westfall
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NOT modified files outside of customizing a
/include/config/boardname and creating a board/boardname directory
based on a existing board that is already released from the cpu
vendor.
Thanks,
Rob Westfall
On Wed, Dec 16, 2009 at 6:47 PM, Wolfgang Denk w...@denx.de wrote:
Dear Hekko,
In message
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