[U-Boot] FW: P4080 target has 16G memory stability issues ...

to be aware of? - any ideas? We've been pounding our heads on this for a while now, and I'm just wondering if we are covering old territory here. Cheers, Rob. Robert Sciuk Senior Designer, RD. 905.738.3741 xt 22621 ___ U-Boot mailing list U-Boot

[U-Boot] P4080 target with more than 1 dimm on each ddr3 controller?

Has anyone had any experience with a P4080 target which has more than 1 sodimm slot on each controller? I'm having some difficulties accessing memory on the higher order dimms, but the SPD data are correctly enumerated by the FSL ddr3 code. Just wondering if this is a known problem before I

[U-Boot] Second serial port access ...

? My intent is to query the bmc on the serial port, and then add a node to the FDT (/chosen{}) in order to pass information to the Linux kernel. Has something like this been done? Is there a better approach? Have I overlooked something obvious? Sorry for the nubie question. Robert Sciuk