Add a driver so the clocks/resets for these peripherals (especially I2C,
RSB, and UART) can be enabled using the normal uclass methods.
Signed-off-by: Samuel Holland
---
drivers/clk/sunxi/Kconfig | 14
drivers/clk/sunxi/Makefile| 2 ++
drivers/clk/sunxi/clk_a31_r.c | 59
Currently, the I2C clocks are configured in the sunxi board code. Add
the I2C clocks to the DM clock driver so they can be enabled from the
DM I2C driver using the normal uclass methods.
Signed-off-by: Samuel Holland
---
drivers/clk/sunxi/clk_a10.c | 5 +
drivers/clk/sunxi/clk_a10s.c
to the PHY driver.
Signed-off-by: Samuel Holland
---
drivers/phy/allwinner/Kconfig | 1 +
drivers/phy/allwinner/phy-sun4i-usb.c | 7 +++
2 files changed, 8 insertions(+)
diff --git a/drivers/phy/allwinner/Kconfig b/drivers/phy/allwinner/Kconfig
index dba3bae61c4..aa9d0e7e6a5 100644
the function a bit to remove the early return, and use the
same "assume VBUS is present" final fallback.
Signed-off-by: Samuel Holland
---
drivers/phy/allwinner/phy-sun4i-usb.c | 25 -
1 file changed, 12 insertions(+), 13 deletions(-)
diff --git a/drivers/phy
Both of these messages log the GPIO number of the ID detection GPIO,
which is not terribly useful, especially in the VBUS detection function.
Signed-off-by: Samuel Holland
---
drivers/phy/allwinner/phy-sun4i-usb.c | 4
1 file changed, 4 deletions(-)
diff --git a/drivers/phy/allwinner/phy
hurt anything either.
Samuel Holland (3):
phy: sun4i-usb: Remove a couple of debug messages
phy: sun4i-usb: Refactor VBUS detection to match Linux
phy: sun4i-usb: Support VBUS detection via power supply
drivers/phy/allwinner/Kconfig | 1 +
drivers/phy/allwinner/phy-sun4i-usb.c
The generic GPIO flags binding is shared across many drivers, some of
which need their own xlate function. Factor out the flag translation
code from gpio_xlate_offs_flags so it does not need to be duplicated.
Signed-off-by: Samuel Holland
---
drivers/gpio/gpio-uclass.c | 50
Translation of a pin name to a device+offset should fail if the offset
is larger than the number of pins in the GPIO bank.
Signed-off-by: Samuel Holland
---
drivers/gpio/gpio-uclass.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpio/gpio-uclass.c b/drivers
Translation of an OF GPIO specifier should fail if the pin offset is
larger than the number of pins in the GPIO bank.
Signed-off-by: Samuel Holland
---
drivers/gpio/gpio-uclass.c | 4
1 file changed, 4 insertions(+)
diff --git a/drivers/gpio/gpio-uclass.c b/drivers/gpio/gpio-uclass.c
numbers.
Samuel Holland (3):
gpio: Verify validity of pin offsets when looking up names
gpio: Verify validity of pin offsets from device trees
gpio: Factor out DT flag translation
drivers/gpio/gpio-uclass.c | 55 +++---
include/asm-generic/gpio.h | 8
Since the beginning, all banks have had space for 32 pins, even when
not all pins were implemented. Let's use a single constant for the GPIO
bank size here, like the GPIO driver is already doing.
Signed-off-by: Samuel Holland
---
arch/arm/include/asm/arch-sunxi/gpio.h | 14
remaining implementations of name_to_gpio.
Signed-off-by: Samuel Holland
---
arch/arm/include/asm/arch-sunxi/gpio.h | 1 -
drivers/spi/spi-sunxi.c| 2 +-
drivers/video/Kconfig | 10 +-
drivers/video/hitachi_tx18d42vm_lcd.c | 6 +++---
drivers/video/sunxi
, this header provides both sets of functions,
because ARCH_SUNXI selects GPIO_EXTRA_HEADER. This will still be the
right header to include once the DM_GPIO migration is complete and
GPIO_EXTRA_HEADER is no longer needed.
Signed-off-by: Samuel Holland
---
arch/arm/mach-sunxi/board.c | 1
hes at this point).
Samuel Holland (3):
sunxi: Clean up inclusions of asm/arch/gpio.h
sunxi: gpio: Remove name_to_gpio macro
sunxi: gpio: Remove bank-specific size macros
arch/arm/include/asm/arch-sunxi/gpio.h | 15 ++-
arch/arm/mach-sunxi/board.c| 1 -
arch/arm/m
The sunxi clock driver exposes a reset controller, so it selects the
reset controller framework. Ensure that dependency is also satisfied
when building the driver for the SPL.
Signed-off-by: Samuel Holland
---
drivers/clk/sunxi/Kconfig | 1 +
1 file changed, 1 insertion(+)
diff --git
On 9/11/21 1:31 PM, Sean Anderson wrote:
> +CC Heinrich
>
> Did you ever try booting with WDT on k210?
>
> On 9/11/21 12:43 PM, Samuel Holland wrote:
>> Hello,
>>
>> I am porting U-Boot to the Allwinner D1 SoC, and I ran into an issue
>> where the board
Hello,
I am porting U-Boot to the Allwinner D1 SoC, and I ran into an issue
where the board fails to boot if I enable watchdog auto-start.
The call to get_timer() -> get_ticks() panics because no timer is
available. And since panic_finish() calls udelay(), this causes infinite
recursion of
On 9/8/21 2:14 PM, Arnaud Ferraris wrote:
> This commit enables the green status LED (PD18/GPIO 114) on boot in the
> SPL, in order to provide visual feedback that the PinePhone is booting.
>
> Signed-off-by: Arnaud Ferraris
> Reviewed-by: Andre Przywara
Reviewed-by: Samuel
ual feedback as soon as possible.
>
> In order achieve this goal, this patch initializes the status LED (if
> configured) in the SPL.
>
> Signed-off-by: Arnaud Ferraris
Reviewed-by: Samuel Holland
On 9/2/21 6:17 PM, Jaehoon Chung wrote:
> On 8/22/21 8:05 AM, Samuel Holland wrote:
>> These PMICs provide some combination of battery charger, fuel gauge,
>> GPIOs, regulators, and VBUS routing. These functions are represented
>> as child nodes in the device tree. Add the
the relevant feature.
An exception is the GPIO-related definitions, which do not use unique
identifiers. So for now, keep them like before. They will be cleaned up
along with the GPIO driver.
Signed-off-by: Samuel Holland
---
include/axp152.h | 2 ++
include/axp209.h | 2 ++
include/axp221.h
firmware driver.
This driver can be enabled even if CONFIG_PSCI_RESET is disabled, so
make sure to use the right symbol in the condition.
Signed-off-by: Samuel Holland
---
drivers/power/axp152.c | 2 ++
drivers/power/axp209.c | 2 ++
drivers/power/axp221.c | 2 ++
drivers/power/axp305.c | 2
rigger bit is the same on all PMIC variants, use the register
definitions from the oldest supported PMIC.
Signed-off-by: Samuel Holland
---
drivers/power/pmic/Kconfig | 2 ++
drivers/power/pmic/axp.c | 36
2 files changed, 38 insertions(+)
diff --git a/dri
of the other
series I sent can be applied independently.
Samuel Holland (4):
include: axp_pmic: Add missing header guard definition
include: axp_pmic: Include headers for all variants
power: axp: Avoid do_poweroff conflict with sysreset
power: pmic: axp: Implement poweroff via sysreset
drivers
This header attempted to avoid multiple inclusion using a header guard.
But the preprocessor symbol was never defined, so the guard had no
effect. Fix this by defining the symbol.
Signed-off-by: Samuel Holland
---
include/axp_pmic.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/include
-by: Samuel Holland
---
arch/arm/mach-sunxi/board.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/mach-sunxi/board.c b/arch/arm/mach-sunxi/board.c
index d9b04f75fc4..f867a28c30c 100644
--- a/arch/arm/mach-sunxi/board.c
+++ b/arch/arm/mach-sunxi/board.c
@@ -347,6 +347,7 @@ void
Add an option to automatically register the first watchdog device with
the wdt_reboot driver for use with sysreset. This allows sysreset to be
a drop-in replacement for platform-specific watchdog reset code, without
needing any device tree changes.
Signed-off-by: Samuel Holland
---
drivers
the OF node if it is not
already provided.
Signed-off-by: Samuel Holland
---
drivers/sysreset/sysreset_watchdog.c | 16
1 file changed, 8 insertions(+), 8 deletions(-)
diff --git a/drivers/sysreset/sysreset_watchdog.c
b/drivers/sysreset/sysreset_watchdog.c
index c7ae368d41a
These driver probe functions are not (and should not be) called from
outside the respective driver source files. Therefore, the functions
should be marked static.
Signed-off-by: Samuel Holland
---
drivers/sysreset/sysreset_resetctl.c | 2 +-
drivers/sysreset/sysreset_syscon.c | 2 +-
drivers
The drivers enabled by SYSRESET_SYSCON, SYSRESET_WATCHDOG, and
SYSRESET_RESETCTL do nothing beyond providing sysreset uclass ops.
Therefore, they should depend on the sysreset uclass.
Signed-off-by: Samuel Holland
---
drivers/sysreset/Kconfig | 4 ++--
1 file changed, 2 insertions(+), 2
things up automatically makes sense to me; this is what Linux
does. (In fact, Linux does this for every watchdog device.) However, I
put the code behind a new option to avoid surprises for other platforms.
Samuel Holland (4):
sysreset: Add uclass Kconfig dependency to drivers
sysreset: Mark
A watchdog helps recover from hangs or failure to boot an OS. It can
also be used by the sysreset framework to intentionally reset the
system. Now that a driver is available, let's enable this functionality
on sunxi boards.
Signed-off-by: Samuel Holland
---
arch/arm/Kconfig | 1 +
1 file
by the driver.
Signed-off-by: Samuel Holland
---
arch/arm/dts/sun50i-h616.dtsi | 1 -
1 file changed, 1 deletion(-)
diff --git a/arch/arm/dts/sun50i-h616.dtsi b/arch/arm/dts/sun50i-h616.dtsi
index dd4d2f3..2f71e853e96 100644
--- a/arch/arm/dts/sun50i-h616.dtsi
+++ b/arch/arm/dts/sun50i-h616
This driver supports the sun4i/sun6i/sun20i watchdog timers.
They have a maximum timeout of 16 seconds.
Signed-off-by: Samuel Holland
---
drivers/watchdog/Kconfig | 8 ++
drivers/watchdog/Makefile| 1 +
drivers/watchdog/sunxi_wdt.c | 188 +++
3 files
sunxi-common.h defines CONFIG_SPL_BSS_START_ADDR to put SPL's BSS in
DRAM. Due to this, we must select SPL_SEPARATE_BSS, or else SPL will
attempt to load its DTB from the wrong address (after BSS in DRAM).
This change fixes booting with SPL_OF_CONTROL=y.
Signed-off-by: Samuel Holland
---
arch
On 8/22/21 5:07 AM, Pali Rohár wrote:
> Hello!
>
> On Saturday 21 August 2021 23:46:46 Samuel Holland wrote:
>> Most Allwinner sunxi SoCs have separate boot ROMs in non-secure and
>> secure mode. The "non-secure" or "normal" boot ROM (NBROM) uses the
>
On 8/22/21 4:58 AM, Pali Rohár wrote:
> Hello!
>
> On Saturday 21 August 2021 23:46:45 Samuel Holland wrote:
>> Some image types always depend on OpenSSL, so they can only be included
>> in mkimage when TOOLS_LIBCRYPTO is selected. Instead of using arbitrary
>&g
Hi Heiko,
On 8/22/21 3:38 AM, Heiko Schocher wrote:
> Hello Samuel,
>
> On 22.08.21 01:05, Samuel Holland wrote:
>> This bus controller is used to communicate with an X-Powers AXP PMIC.
>> Currently, various drivers access PMIC registers through a platform-
>>
Now that mkimage can generate TOC0 images, and the SPL can interpret
them, hook up the build infrastructure so the user can choose which
image type to build.
Signed-off-by: Samuel Holland
---
Changes in v2:
- Rebase on top of Icenowy's RISC-V support series
- Rename Kconfig symbols to include
SPL uses the image header to detect the boot device and to find the
offset of the next U-Boot stage. Since this information is stored
differently in the eGON and TOC0 image headers, add code to find the
correct value based on the image type currently in use.
Signed-off-by: Samuel Holland
out of sunxi_image.h
- Refactored SPL header signature checks to use fewer casts
- Rebase on top of Icenowy's RISC-V support series
- Rename Kconfig symbols to include the full image type name
Samuel Holland (4):
tools: Separate image types which depend on OpenSSL
tools: mkimage: Add Allwinner
embled; this is done to work
around bugs/quirks in the boot ROM, which vary between SoCs. This TOC0
implementation has been verified to work with the A50, A64, H5, H6,
and H616 SBROMs, and it may work with other SoCs.
Signed-off-by: Samuel Holland
---
Changes in v2:
- Moved certificate and key
, it is required for the build to complete.
Signed-off-by: Samuel Holland
---
Changes in v2:
- Refactored the first patch on top of TOOLS_LIBCRYPTO
arch/arm/mach-imx/mxs/Kconfig | 2 ++
arch/arm/mach-mvebu/Kconfig | 1 +
scripts/config_whitelist.txt | 1 -
tools/Makefile| 19
Hi Andre,
On 6/21/21 6:56 PM, Andre Przywara wrote:
> On Mon, 21 Jun 2021 16:35:37 -0400
> Tom Rini wrote:
>> On Mon, Jun 21, 2021 at 04:43:00PM +0100, Andre Przywara wrote:
>>> On Sun, 20 Jun 2021 21:55:51 -0500
>>> Samuel Holland wrote:
>>>
>>
e
>
> scripts/Makefile.spl | 2 +-
> tools/imagetool.h| 1 +
> tools/mkimage.c | 1 +
> tools/sunxi_egon.c | 86
> 4 files changed, 82 insertions(+), 8 deletions(-)
This works great on D1. For the whole series:
Tested-by: Samuel Holland
future surprises relating to
NEON use as well.
Signed-off-by: Samuel Holland
---
Changes in v2:
- Updated commit message to describe problem more precisely
arch/arm/config.mk | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/config.mk b/arch/arm/config.mk
index 16c63e12667..964c6b026ec
.
Signed-off-by: Samuel Holland
---
drivers/i2c/i2c-gpio.c | 9 +
1 file changed, 9 insertions(+)
diff --git a/drivers/i2c/i2c-gpio.c b/drivers/i2c/i2c-gpio.c
index cf8f8f40359..1aedad5c8ed 100644
--- a/drivers/i2c/i2c-gpio.c
+++ b/drivers/i2c/i2c-gpio.c
@@ -336,8 +336,17 @@ static int
Now that the last users of legacy I2C (outside of SPL) have been
resolved, we can enable DM_I2C at the sunxi architecture level.
Signed-off-by: Samuel Holland
---
arch/arm/Kconfig| 1 +
arch/arm/mach-sunxi/Kconfig | 3 ---
2 files changed, 1 insertion(+), 3 deletions(-)
diff --git
-gpio nodes are not referenced by any other node in the
device trees (the device trees have no panel node), the I2C bus is
selected by its node name.
This panel initialization code was the only i2c_soft user, so the
i2c_soft GPIO setup code can be removed now as well.
Signed-off-by: Samuel Holland
ecause all of the PMICs support I2C in addition to other interfaces.
Signed-off-by: Samuel Holland
---
arch/arm/mach-sunxi/pmic_bus.c | 90 +++---
1 file changed, 39 insertions(+), 51 deletions(-)
diff --git a/arch/arm/mach-sunxi/pmic_bus.c b/arch/arm/mach-sunxi/
functions or the newly-added PMIC_AXP driver (which uses
DM_I2C). In turn, this allows platforms to start transitioning to DM_I2C
in U-Boot proper, without breaking boards that still depend on the
legacy I2C interface for other reasons.
Signed-off-by: Samuel Holland
---
arch/arm/mach-sunxi/Kconfig
SUN8I_RSB should not be selected by MACH_SUN8I, because the hardware
is not present in half of those SoCs (H3/H5, R40, and V3s). Move the
selection to the SoCs where the hardware actually exists.
Signed-off-by: Samuel Holland
---
arch/arm/mach-sunxi/Kconfig | 4 +++-
1 file changed, 3
on a specific
PMIC header to pick up register definitions.
Both of these changes have no impact on any existing configs, since
the code does not compile if the dependencies are not met.
Signed-off-by: Samuel Holland
---
arch/arm/mach-sunxi/Kconfig | 3 ++-
1 file changed, 2 insertions(+), 1 deletion
for SoCs that normally pair with a PMIC.
Signed-off-by: Samuel Holland
---
drivers/power/pmic/Kconfig | 14 +++
drivers/power/pmic/Makefile | 1 +
drivers/power/pmic/axp.c| 49 +
3 files changed, 64 insertions(+)
create mode 100644 drivers/power/pmic
option.
Signed-off-by: Samuel Holland
---
drivers/power/pmic/Kconfig | 17 -
drivers/power/pmic/Makefile | 2 +-
2 files changed, 17 insertions(+), 2 deletions(-)
diff --git a/drivers/power/pmic/Kconfig b/drivers/power/pmic/Kconfig
index 56c0ef70312..0c4da9c5536 100644
driver.
Signed-off-by: Samuel Holland
---
drivers/power/pmic/Kconfig | 43 +++---
1 file changed, 8 insertions(+), 35 deletions(-)
diff --git a/drivers/power/pmic/Kconfig b/drivers/power/pmic/Kconfig
index fd6648b313e..56c0ef70312 100644
--- a/drivers/power/pmic/Kconfig
y a couple of pairs of hardware/runtime addresses used
across all PMIC variants. So far the code expected only the "primary"
pair, but some PMICs like the AXP305 and AXP805 use the secondary pair,
so add support for that to the DM driver as well.
Signed-off-by: Samuel Holland
---
s a DM_I2C driver.
Since the non-DM bus controller driver is still needed in SPL, the quick
solution is to implement the DM_I2C ops using the existing functions.
The register for switching between I2C/P2WI/RSB mode is the same across
all PMIC variants, so move that to the common header.
Signed-off-
ero2 (H616).
Samuel Holland (11):
i2c: Add a DM_I2C wrapper for the sun6i_p2wi controller
i2c: Add a DM_I2C wrapper for the sun8i_rsb controller
power: pmic: Consistently depend on DM_PMIC
power: pmic: Make the uclass optional in SPL
power: pmic: Add a driver for X-Powers AXP PMICs
sun
Hi all,
On 8/17/21 2:23 PM, Tom Rini wrote:
> On Thu, Aug 12, 2021 at 05:40:34PM -0400, Tom Rini wrote:
>> On Thu, Aug 12, 2021 at 10:22:07PM +0100, Andre Przywara wrote:
>>> On Thu, 12 Aug 2021 13:49:30 -0400
>>> Tom Rini wrote:
>>>
>>> Hi Tom,
>>>
As I try and migrate more CONFIG symbols
Hi Tom,
On 8/17/21 4:59 PM, Tom Rini wrote:
> This converts the following to Kconfig:
>CONFIG_SYS_I2C_SOFT
>CONFIG_SYS_I2C_SOFT_SPEED
>CONFIG_SYS_I2C_SOFT_SLAVE
>
> Signed-off-by: Tom Rini
> ---
> board/sunxi/board.c | 2 +-
> configs/Colombus_defconfig
on that platform, as NEON is not available in SPL. Fix this by
restricting the compiler to using GPRs only, not vector registers.
Signed-off-by: Samuel Holland
---
arch/arm/config.mk | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/config.mk b/arch/arm/config.mk
index 16c63e12667..964c6b026ec
Andre,
On 7/27/21 7:12 AM, Andre Przywara wrote:
> On Sun, 18 Apr 2021 22:21:41 -0500
> Samuel Holland wrote:
>
> Hi,
>
>> Most sun6i-derived SoCs contain SRAM A2, a secure SRAM area for ARISC
>> SCP firmware. H3 has a smaller SRAM than other SoCs (A31/A33/A23/A83T)
ing merge window, to expose them
> to a wider testing audience, but would really like to have some
> people's eyes on it.
>
> Also testing this on different boards would be much appreciated,
> especially patch 7/8 deserves some scrutiny, I guess.
For the series:
Tested-by: Samuel Hol
. These items
include signed firmware and a key chain linking to a root-of-trust
public key (ROTPK) hash burned to eFuses in the SoC. Signatures are made
using RSA-2048 + SHA256.
This TOC0 implementation has been verified to work with the A64, H5, H6,
and H616 SBROMs.
Signed-off-by: Samuel Holland
Now that mkimage can generate TOC0 images, and the SPL can interpret
them, hook up the build infrastructure so the user can choose which
image type to build.
Signed-off-by: Samuel Holland
---
arch/arm/mach-sunxi/Kconfig | 2 ++
board/sunxi/Kconfig | 24
scripts
SPL uses the image header to detect the boot device and to find the
offset of U-Boot proper. Since this information is stored differently in
eGON and TOC0 image headers, add code to find the correct value based on
the image type currently in use.
Signed-off-by: Samuel Holland
---
arch/arm
Estevam
Cc: "NXP i.MX U-Boot Team"
Cc: Stefan Roese
Cc: Simon Glass
Signed-off-by: Samuel Holland
---
arch/arm/mach-imx/mxs/Kconfig | 2 ++
arch/arm/mach-mvebu/Kconfig | 1 +
common/Kconfig.boot | 2 ++
scripts/config_whitelist.txt | 1 -
tools/Kconfig
Zero 2
Samuel Holland (4):
tools: Refactor mkimage linking with OpenSSL
tools: mkimage: Add Allwinner TOC0 support
sunxi: Support both SPL image types
sunxi: Support building a SPL as a TOC0 image
arch/arm/Kconfig | 1 +
arch/arm/include/asm/arch-sunxi/spl.h | 2
On 6/13/21 11:37 PM, Suniel Mahesh wrote:
> Hi Andre,
>
> On Mon, Jun 14, 2021 at 3:44 AM Andre Przywara wrote:
>>
>> On Sat, 12 Jun 2021 10:17:08 +0530
>> Suniel Mahesh wrote:
>>
>>> Hi All,
>>>
>>> I am working on an Allwinner R16 and H3 based targets and I am implementing
>>> system update.
On 4/21/21 5:36 AM, Andre Przywara wrote:
> On Sat, 17 Apr 2021 09:20:57 -0500
> Samuel Holland wrote:
>
> Hi,
>
>> Resetting an XHCI controller inside xhci_register undoes any register
>> setup performed by the platform driver. And at least on the Allwinner
>>
for the monitor, and the last 16 KiB for the SCP firmware. With
this change, the monitor no longer needs to reserve a region in DRAM.
Signed-off-by: Samuel Holland
---
arch/arm/include/asm/arch-sunxi/cpu_sun4i.h | 11 +++
include/configs/sun8i.h | 7 +++
2 files changed
mmc_get_env_dev, we will always use the environment from
the boot device when booting from SD/eMMC.
Signed-off-by: Samuel Holland
---
board/sunxi/board.c | 14 ++
env/Kconfig | 3 +--
2 files changed, 15 insertions(+), 2 deletions(-)
diff --git a/board/sunxi/board.c b/board/sunxi
These drivers are sunxi platform-specific, and so are of interest to the
sunxi maintainers.
In fact, as there is no PHY driver maintainer, drivers/phy/allwinner had
no maintainer at all.
Signed-off-by: Samuel Holland
---
MAINTAINERS | 3 +++
1 file changed, 3 insertions(+)
diff --git
Andre,
On 4/17/21 1:23 PM, Andre Przywara wrote:
> On Sat, 17 Apr 2021 12:47:23 -0500 Samuel Holland wrote:
>> On 3/31/21 10:39 AM, Andre Przywara wrote:
>>> On 20/02/2021 12:14, Nicolas Boulenguez wrote:
>>>
>>> Hi Arnaud,
>>>
>>>
icitly list each supported SoC, and have an error message in the
> fallback case, to avoid those problems in the future.
>
> This fixes Ethernet support on all H5 boards.
>
> Signed-off-by: Andre Przywara
Tested-by: Samuel Holland # Orange Pi PC2
Also tested on H3 (Orange Pi Plus 2E) and A64 (Orange Pi Win) to verify
no regression.
Andre,
On 3/31/21 10:39 AM, Andre Przywara wrote:
> On 20/02/2021 12:14, Nicolas Boulenguez wrote:
>
> Hi Arnaud,
>
>> From: Arnaud Ferraris
>
> as mentioned before, this looks useful, so can you re-send this with a
> commit message and your Signed-off-by:?
It looks like you picked up this
IS_ENABLED to drop the #ifdef.
Fixes: 431889d6ad9a ("spl: zImage support in Falcon mode")
Signed-off-by: Samuel Holland
---
arch/arm/lib/zimage.c | 12 +---
1 file changed, 5 insertions(+), 7 deletions(-)
diff --git a/arch/arm/lib/zimage.c b/arch/arm/lib/zimage.c
index
This driver is needed for XHCI to work on the Allwinner H6 SoC. The
driver is copied from Linux v5.10.
Reviewed-by: Andre Przywara
Signed-off-by: Samuel Holland
---
drivers/phy/allwinner/Kconfig | 8 ++
drivers/phy/allwinner/Makefile | 1 +
drivers/phy/allwinner/phy
Pine H64 and Orange Pi 3 both provide a USB3 type A port.
Enable it in U-Boot.
Signed-off-by: Samuel Holland
---
configs/orangepi_3_defconfig | 5 +
configs/pine_h64_defconfig | 5 +
2 files changed, 10 insertions(+)
diff --git a/configs/orangepi_3_defconfig b/configs
, and where it cannot interfere with other platform
drivers.
This also fixes a failure to call reset_free if xhci_register failed.
Fixes: 0b80371b350e ("usb: xhci: Add reset controller support")
Signed-off-by: Samuel Holland
---
drivers/usb/host/xhci-mem.c | 2 --
drivers/usb/host/xhci-
:
- Dropped patches 1-2 (already in u-boot-sunxi/master) and rebased
- Added Andre's Reviewed-by on the PHY driver
- Fixed error handling in xhci_pci_probe
Samuel Holland (4):
phy: sun50i-usb3: Add a driver for the H6 USB3 PHY
usb: xhci-pci: Move reset logic out of XHCI core
usb: xhci-dwc3
Some platforms, like the Allwinner H6, do not have a separate glue layer
around the dwc3. Instead, they rely on the clocks/resets/phys referenced
from the dwc3 DT node itself. Add support for enabling the clocks/resets
referenced from the dwc3 DT node.
Signed-off-by: Samuel Holland
---
drivers
On 2/9/21 4:46 AM, Andre Heider wrote:
> Hi Samuel,
>
> On 08/02/2021 06:57, Samuel Holland wrote:
>> This series adds clock, PHY, and XHCI driver support for the USB3
>> controller found in the Allwinner H6 SoC. Below is a log showing it
>> functioning on the Orange Pi
ight clash with the actual values
>> (which have also changed), and rely on TF-A to add the node.
>>
>> [1] https://review.trustedfirmware.org/c/TF-A/trusted-firmware-a/+/7770
>>
>> Signed-off-by: Andre Przywara
Reviewed-by: Samuel Holland
>> ---
>> arch/
any issues with
> incompatible versions later on (the TF-A patches are about to be merged).
>
> Signed-off-by: Andre Przywara
Reviewed-by: Samuel Holland
> ---
> arch/arm/dts/sunxi-u-boot.dtsi | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a
On 2/8/21 7:42 PM, Andre Przywara wrote:
> On Sun, 7 Feb 2021 23:57:23 -0600
> Samuel Holland wrote:
>
> (CC:ing Simon and Kever)
>
>> Some platforms, like the Allwinner H6, do not have a separate glue layer
>> around the dwc3. Instead, they rely on the clocks/res
On 2/8/21 8:27 PM, Samuel Holland wrote:
> On 2/8/21 5:43 AM, Marek Vasut wrote:
>> On 2/8/21 6:57 AM, Samuel Holland wrote:
>>> Resetting an XHCI controller inside xhci_register undoes any register
>>> setup performed by the platform driver. And at least on the
On 2/8/21 5:43 AM, Marek Vasut wrote:
> On 2/8/21 6:57 AM, Samuel Holland wrote:
>> Resetting an XHCI controller inside xhci_register undoes any register
>> setup performed by the platform driver. And at least on the Allwinner
>> H6, resetting the XHCI controller also
As variables were moved to Kconfig, some of the surrounding ifdefs were
left around, even though they were empty. Clean them up.
Signed-off-by: Samuel Holland
---
include/configs/sunxi-common.h | 15 ---
1 file changed, 15 deletions(-)
diff --git a/include/configs/sunxi-common.h b
T.
Signed-off-by: Samuel Holland
---
arch/arm/dts/sunxi-u-boot.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/dts/sunxi-u-boot.dtsi b/arch/arm/dts/sunxi-u-boot.dtsi
index abe629c55e5..a9062316f1d 100644
--- a/arch/arm/dts/sunxi-u-boot.dtsi
+++ b/arch/arm/d
The FIT description has access to the configuration variables. Use the
appropriate variable instead of hardcoding the address.
Signed-off-by: Samuel Holland
---
arch/arm/dts/sunxi-u-boot.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/dts/sunxi-u-boot.dtsi b
, and where it cannot interfere with other platform
drivers.
Fixes: 0b80371b350e ("usb: xhci: Add reset controller support")
Signed-off-by: Samuel Holland
---
drivers/usb/host/xhci-mem.c | 2 --
drivers/usb/host/xhci-pci.c | 38 +++--
drivers/usb/host/xhci.
This driver is needed for XHCI to work on the Allwinner H6 SoC. The
driver is copied from Linux v5.10.
Signed-off-by: Samuel Holland
---
drivers/phy/allwinner/Kconfig | 8 ++
drivers/phy/allwinner/Makefile | 1 +
drivers/phy/allwinner/phy-sun50i-usb3.c | 171
Some platforms, like the Allwinner H6, do not have a separate glue layer
around the dwc3. Instead, they rely on the clocks/resets/phys referenced
from the dwc3 DT node itself. Add support for enabling the clocks/resets
referenced from the dwc3 DT node.
Signed-off-by: Samuel Holland
---
drivers
ementation is trivial.
Signed-off-by: Samuel Holland
---
drivers/clk/sunxi/Makefile| 2 ++
drivers/clk/sunxi/clk_sun6i_rtc.c | 35 +++
2 files changed, 37 insertions(+)
create mode 100644 drivers/clk/sunxi/clk_sun6i_rtc.c
diff --git a/drivers/clk/sunxi/
Pine H64 and Orange Pi 3 both provide a USB3 type A port.
Enable it in U-Boot.
Signed-off-by: Samuel Holland
---
configs/orangepi_3_defconfig | 5 +
configs/pine_h64_defconfig | 5 +
2 files changed, 10 insertions(+)
diff --git a/configs/orangepi_3_defconfig b/configs
4mA)
|071044991D8D6A81
|
+-3 Hub (480 Mb/s, 100mA)
GenesysLogic USB2.1 Hub
1 Hub (480 Mb/s, 0mA)
u-boot EHCI Host Controller
1 Hub (12 Mb/s, 0mA)
U-Boot Root Hub
Samuel Holland (6):
clk: sunxi: Add a dummy clock driver for the RTC
clk: su
The XHCI controller has its own clock and reset. Add them.
Signed-off-by: Samuel Holland
---
drivers/clk/sunxi/clk_h6.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/clk/sunxi/clk_h6.c b/drivers/clk/sunxi/clk_h6.c
index ac8656fe895..df93d96b3b0 100644
--- a/drivers/clk/sunxi
On 1/21/21 7:14 PM, Andre Przywara wrote:
> On Mon, 11 Jan 2021 21:11:37 +0100
> Jernej Skrabec wrote:
>
>> There was no need to have prcm definitions for H6 and similar SoCs till
>> now. However, support R_I2C will be needed soon in SPL.
>>
>> Move old definitions to prcm_sun6i.h and add new
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