Hi Simon,
On Tue, 29 Aug 2023 at 03:39, Simon Glass wrote:
>
> Hi Peter,
>
> On Mon, 28 Aug 2023 at 14:24, Peter Robinson wrote:
> >
> > On Mon, Aug 28, 2023 at 6:55 PM Simon Glass wrote:
> > >
> > > Hi Sumit,
> > >
> > > On Thu,
Signed-off-by: Sumit Garg
---
doc/board/qualcomm/sdm845.rst | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/doc/board/qualcomm/sdm845.rst b/doc/board/qualcomm/sdm845.rst
index 71879c2a6e..08e1c353c5 100644
--- a/doc/board/qualcomm/sdm845.rst
+++ b/doc/board/qualcomm/sdm845
Hi Simon,
On Thu, 24 Aug 2023 at 05:29, Simon Glass wrote:
>
> Hi Sumit,
>
> On Tue, 12 Jul 2022 at 01:12, Sumit Garg wrote:
> >
> > Add support for 96Boards Dragonboard 845C aka Robotics RB3 development
> > platform. This board complies with 96Board
ons that u-boot is loaded
> as an Android boot image through ABL.
>
> Fix the same.
>
> Signed-off-by: Bhupesh Sharma
> ---
> doc/board/qualcomm/qcs404.rst | 4 ++--
> doc/board/qualcomm/sdm845.rst | 4 ++--
> 2 files changed, 4 insertions(+), 4 deletions(-)
>
Reviewed-by:
d/samsung/starqltechn/Makefile | 2 +-
> 2 files changed, 2 insertions(+), 2 deletions(-)
>
Reviewed-by: Sumit Garg
-Sumit
> diff --git a/board/qualcomm/dragonboard845c/Makefile
> b/board/qualcomm/dragonboard845c/Makefile
> index 0abefdaf36..fe585ad263 100644
> --- a/board
On Fri, 24 Mar 2023 at 20:54, Tom Rini wrote:
>
> On Fri, Mar 24, 2023 at 11:36:24AM +0530, Sumit Garg wrote:
> > On Fri, 24 Mar 2023 at 07:27, Konrad Dybcio
> > wrote:
> > >
> > > In preparation for supporting upstream Linux device trees on Qualcomm
&g
On Fri, 24 Mar 2023 at 06:10, Konrad Dybcio wrote:
>
> The name "se" is used in upstream Linux device trees and has been for
> ages, long before this U-Boot-ism was introduced. Same goes for the
> existing compatible. Get rid of that.
>
> Signed-off-by: Konrad Dybcio
> ---
>
>
On Fri, 24 Mar 2023 at 07:27, Konrad Dybcio wrote:
>
> In preparation for supporting upstream Linux device trees on Qualcomm
> platforms, make this the default behavior.
>
> Signed-off-by: Konrad Dybcio
> ---
>
> arch/arm/mach-snapdragon/pinctrl-snapdragon.c | 1 +
> 1 file changed, 1
On Fri, 24 Mar 2023 at 07:27, Konrad Dybcio wrote:
>
> In preparation for supporting upstream Linux device trees on Qualcomm
> platforms, make this the default behavior.
>
> Signed-off-by: Konrad Dybcio
> ---
>
> arch/arm/mach-snapdragon/clock-snapdragon.c | 1 +
> 1 file changed, 1
On Fri, 24 Mar 2023 at 07:27, Konrad Dybcio wrote:
>
> In preparation for supporting upstream Linux device trees on Qualcomm
> platforms, make this the default behavior.
>
> Signed-off-by: Konrad Dybcio
> ---
>
> drivers/serial/serial_msm.c | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git
On Fri, 24 Mar 2023 at 06:10, Konrad Dybcio wrote:
>
> "clocks" is the standard property used in Linux, "clock" seems to be
> an U-Boot invention. Use the one that's more standardized.
>
> Signed-off-by: Konrad Dybcio
> ---
>
> arch/arm/dts/qcom-ipq4019.dtsi | 2 +-
>
Hi,
On Fri, 24 Mar 2023 at 07:26, Konrad Dybcio wrote:
>
> "clocks" is the standard property used in Linux, "clock" seems to be
> an U-Boot invention. Use the one that's more standardized.
>
> Signed-off-by: Konrad Dybcio
> ---
>
> drivers/mmc/msm_sdhci.c | 2 +-
> 1 file changed, 1
On Mon, 13 Feb 2023 at 21:58, Tom Rini wrote:
>
> On Mon, Feb 13, 2023 at 10:19:09AM +0530, Sumit Garg wrote:
>
> > Co-developed-by: Mike Worsfold
> > Signed-off-by: Mike Worsfold
> > Signed-off-by: Sumit Garg
>
> I don't see this originally in patchwork, and
Co-developed-by: Mike Worsfold
Signed-off-by: Mike Worsfold
Signed-off-by: Sumit Garg
---
Hi Tom,
This patch is missing from your latest pull of this series [1]. Can you please
help to pull it as well?
[1] QCS404: Add ethernet and I2C drivers
-Sumit
arch/arm/mach-snapdragon/clock-qcs404.c
Worsfold
Signed-off-by: Sumit Garg
---
drivers/i2c/Kconfig | 12 +
drivers/i2c/Makefile | 1 +
drivers/i2c/qup_i2c.c | 579 ++
3 files changed, 592 insertions(+)
create mode 100644 drivers/i2c/qup_i2c.c
diff --git a/drivers/i2c/Kconfig b/drivers/i2c
Signed-off-by: Sumit Garg
---
arch/arm/dts/qcs404-evb.dts | 97 +
1 file changed, 97 insertions(+)
diff --git a/arch/arm/dts/qcs404-evb.dts b/arch/arm/dts/qcs404-evb.dts
index 2de0e7537b..8d7893c116 100644
--- a/arch/arm/dts/qcs404-evb.dts
+++ b/arch/arm/dts
Co-developed-by: Mike Worsfold
Signed-off-by: Mike Worsfold
Signed-off-by: Sumit Garg
---
arch/arm/mach-snapdragon/pinctrl-qcs404.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/arch/arm/mach-snapdragon/pinctrl-qcs404.c
b/arch/arm/mach-snapdragon/pinctrl-qcs404.c
index 5a7fbfd441
Add clk_rcg_set_rate() which allows to configure clocks without programming
MND values. This is required for configuring I2C clocks on QCS404.
Co-developed-by: Mike Worsfold
Signed-off-by: Mike Worsfold
Signed-off-by: Sumit Garg
---
arch/arm/mach-snapdragon/clock-snapdragon.c | 24
The Qualcom ETHQOS hardware supports an RGMII macro which needs to be
configured according to following link speeds:
- SPEED_1000
- SPEED_100
- SPEED_10
So add a corresponding glue driver to configure RGMII macro.
Signed-off-by: Sumit Garg
---
drivers/net/Kconfig| 7 +
drivers
Signed-off-by: Sumit Garg
---
arch/arm/dts/qcs404-evb.dts | 98 -
1 file changed, 97 insertions(+), 1 deletion(-)
diff --git a/arch/arm/dts/qcs404-evb.dts b/arch/arm/dts/qcs404-evb.dts
index cc70afa4c8..2de0e7537b 100644
--- a/arch/arm/dts/qcs404-evb.dts
The GMAC controller on QCS404 SoC (support added by upcoming patch) fails
to work with maximum tx/rx_fifo_sz supported by the hardware (16K). So
allow platforms to override FIFO size using corresponding DT node
properties.
Signed-off-by: Sumit Garg
---
drivers/net/dwc_eth_qos.c | 19
Signed-off-by: Sumit Garg
---
drivers/net/dwc_eth_qos.c | 9 ++---
1 file changed, 6 insertions(+), 3 deletions(-)
diff --git a/drivers/net/dwc_eth_qos.c b/drivers/net/dwc_eth_qos.c
index afc47b56ff..753a912607 100644
--- a/drivers/net/dwc_eth_qos.c
+++ b/drivers/net/dwc_eth_qos.c
Use standard pinconf drive-strength values from Linux DT bindings rather
than ones based on custom u-boot header. These changes are in direction
to make u-boot DTs for Qcom SoCs to be compatible with standard Linux
DT bindings.
Also, add support for pinconf bias-pull-up.
Signed-off-by: Sumit
Signed-off-by: Sumit Garg
---
arch/arm/mach-snapdragon/pinctrl-qcs404.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a/arch/arm/mach-snapdragon/pinctrl-qcs404.c
b/arch/arm/mach-snapdragon/pinctrl-qcs404.c
index 889ead0f57..5a7fbfd441 100644
--- a/arch/arm/mach-snapdragon/pinctrl
Signed-off-by: Sumit Garg
---
arch/arm/mach-snapdragon/clock-qcs404.c | 60 +++
.../include/mach/sysmap-qcs404.h | 14 +
2 files changed, 74 insertions(+)
diff --git a/arch/arm/mach-snapdragon/clock-qcs404.c
b/arch/arm/mach-snapdragon/clock-qcs404.c
index
Signed-off-by: Sumit Garg
---
arch/arm/dts/qcs404-evb.dts | 4
configs/qcs404evb_defconfig | 1 +
2 files changed, 5 insertions(+)
diff --git a/arch/arm/dts/qcs404-evb.dts b/arch/arm/dts/qcs404-evb.dts
index 0639af8fe3..c8bcf9f71d 100644
--- a/arch/arm/dts/qcs404-evb.dts
+++ b/arch/arm/dts
Currently u-boot maps whole of 1G RAM but there reserved memory ranges on
QCS404 which are reserved for TrustZone, various firmware components etc.
Any access to these reserved memory ranges causes a bus hang issue. So
disable mapping for reserved memory ranges in u-boot.
Signed-off-by: Sumit
.
Sumit Garg (14):
qcs404: sysmap: Don't map reserved memory ranges
qcs404-evb: Enable msm_gpio driver support
clocks: qcs404: Add support for ethernet clocks
pinctrl: qcs404: Enable ethernet pinmux options
pinctrl-snapdragon: Get rid of custom drive-strength values
net: dwc_eth_qos: Make
On Fri, 20 Jan 2023 at 12:47, Sumit Garg wrote:
>
> Patch#1 is a fix for QCS404 system memory map to not map reserved memory
> regions as an occasional system hang is observed.
>
> Rest of the patches add support for Qualcomm ethernet
Gentle ping for any comments/feedback regardi
On Fri, 20 Jan 2023 at 19:08, Stephan Gerhold wrote:
>
> On Fri, Jan 20, 2023 at 05:55:35PM +0530, Sumit Garg wrote:
> > On Fri, 20 Jan 2023 at 14:16, Heiko Schocher wrote:
> > > On 20.01.23 08:17, Sumit Garg wrote:
> > > > Add support for Qualcomm I2C
On Sat, 21 Jan 2023 at 08:38, Alexey Minnekhanov
wrote:
>
> On 2023-01-19 11:47, Sumit Garg wrote:
> > On Mon, 16 Jan 2023 at 06:04, Alexey Minnekhanov
> > wrote:
> >>
> >> Now that reg-names is required, specify them, and use correct
> >> addresses f
On Sat, 21 Jan 2023 at 08:26, Alexey Minnekhanov
wrote:
>
> On 2023-01-19 11:44, Sumit Garg wrote:
> > On Mon, 16 Jan 2023 at 06:04, Alexey Minnekhanov
> > wrote:
> >>
> >> Update spmi-msm documentation and example to reflect the current
> >> state of
Hi Heiko,
Thanks for your review.
On Fri, 20 Jan 2023 at 14:16, Heiko Schocher wrote:
>
> Helo Sumit Garg,
>
> On 20.01.23 08:17, Sumit Garg wrote:
> > Add support for Qualcomm I2C QUP driver which is inspired from
> > corresponding driver in Linux: driv
2:
> - none
>
> drivers/gpio/qcom_pmic_gpio.c | 15 +++
> 1 file changed, 15 insertions(+)
>
Reviewed-by: Sumit Garg
-Sumit
> diff --git a/drivers/gpio/qcom_pmic_gpio.c b/drivers/gpio/qcom_pmic_gpio.c
> index 3be1be8692..e46377ce3b 100644
> --- a/dr
Signed-off-by: Sumit Garg
---
arch/arm/dts/qcs404-evb.dts | 97 +
1 file changed, 97 insertions(+)
diff --git a/arch/arm/dts/qcs404-evb.dts b/arch/arm/dts/qcs404-evb.dts
index 2de0e7537b..8d7893c116 100644
--- a/arch/arm/dts/qcs404-evb.dts
+++ b/arch/arm/dts
Worsfold
Signed-off-by: Sumit Garg
---
drivers/i2c/Kconfig | 6 +
drivers/i2c/Makefile | 1 +
drivers/i2c/qup_i2c.c | 592 ++
3 files changed, 599 insertions(+)
create mode 100644 drivers/i2c/qup_i2c.c
diff --git a/drivers/i2c/Kconfig b/drivers/i2c
Co-developed-by: Mike Worsfold
Signed-off-by: Mike Worsfold
Signed-off-by: Sumit Garg
---
arch/arm/mach-snapdragon/pinctrl-qcs404.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/arch/arm/mach-snapdragon/pinctrl-qcs404.c
b/arch/arm/mach-snapdragon/pinctrl-qcs404.c
index 5a7fbfd441
Co-developed-by: Mike Worsfold
Signed-off-by: Mike Worsfold
Signed-off-by: Sumit Garg
---
arch/arm/mach-snapdragon/clock-qcs404.c | 58 +++
.../include/mach/sysmap-qcs404.h | 17 ++
2 files changed, 75 insertions(+)
diff --git a/arch/arm/mach-snapdragon
Add clk_rcg_set_rate() which allows to configure clocks without programming
MND values. This is required for configuring I2C clocks on QCS404.
Co-developed-by: Mike Worsfold
Signed-off-by: Mike Worsfold
Signed-off-by: Sumit Garg
---
arch/arm/mach-snapdragon/clock-snapdragon.c | 24
Signed-off-by: Sumit Garg
---
arch/arm/dts/qcs404-evb.dts | 98 -
1 file changed, 97 insertions(+), 1 deletion(-)
diff --git a/arch/arm/dts/qcs404-evb.dts b/arch/arm/dts/qcs404-evb.dts
index cc70afa4c8..2de0e7537b 100644
--- a/arch/arm/dts/qcs404-evb.dts
The Qualcom ETHQOS hardware supports an RGMII macro which needs to be
configured according to following link speeds:
- SPEED_1000
- SPEED_100
- SPEED_10
So add a corresponding glue driver to configure RGMII macro.
Signed-off-by: Sumit Garg
---
drivers/net/Kconfig| 7 +
drivers
The GMAC controller on QCS404 SoC (support added by upcoming patch) fails
to work with maximum tx/rx_fifo_sz supported by the hardware (16K). So
allow platforms to override FIFO size using corresponding DT node
properties.
Signed-off-by: Sumit Garg
---
drivers/net/dwc_eth_qos.c | 19
Signed-off-by: Sumit Garg
---
drivers/net/dwc_eth_qos.c | 9 ++---
1 file changed, 6 insertions(+), 3 deletions(-)
diff --git a/drivers/net/dwc_eth_qos.c b/drivers/net/dwc_eth_qos.c
index afc47b56ff..753a912607 100644
--- a/drivers/net/dwc_eth_qos.c
+++ b/drivers/net/dwc_eth_qos.c
Use standard pinconf drive-strength values from Linux DT bindings rather
than ones based on custom u-boot header. These changes are in direction
to make u-boot DTs for Qcom SoCs to be compatible with standard Linux
DT bindings.
Also, add support for pinconf bias-pull-up.
Signed-off-by: Sumit
Signed-off-by: Sumit Garg
---
arch/arm/mach-snapdragon/pinctrl-qcs404.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a/arch/arm/mach-snapdragon/pinctrl-qcs404.c
b/arch/arm/mach-snapdragon/pinctrl-qcs404.c
index 889ead0f57..5a7fbfd441 100644
--- a/arch/arm/mach-snapdragon/pinctrl
Signed-off-by: Sumit Garg
---
arch/arm/mach-snapdragon/clock-qcs404.c | 60 +++
.../include/mach/sysmap-qcs404.h | 14 +
2 files changed, 74 insertions(+)
diff --git a/arch/arm/mach-snapdragon/clock-qcs404.c
b/arch/arm/mach-snapdragon/clock-qcs404.c
index
Signed-off-by: Sumit Garg
---
arch/arm/dts/qcs404-evb.dts | 4
configs/qcs404evb_defconfig | 1 +
2 files changed, 5 insertions(+)
diff --git a/arch/arm/dts/qcs404-evb.dts b/arch/arm/dts/qcs404-evb.dts
index 0639af8fe3..c8bcf9f71d 100644
--- a/arch/arm/dts/qcs404-evb.dts
+++ b/arch/arm/dts
Currently u-boot maps whole of 1G RAM but there reserved memory ranges on
QCS404 which are reserved for TrustZone, various firmware components etc.
Any access to these reserved memory ranges causes a bus hang issue. So
disable mapping for reserved memory ranges in u-boot.
Signed-off-by: Sumit
Patch#1 is a fix for QCS404 system memory map to not map reserved memory
regions as an occasional system hang is observed.
Rest of the patches add support for Qualcomm ethernet and I2C drivers
specifically tested on QCS404 SoC.
Sumit Garg (14):
qcs404: sysmap: Don't map reserved memory ranges
: add arbiter version 5 support")
>
> Signed-off-by: Alexey Minnekhanov
> ---
> drivers/spmi/spmi-msm.c | 19 ---
> 1 file changed, 8 insertions(+), 11 deletions(-)
>
Reviewed-by: Sumit Garg
-Sumit
> diff --git a/drivers/spmi/spmi-msm.c b/drivers/spmi
On Mon, 16 Jan 2023 at 06:04, Alexey Minnekhanov
wrote:
>
> Now that reg-names is required, specify them, and use correct
> addresses for SPMI arbiter regs, taken from Linux dts [1] [2].
>
> [1]
> https://elixir.bootlin.com/linux/v6.1.5/source/arch/arm64/boot/dts/qcom/qcs404.dtsi#L739
> [2]
>
On Mon, 16 Jan 2023 at 06:04, Alexey Minnekhanov
wrote:
>
> Update spmi-msm documentation and example to reflect the current
> state of the driver.
>
> Signed-off-by: Alexey Minnekhanov
> ---
> doc/device-tree-bindings/spmi/spmi-msm.txt | 21 ++---
> 1 file changed, 14
n DTS more easily.
>
> [1]:
> https://elixir.bootlin.com/linux/v6.1.6/source/drivers/spmi/spmi-pmic-arb.c#L1339
>
> Signed-off-by: Alexey Minnekhanov
> ---
> drivers/spmi/spmi-msm.c | 16 +---
> 1 file changed, 9 insertions(+), 7 deletions(-)
Apart from nit below, feel free
y Minnekhanov
> ---
> drivers/spmi/spmi-msm.c | 6 --
> 1 file changed, 6 deletions(-)
>
Reviewed-by: Sumit Garg
> diff --git a/drivers/spmi/spmi-msm.c b/drivers/spmi/spmi-msm.c
> index 27a035c0a595..a9dcf5ab7f91 100644
> --- a/drivers/spmi/spmi-msm.c
> +++ b/d
On Fri, 23 Sept 2022 at 11:16, Etienne Carriere
wrote:
>
> Hello Sumit,
>
>
> On Thu, 22 Sept 2022 at 12:15, Sumit Garg wrote:
> >
> > On Thu, 22 Sept 2022 at 14:22, Etienne Carriere
> > wrote:
> > >
> > > Hello Patrick and all,
> >
On Thu, 22 Sept 2022 at 14:22, Etienne Carriere
wrote:
>
> Hello Patrick and all,
>
> On Mon, 19 Sept 2022 at 16:49, Patrick DELAUNAY
> wrote:
> >
> >
> > Hi Simon,
> >
> > On 9/12/22 20:31, Simon Glass wrote:
> > > Hi Ilias,
> > >
> > > On Wed, 7 Sept 2022 at 15:32, Ilias Apalodimas
> > >
On Tue, 16 Aug 2022 at 13:32, Sumit Garg wrote:
>
> Hi Tom,
>
> On Thu, 4 Aug 2022 at 20:09, Sumit Garg wrote:
> >
> > Hi,
> >
> > On Wed, 27 Jul 2022 at 13:52, Sumit Garg wrote:
> > >
> > > This is an initial step towards achieving complet
Hi,
On Thu, 4 Aug 2022 at 19:57, Sumit Garg wrote:
>
> This series add support for USB on QCS404 SoC. USB support have
> dependencies on PHY, reset and PMIC GPIO drivers, so corresponding
> support has been added. There are also some renaming/reorganising
> patches (#1, #3 and
Hi Tom,
On Thu, 4 Aug 2022 at 20:09, Sumit Garg wrote:
>
> Hi,
>
> On Wed, 27 Jul 2022 at 13:52, Sumit Garg wrote:
> >
> > This is an initial step towards achieving complete Linux DT sync on Qcom
> > SoCs/boards. It syncs up DT compatibles for pinctrl and GPIO
On Sun, 7 Aug 2022 at 05:50, Ramon Fried wrote:
>
> On Thu, Jul 14, 2022 at 10:33 AM Sumit Garg wrote:
> >
> > Currently for all Qcom SoCs/boards there are separate compatibles for
> > GPIO and pinctrl. But this is inconsistent with official (upstream) Linux
> >
Hi Robert,
Thanks for your review.
On Sat, 6 Aug 2022 at 13:11, Robert Marko wrote:
>
> On Thu, Aug 4, 2022 at 4:28 PM Sumit Garg wrote:
> >
> > Signed-off-by: Sumit Garg
> > ---
> > drivers/reset/reset-qcom.c | 30 ++
>
Hi,
On Wed, 27 Jul 2022 at 13:52, Sumit Garg wrote:
>
> This is an initial step towards achieving complete Linux DT sync on Qcom
> SoCs/boards. It syncs up DT compatibles for pinctrl and GPIO drivers.
>
> Changes in v2:
> - Separate patch for CONFIG_SDM845 check removal.
Enable USB config options along with its dependencies like PHY, RESET,
PMIC GPIO etc. config options.
Signed-off-by: Sumit Garg
---
configs/qcs404evb_defconfig | 18 ++
1 file changed, 18 insertions(+)
diff --git a/configs/qcs404evb_defconfig b/configs/qcs404evb_defconfig
index
usb_vbus_boost_pin.
Signed-off-by: Sumit Garg
---
arch/arm/dts/qcs404-evb-uboot.dtsi | 6 ++
board/qualcomm/qcs404-evb/qcs404-evb.c | 29 ++
2 files changed, 35 insertions(+)
diff --git a/arch/arm/dts/qcs404-evb-uboot.dtsi
b/arch/arm/dts/qcs404-evb-uboot.dtsi
index c18080a483
PMIC GPIOs are special GPIOs which are accessible through SPMI bus. So
add corresponding DT nodes.
Signed-off-by: Sumit Garg
---
arch/arm/dts/qcs404-evb.dts | 25 +
1 file changed, 25 insertions(+)
diff --git a/arch/arm/dts/qcs404-evb.dts b/arch/arm/dts/qcs404-evb.dts
GPIO LV (low voltage)/MV (medium voltage) subtypes have different
features and register mappings than 4CH/8CH subtypes. Add support
for LV and MV subtypes.
With GPIO LV/MV subtype available, add "qcom,pms405-gpio" compatible
which requires support for GPIO MV subtype.
Signed-off-by:
latest DT binding: qcom,spmi-pmic.txt from Linux
kernel and thereby remove pm8916.txt.
Signed-off-by: Sumit Garg
---
configs/dragonboard410c_defconfig | 4 +-
configs/dragonboard820c_defconfig | 4 +-
configs/dragonboard845c_defconfig | 4 +-
configs
QCS404 SoC provides support for two USB controllers: one USB3 and the
other one being USB2. The USB3 controller supports further 2 PHY: one high
speed PHY and the other super speed PHY. The USB2 controller supports a
single high speed PHY. So add corresponding DT nodes.
Signed-off-by: Sumit Garg
Add support for USB controller and PHY clocks for QCS404 SoC.
Signed-off-by: Sumit Garg
---
arch/arm/mach-snapdragon/clock-qcs404.c | 35 +++
.../include/mach/sysmap-qcs404.h | 17 +
2 files changed, 52 insertions(+)
diff --git a/arch/arm/mach
Drivers like USB, ethernet etc. uses ".enable" hook to enable clocks.
So add corresponding support for Qcom clock drivers.
Signed-off-by: Sumit Garg
---
arch/arm/mach-snapdragon/clock-apq8016.c| 5 +
arch/arm/mach-snapdragon/clock-apq8096.c| 5 +
arch/arm/mach-snapdr
Signed-off-by: Sumit Garg
---
arch/arm/dts/qcs404-evb.dts | 6 ++
1 file changed, 6 insertions(+)
diff --git a/arch/arm/dts/qcs404-evb.dts b/arch/arm/dts/qcs404-evb.dts
index 09687e1fd3..1b280efff6 100644
--- a/arch/arm/dts/qcs404-evb.dts
+++ b/arch/arm/dts/qcs404-evb.dts
@@ -54,6 +54,12
Signed-off-by: Sumit Garg
---
drivers/reset/reset-qcom.c | 30 ++
1 file changed, 30 insertions(+)
diff --git a/drivers/reset/reset-qcom.c b/drivers/reset/reset-qcom.c
index 40f436ede4..94315e76d5 100644
--- a/drivers/reset/reset-qcom.c
+++ b/drivers/reset/reset
Since the base functionality remains the same for a reset driver on Qcom
SoCs, so leverage that to convert ipq4019 specific reset driver to a
generic Qcom reset driver. With that one just need to provide SoC specific
reset table.
Signed-off-by: Sumit Garg
---
drivers/reset/Kconfig
QCS404 SoC supports two types of PHY, one supports high speed mode or
USB2 PHY and the other supports super speed mode or USB3 PHY. So add
corresponding PHY drivers.
Signed-off-by: Sumit Garg
---
drivers/phy/qcom/Kconfig| 16 ++
drivers/phy/qcom/Makefile | 2
Qcom PHY drivers to drivers/phy/qcom/.
- Patch #3 coverts ipq4019 reset driver to a generic Qcom reset driver.
- Patch #9 Convert pm8916 driver to a generic Qcom PMIC driver.
Sumit Garg (13):
phy: Move qcom SoCs specific phy drivers to qcom folder
phy: Add support for drivers to enable USB
Signed-off-by: Sumit Garg
---
drivers/phy/Kconfig | 15 +--
drivers/phy/Makefile | 3 +--
drivers/phy/qcom/Kconfig | 13 +
drivers/phy/qcom/Makefile | 2 ++
drivers/phy/{ => q
x this inconsistency for Qcom SoCs in order to comply with upstream
DT bindings. This is done via removing compatibles from "msm_gpio" driver
and via binding to "msm_gpio" driver from pinctrl driver in case
"gpio-controller" property is specified for pinctrl node.
Sugges
DT compatible is sufficient to make platform specific differentiation,
so remove redundant CONFIG_SDM845 check.
Signed-off-by: Sumit Garg
---
arch/arm/mach-snapdragon/Makefile | 2 +-
arch/arm/mach-snapdragon/pinctrl-snapdragon.c | 2 --
2 files changed, 1 insertion(+), 3 deletions
This is an initial step towards achieving complete Linux DT sync on Qcom
SoCs/boards. It syncs up DT compatibles for pinctrl and GPIO drivers.
Changes in v2:
- Separate patch for CONFIG_SDM845 check removal.
- Fix pinctrl DT compatibles for db410c and db820c.
Sumit Garg (2):
pinctrl: sdm845
On Tue, 19 Jul 2022 at 16:31, Tom Rini wrote:
>
> On Tue, Jul 19, 2022 at 11:01:12AM +0530, Sumit Garg wrote:
> > Hi Tom, Ramon,
> >
> > On Tue, 12 Jul 2022 at 12:42, Sumit Garg wrote:
> > >
> > > Add support for two new boards db845c and qcs404-e
Hi Tom, Ramon,
On Tue, 12 Jul 2022 at 12:42, Sumit Garg wrote:
>
> Add support for two new boards db845c and qcs404-evb:
> - db845c is a 96boards compliant platform aka RB3 based on Qualcomm
> SDM845 SoC.
> - qcs404-evb is an evaluation board from Qualcomm based on QCS40
On Sat, 16 Jul 2022 at 18:54, Stephan Gerhold wrote:
>
> On Fri, Jul 15, 2022 at 03:21:45PM +0530, Sumit Garg wrote:
> > On Thu, 14 Jul 2022 at 23:45, Stephan Gerhold wrote:
> > > On Thu, Jul 14, 2022 at 01:03:37PM +0530, Sumit Garg wrote:
> > > > This is based
On Thu, 14 Jul 2022 at 23:57, Stephan Gerhold wrote:
>
> On Thu, Jul 14, 2022 at 01:10:45PM +0530, Sumit Garg wrote:
> > On Thu, 14 Jul 2022 at 01:02, Stephan Gerhold wrote:
> > > Can you check how hard it would be to reuse the upstream QCS404 DT?
> > >
> &
On Thu, 14 Jul 2022 at 23:45, Stephan Gerhold wrote:
>
> On Thu, Jul 14, 2022 at 01:03:37PM +0530, Sumit Garg wrote:
> > Currently for all Qcom SoCs/boards there are separate compatibles for
> > GPIO and pinctrl. But this is inconsistent with official (upstream) Linux
> >
ce v2022.01) but I got caught
> up in other work and completely forgot about it. I guess no one else
> is actively testing U-Boot on DB410c/DB820c. :/
> ---
> arch/arm/dts/dragonboard410c.dts | 9 +++--
> arch/arm/dts/dragonboard820c.dts | 11 +++
> 2 files changed, 14 insertions(+)
Hi Stephan,
On Thu, 14 Jul 2022 at 01:02, Stephan Gerhold wrote:
>
> Hi Sumit,
>
> On Tue, Jul 12, 2022 at 12:42:12PM +0530, Sumit Garg wrote:
> > Add support for Qualcomm QCS404 SoC based evaluation board.
> >
> > Features:
> > - Qualcomm Snapdragon QCS40
x this inconsistency for Qcom SoCs in order to comply with upstream
DT bindings. This is done via removing compatibles from "msm_gpio" driver
and via binding to "msm_gpio" driver from pinctrl driver in case
"gpio-controller" property is specified for pinctrl node.
Sugges
On Tue, 12 Jul 2022 at 13:58, Peng Fan wrote:
>
>
>
> On 7/12/2022 1:53 PM, Sumit Garg wrote:
> > Hi Peng,
> >
> > On Tue, 12 Jul 2022 at 06:27, Peng Fan wrote:
> >>
> >>
> >>
> >> On 7/8/2022 9:13 PM, Sumit Garg wrote:
> >
-by: Sumit Garg
---
arch/arm/dts/Makefile| 1 +
arch/arm/dts/qcs404-evb-uboot.dtsi | 24 +++
arch/arm/dts/qcs404-evb.dts | 81
arch/arm/mach-snapdragon/Kconfig | 11
arch/arm/mach-snapdragon/Makefile| 2
Currently this clock driver initializes clocks for UART and eMMC. Along
with this import "qcom,gcc-qcs404.h" header from Linux mainline to
support DT bindings.
Signed-off-by: Sumit Garg
---
arch/arm/mach-snapdragon/clock-qcs404.c | 79
arch/arm/mach-snapdragon/clock-sn
onfiguring register read/write to msm specific registers.
Signed-off-by: Sumit Garg
Reviewed-by: Ramon Fried
---
drivers/mmc/msm_sdhci.c | 96 +++--
1 file changed, 64 insertions(+), 32 deletions(-)
diff --git a/drivers/mmc/msm_sdhci.c b/drivers/mmc/msm_sdh
Currently this pinctrl driver only supports BLSP UART2 specific pin
configuration.
Signed-off-by: Sumit Garg
Reviewed-by: Ramon Fried
---
arch/arm/mach-snapdragon/Makefile | 1 +
arch/arm/mach-snapdragon/pinctrl-qcs404.c | 55 +++
arch/arm/mach-snapdragon
build and boot instructions, refer to
doc/board/qualcomm/sdm845.rst, board: dragonboard845c.
Signed-off-by: Sumit Garg
Reviewed-by: Ramon Fried
---
arch/arm/dts/dragonboard845c-uboot.dtsi | 37 +++
arch/arm/dts/dragonboard845c.dts | 44
arch/arm/mach-snapdragon
Rather than using magic numbers as clock ids for peripherals import
qcom,gcc-sdm845.h from Linux to be used standard macros for clock ids.
So start using corresponding clk-id macro for debug UART.
Signed-off-by: Sumit Garg
Reviewed-by: Ramon Fried
---
arch/arm/dts/sdm845.dtsi
Configure debug UART pins as function: "qup9" rather than being regular
gpios. It fixes a hang seen during pinmux setting.
Signed-off-by: Sumit Garg
Reviewed-by: Ramon Fried
---
arch/arm/dts/sdm845.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/
-by: Sumit Garg
Reviewed-by: Ramon Fried
---
arch/arm/dts/sdm845.dtsi | 3 ---
1 file changed, 3 deletions(-)
diff --git a/arch/arm/dts/sdm845.dtsi b/arch/arm/dts/sdm845.dtsi
index 6f2fb20d68..88030156d9 100644
--- a/arch/arm/dts/sdm845.dtsi
+++ b/arch/arm/dts/sdm845.dtsi
@@ -18,7 +18,6
Currently there is a mismatch among DT node overrides in starqltechn
board DTS file and the actual DT nodes in the sdm845.dtsi. So fix that
to align with DT nodes in sdm845.dtsi.
Signed-off-by: Sumit Garg
Reviewed-by: Ramon Fried
---
arch/arm/dts/starqltechn-uboot.dtsi | 18
review tag for patches 1-7.
Changes in v2:
- Added patch #1 to fix DT node overrides in starqltechn-uboot.dtsi.
- Updated patch #2 commit description.
- Fixed a typo (s/96Board/96Boards/) in patch #5.
Sumit Garg (9):
board: starqltechn: Align DT node overrides with sdm845.dtsi
arm64: dts
Hi Peng,
On Tue, 12 Jul 2022 at 06:27, Peng Fan wrote:
>
>
>
> On 7/8/2022 9:13 PM, Sumit Garg wrote:
> > Add support for two new boards db845c and qcs404-evb:
> > - db845c is a 96boards compliant platform aka RB3 based on Qualcomm
> >SDM845 SoC.
> > - qc
Hi Ramon,
Thanks for your review.
On Mon, 11 Jul 2022 at 20:08, Ramon Fried wrote:
>
> On Fri, Jul 8, 2022 at 4:14 PM Sumit Garg wrote:
> >
> > Currently its a dummy clock driver as clocks for UART and eMMC have been
> > already enabled by ABL. Along with this import &q
501 - 600 of 786 matches
Mail list logo