defconfig can support both 1.2A and
1.3B versions, which is more user-friendly.
Signed-off-by: Yanhong Wang
---
board/starfive/visionfive2/spl.c | 157 +++
1 file changed, 157 insertions(+)
diff --git a/board/starfive/visionfive2/spl.c b/board/starfive/visionfive2/spl.c
.
If there is no information in EEPROM, it is initialized with the default
size defined in DT.
Signed-off-by: Yanhong Wang
---
arch/riscv/cpu/jh7110/spl.c | 32 -
drivers/ram/starfive/starfive_ddr.c | 2 --
2 files changed, 31 insertions(+), 3 deletions(-)
diff --git a/arch
Add support "atmel,24c04" eeprom for StarFive VisionFive2 board.
Signed-off-by: Yanhong Wang
---
.../dts/jh7110-starfive-visionfive-2-u-boot.dtsi | 14 ++
arch/riscv/dts/jh7110-starfive-visionfive-2.dtsi | 6 ++
2 files changed, 20 insertions(+)
diff --git a/arch
Enabled ID_EEPROM and I2C configuration for StarFive VisionFive2 board.
Signed-off-by: Yanhong Wang
---
.../visionfive2/starfive_visionfive2.c| 13 +
configs/starfive_visionfive2_defconfig| 19 ++-
2 files changed, 31 insertions(+), 1 deletion
Enabled ID_EEPROM configuration for StarFive VisionFive2 board.
Signed-off-by: Yanhong Wang
---
arch/riscv/include/asm/arch-jh7110/eeprom.h | 13 +
board/starfive/visionfive2/Makefile | 1 +
.../visionfive2/visionfive2-i2c-eeprom.c | 561 ++
3 files changed
The defconfig file name for StarFive VisionFive2 has been changed, and
the documentation description has also changed.
Signed-off-by: Yanhong Wang
---
doc/board/starfive/visionfive2.rst | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/doc/board/starfive/visionfive2.rst
Enable DWC_ETH_QOS and PHY_MOTORCOMM configuration to support ethernet
function for StarFive VisionFive 2 board,including versions 1.2A and
1.3B.
Signed-off-by: Yanhong Wang
---
configs/starfive_visionfive2_defconfig | 9 +
1 file changed, 9 insertions(+)
diff --git a/configs
The StarFive ETHQOS hardware has its own clock and reset,so add a
corresponding glue driver to configure them.
Signed-off-by: Yanhong Wang
Reviewed-by: Ramon Fried
---
drivers/net/Kconfig| 7 +
drivers/net/Makefile | 1 +
drivers/net/dwc_eth_qos.c
The difference between 1.2A and 1.3B is dynamically configured according
to the PCB version, and there is no difference on the board device tree,
so the same DT file can be used.
Signed-off-by: Yanhong Wang
---
arch/riscv/dts/Makefile | 3 +-
... jh7110-starfive
Add ethernet device tree node to support StarFive ethernet driver for
the JH7110 RISC-V SoC.
Signed-off-by: Yanhong Wang
---
.../dts/jh7110-starfive-visionfive-2.dtsi | 34 +
arch/riscv/dts/jh7110.dtsi| 69 +++
2 files changed, 103 insertions
Add a driver for the motorcomm yt8531 gigabit ethernet phy. We have
verified the driver on StarFive VisionFive2 board.
Signed-off-by: Yanhong Wang
Reviewed-by: Ramon Fried
---
drivers/net/phy/Kconfig | 6 +
drivers/net/phy/Makefile| 1 +
drivers/net/phy/motorcomm.c | 437
ch.com/
v4 -
https://patchwork.ozlabs.org/project/uboot/cover/20230525093637.31364-1-yanhong.w...@starfivetech.com/
Yanhong Wang (11):
net: phy: Add driver for Motorcomm yt8531 gigabit ethernet phy
net: dwc_eth_qos: Add StarFive ethernet driver glue layer
riscv: dts: jh7110: Add ethernet d
On 2023/6/5 3:23, Jan Kiszka wrote:
> On 25.05.23 11:36, Yanhong Wang wrote:
>> Enabled ID_EEPROM and I2C configuration for StarFive VisionFive2 board.
>>
>> Signed-off-by: Yanhong Wang
>> ---
>> configs/starfive_visionfive2_defconfig | 19 +
On 2023/6/5 2:53, Jan Kiszka wrote:
> On 25.05.23 11:36, Yanhong Wang wrote:
>> Enable DWC_ETH_QOS and PHY_MOTORCOMM configuration to support ethernet
>> function for StarFive VisionFive 2 board,including versions 1.2A and
>> 1.3B.
>>
>> Signed-off-by:
On 2023/6/2 1:44, Torsten Duwe wrote:
> On Thu, 25 May 2023 17:36:26 +0800
> Yanhong Wang wrote:
> [...]
>>
>> base-commit: 62df7a39442902a71259568c13a4d496d5a514f4
>
> Have you tested this?
>
I also got the following error, which was caused by the
On 2023/5/31 2:11, Simon Glass wrote:
> Hi Yanhong,
>
> Please can you send this to the mailing list and cc me?
>
> Regards,
> Simon
>
> On Tue, 16 May 2023 at 20:48, yanhong wang
> wrote:
>>
>> Hi Simon Glass,
>>
>> Running the latest U-b
Enabled ID_EEPROM and I2C configuration for StarFive VisionFive2 board.
Signed-off-by: Yanhong Wang
---
configs/starfive_visionfive2_defconfig | 19 ++-
1 file changed, 18 insertions(+), 1 deletion(-)
diff --git a/configs/starfive_visionfive2_defconfig
b/configs
Enable DWC_ETH_QOS and PHY_MOTORCOMM configuration to support ethernet
function for StarFive VisionFive 2 board,including versions 1.2A and
1.3B.
Signed-off-by: Yanhong Wang
---
configs/starfive_visionfive2_defconfig | 13 +++--
1 file changed, 11 insertions(+), 2 deletions(-)
diff
The defconfig file name for StarFive VisionFive2 has been changed, and
the documentation description has also changed.
Signed-off-by: Yanhong Wang
---
doc/board/starfive/visionfive2.rst | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/doc/board/starfive/visionfive2.rst
The difference between 1.2A and 1.3B is dynamically configured according
to the PCB version, and there is no difference on the board device tree,
so the same DT file can be used.
Signed-off-by: Yanhong Wang
---
arch/riscv/dts/Makefile | 3 +-
... jh7110-starfive
Add support "atmel,24c04" eeprom for StarFive VisionFive2 board.
Signed-off-by: Yanhong Wang
---
.../dts/jh7110-starfive-visionfive-2-u-boot.dtsi | 14 ++
arch/riscv/dts/jh7110-starfive-visionfive-2.dtsi | 8 +++-
2 files changed, 21 insertions(+), 1 deletion(-)
Add ethernet device tree node to support StarFive ethernet driver for
the JH7110 RISC-V SoC.
Signed-off-by: Yanhong Wang
---
.../dts/jh7110-starfive-visionfive-2.dtsi | 34 +
arch/riscv/dts/jh7110.dtsi| 69 +++
2 files changed, 103 insertions
defconfig can support both 1.2A and
1.3B versions, which is more user-friendly.
Signed-off-by: Yanhong Wang
---
board/starfive/visionfive2/spl.c | 157 ++
.../visionfive2/starfive_visionfive2.c| 13 ++
2 files changed, 170 insertions(+)
diff --git a/board
Enabled ID_EEPROM configuration for StarFive VisionFive2 board.
Signed-off-by: Yanhong Wang
---
arch/riscv/include/asm/arch-jh7110/eeprom.h | 13 +
board/starfive/visionfive2/Makefile | 1 +
.../visionfive2/visionfive2-i2c-eeprom.c | 561 ++
3 files changed
.
If there is no information in EEPROM, it is initialized with the default
size defined in DT.
Signed-off-by: Yanhong Wang
---
arch/riscv/cpu/jh7110/spl.c | 32 -
drivers/ram/starfive/starfive_ddr.c | 2 --
2 files changed, 31 insertions(+), 3 deletions(-)
diff --git a/arch
3 -
https://patchwork.ozlabs.org/project/uboot/cover/20230428022515.29393-1-yanhong.w...@starfivetech.com/
Yanhong Wang (11):
net: phy: Add driver for Motorcomm yt8531 gigabit ethernet phy
net: dwc_eth_qos: Add StarFive ethernet driver glue layer
eeprom: starfive: Enable ID EEPROM configuration
ram
The StarFive ETHQOS hardware has its own clock and reset,so add a
corresponding glue driver to configure them.
Signed-off-by: Yanhong Wang
Reviewed-by: Ramon Fried
---
drivers/net/Kconfig| 7 +
drivers/net/Makefile | 1 +
drivers/net/dwc_eth_qos.c
Add a driver for the motorcomm yt8531 gigabit ethernet phy. We have
verified the driver on StarFive VisionFive2 board.
Signed-off-by: Yanhong Wang
Reviewed-by: Ramon Fried
---
drivers/net/phy/Kconfig | 6 +
drivers/net/phy/Makefile| 1 +
drivers/net/phy/motorcomm.c | 437
On 2023/5/21 19:42, Bo Gan wrote:
> Hi Yanhong and others,
>
> I've made up my own version and addressed my concerns in this patch:
>
> https://patchwork.ozlabs.org/project/uboot/patch/1684668616-358043-1-git-send-email-ganbo...@gmail.com/
>
Hi Bo Gan,
Sorry very much, when I submitted
of memory.So, update the value of the CONFIG_SPL_STACK to
0x81C.
Signed-off-by: Yanhong Wang
---
configs/starfive_visionfive2_defconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/configs/starfive_visionfive2_defconfig
b/configs/starfive_visionfive2_defconfig
index ffbc4b9476
' is initialized in the
board_init_f_init_reserve function.
Signed-off-by: Yanhong Wang
---
arch/riscv/cpu/jh7110/spl.c | 6 +++---
arch/riscv/cpu/start.S | 14 ++
common/init/board_init.c| 1 +
3 files changed, 18 insertions(+), 3 deletions(-)
diff --git a/arch/riscv/cpu
On 2023/5/12 13:50, Bo Gan wrote:
> On 3/28/23 8:42 PM, Yanhong Wang wrote:
>> +void harts_early_init(void)
>> +{
>> + ulong *ptr;
>> + u8 *tmp;
>> + ulong len, remain;
>> + /*
>> + * Feature Disable CSR
>> + *
>>
On 2023/5/2 21:24, Heinrich Schuchardt wrote:
> On 5/2/23 15:11, Andreas Schwab wrote:
>> On Mai 02 2023, Matthias Brugger wrote:
>>
>>> I'm not sure I get your point. The devicetree will be passed to the kernel
>>> via a pointer in a register, the kernel does not need to load the
>>>
Enabled ID_EEPROM and I2C configuration for StarFive VisionFive2 board.
Signed-off-by: Yanhong Wang
---
configs/starfive_visionfive2_defconfig | 19 ++-
1 file changed, 18 insertions(+), 1 deletion(-)
diff --git a/configs/starfive_visionfive2_defconfig
b/configs
Enable DWC_ETH_QOS and PHY_MOTORCOMM configuration to support ethernet
function for StarFive VisionFive 2 board,including versions 1.2A and
1.3B.
Signed-off-by: Yanhong Wang
---
configs/starfive_visionfive2_defconfig | 15 ---
1 file changed, 12 insertions(+), 3 deletions(-)
diff
The defconfig file name for StarFive VisionFive2 has been changed, and
the documentation description has also changed.
Signed-off-by: Yanhong Wang
---
doc/board/starfive/visionfive2.rst | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/doc/board/starfive/visionfive2.rst
Add support "atmel,24c04" eeprom for StarFive VisionFive2 board.
Signed-off-by: Yanhong Wang
---
.../dts/jh7110-starfive-visionfive-2-u-boot.dtsi | 14 ++
arch/riscv/dts/jh7110-starfive-visionfive-2.dtsi | 8 +++-
2 files changed, 21 insertions(+), 1 deletion(-)
The difference between 1.2A and 1.3B is dynamically configured according
to the PCB version, and there is no difference on the board device tree,
so the same DT file can be used.
Signed-off-by: Yanhong Wang
---
arch/riscv/dts/Makefile | 3 +-
... jh7110-starfive
Add ethernet device tree node to support StarFive ethernet driver for
the JH7110 RISC-V SoC.
Signed-off-by: Yanhong Wang
---
.../dts/jh7110-starfive-visionfive-2.dtsi | 34 +
arch/riscv/dts/jh7110.dtsi| 69 +++
2 files changed, 103 insertions
defconfig can support both 1.2A and
1.3B versions, which is more user-friendly.
Signed-off-by: Yanhong Wang
---
board/starfive/visionfive2/spl.c | 157 ++
.../visionfive2/starfive_visionfive2.c| 13 ++
2 files changed, 170 insertions(+)
diff --git a/board
Enabled ID_EEPROM configuration for StarFive VisionFive2 board.
Signed-off-by: Yanhong Wang
---
arch/riscv/include/asm/arch-jh7110/eeprom.h | 13 +
board/starfive/visionfive2/Makefile | 1 +
.../visionfive2/visionfive2-i2c-eeprom.c | 560 ++
3 files changed
.
If there is no information in EEPROM, it is initialized with the default
size defined in DT.
Signed-off-by: Yanhong Wang
---
arch/riscv/cpu/jh7110/spl.c | 32 -
drivers/ram/starfive/starfive_ddr.c | 2 --
2 files changed, 31 insertions(+), 3 deletions(-)
diff --git a/arch
The StarFive ETHQOS hardware has its own clock and reset,so add a
corresponding glue driver to configure them.
Signed-off-by: Yanhong Wang
---
drivers/net/Kconfig| 7 +
drivers/net/Makefile | 1 +
drivers/net/dwc_eth_qos.c | 6 +
drivers/net
Add a driver for the motorcomm yt8531 gigabit ethernet phy. We have
verified the driver on StarFive VisionFive2 board.
Signed-off-by: Yanhong Wang
Reviewed-by: Ramon Fried
---
drivers/net/phy/Kconfig | 6 +
drivers/net/phy/Makefile| 1 +
drivers/net/phy/motorcomm.c | 437
-yanhong.w...@starfivetech.com/
Yanhong Wang (11):
net: phy: Add driver for Motorcomm yt8531 gigabit ethernet phy
net: dwc_eth_qos: Add StarFive ethernet driver glue layer
eeprom: starfive: Enable ID EEPROM configuration
ram: starfive: Read memory size information from EEPROM
board
Fixed errors reported when executing 'scripts/get_maintainer.pl -f
configs/starfive_visionfive2_defconfig'.
Invalid MAINTAINERS address: 'startfive'
Signed-off-by: Yanhong Wang
---
board/starfive/visionfive2/MAINTAINERS | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/board
>= 0xB2" the correct
> discriminator?
>
Hi Torsten,
The attached is the driver of VisionFive2 EEPROM, which is only a preliminary
draft,
and it is still being improved [the function has been tested, it is normal],
and
it contains the definition of the EEPROM data format.
>
On 2023/4/13 17:03, Torsten Duwe wrote:
> On Thu, 13 Apr 2023 10:05:28 +0800
> yanhong wang wrote:
>
>> the definition of DT refers to Linux and is consistent with the definition
>> framework of Linux.
>
> This is one of the desired goals, to avoid c
On 2023/4/13 1:50, Torsten Duwe wrote:
> On Wed, 29 Mar 2023 18:16:20 +0800
> yanhong wang wrote:
>
>>
>>
>> On 2023/3/29 17:41, Torsten Duwe wrote:
>> > On Wed, 29 Mar 2023 11:42:07 +0800
>> > Yanhong Wang wrote:
>> >
>> >&
On 2023/3/30 4:02, Simon Glass wrote:
> Hi Yanhong,
>
> On Wed, 29 Mar 2023 at 23:29, Yanhong Wang
> wrote:
>>
>> The StarFive ETHQOS hardware has its own clock and reset,so add a
>> corresponding glue driver to configure them.
>>
>> Signed-off-by: Ya
The StarFive ETHQOS hardware has its own clock and reset,so add a
corresponding glue driver to configure them.
Signed-off-by: Yanhong Wang
---
drivers/net/Kconfig| 7 +
drivers/net/Makefile | 1 +
drivers/net/dwc_eth_qos.c | 6 +
drivers/net
Add a driver for the motorcomm yt8531 gigabit ethernet phy. We have
verified the driver on StarFive VisionFive2 board.
Signed-off-by: Yanhong Wang
---
drivers/net/phy/Kconfig | 6 +
drivers/net/phy/Makefile| 1 +
drivers/net/phy/motorcomm.c | 450
Enable DWC_ETH_QOS and PHY_MOTORCOMM configuration to support ethernet
function for StarFive VisionFive 2 board,including versions 1.2A and
1.3B.
Signed-off-by: Yanhong Wang
---
configs/starfive_visionfive2_12a_defconfig | 12 +++-
configs/starfive_visionfive2_13b_defconfig | 12
Add ethernet device tree node to support StarFive ethernet driver for
the JH7110 RISC-V SoC.
Signed-off-by: Yanhong Wang
---
arch/riscv/dts/jh7110.dtsi | 69 ++
1 file changed, 69 insertions(+)
diff --git a/arch/riscv/dts/jh7110.dtsi b/arch/riscv/dts/jh7110
, and needs to switch rx and
tx to external clock sources.
Signed-off-by: Yanhong Wang
---
.../jh7110-starfive-visionfive-2-v1.2a.dts| 13 +++
.../jh7110-starfive-visionfive-2-v1.3b.dts| 27 +++
.../dts/jh7110-starfive-visionfive-2.dtsi | 34 +++
3 files
the
configuration data read from dts.
Previous versions:
v1 -
https://patchwork.ozlabs.org/project/uboot/cover/20230317010536.17860-1-yanhong.w...@starfivetech.com/
Yanhong Wang (5):
net: phy: Add driver for Motorcomm yt8531 gigabit ethernet phy
net: dwc_eth_qos: Add StarFive ethernet driver
On 2023/3/29 17:41, Torsten Duwe wrote:
> On Wed, 29 Mar 2023 11:42:07 +0800
> Yanhong Wang wrote:
>
>> v5:
> [...]
>> - Splitted starfive_visionfive2_defconfig into
>> starfive_visionfive2_12a_defconfig
>> and starfive_visionfive2_13b_defconfig.
&g
Add initial device tree for StarFive VisionFive v2 board.
Signed-off-by: Yanhong Wang
Tested-by: Conor Dooley
---
arch/riscv/dts/Makefile | 3 +-
...10-starfive-visionfive-2-v1.2a-u-boot.dtsi | 69
.../jh7110-starfive-visionfive-2-v1.2a.dts| 12 +
...10
This is the initial basic config for StarFive VisionFive v2 board. It
includes consol, Norflash, sdio, ddr etc.
Include starfive_visionfive2_12a_defconfig and
starfive_visionfive2_13b_defconfig, matching the 1.2A and 1.3B boards.
Signed-off-by: Yanhong Wang
Tested-by: Conor Dooley
---
configs
Add initial u-boot device tree for the JH7110 RISC-V SoC.
Signed-off-by: Yanhong Wang
Tested-by: Conor Dooley
---
arch/riscv/dts/jh7110-u-boot.dtsi | 99 +++
1 file changed, 99 insertions(+)
create mode 100644 arch/riscv/dts/jh7110-u-boot.dtsi
diff --git a/arch
Add initial device tree for the JH7110 RISC-V SoC.
Signed-off-by: Yanhong Wang
Tested-by: Conor Dooley
---
arch/riscv/dts/jh7110.dtsi | 573 +
1 file changed, 573 insertions(+)
create mode 100644 arch/riscv/dts/jh7110.dtsi
diff --git a/arch/riscv/dts
Add board support for StarFive VisionFive v2.
Signed-off-by: Yanhong Wang
Tested-by: Conor Dooley
---
arch/riscv/Kconfig | 5 +
1 file changed, 5 insertions(+)
diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
index 48ca4ff4c4..f6ed05906a 100644
--- a/arch/riscv/Kconfig
+++ b/arch
Add Kconfig to select the basic functions for StarFive VisionFive v2 Board.
Signed-off-by: Yanhong Wang
Tested-by: Conor Dooley
---
board/starfive/visionfive2/Kconfig | 53 ++
1 file changed, 53 insertions(+)
create mode 100644 board/starfive/visionfive2/Kconfig
Add driver for StarFive JH7110 to support ddr initialization in SPL.
Signed-off-by: Yanhong Wang
Tested-by: Conor Dooley
---
drivers/ram/Kconfig |1 +
drivers/ram/Makefile|4 +-
drivers/ram/starfive/Kconfig|5 +
drivers/ram/starfive/Makefile
Add board support for StarFive VisionFive v2.
Signed-off-by: Yanhong Wang
Tested-by: Conor Dooley
---
board/starfive/visionfive2/MAINTAINERS| 7 +
board/starfive/visionfive2/Makefile | 7 +
board/starfive/visionfive2/spl.c | 87
.../visionfive2
Add Kconfig to select the basic functions for StarFive JH7110 SoC.
Signed-off-by: Yanhong Wang
Tested-by: Conor Dooley
---
arch/riscv/cpu/jh7110/Kconfig | 28
1 file changed, 28 insertions(+)
create mode 100644 arch/riscv/cpu/jh7110/Kconfig
diff --git a/arch
From: Kuan Lim Lee
Add pinctrl driver for StarFive JH7110 SoC.
Signed-off-by: Kuan Lim Lee
Signed-off-by: Emil Renner Berthing
Signed-off-by: Jianlong Huang
Signed-off-by: Yanhong Wang
Tested-by: Conor Dooley
---
drivers/pinctrl/Kconfig | 1 +
drivers/pinctrl
Add a DM clock driver for StarFive JH7110 SoC.
Signed-off-by: Yanhong Wang
Tested-by: Conor Dooley
---
drivers/clk/Kconfig | 1 +
drivers/clk/Makefile | 1 +
drivers/clk/starfive/Kconfig | 17 +
drivers/clk/starfive/Makefile | 4
From: Jianlong Huang
Add pinctrl definitions for StarFive JH7110 SoC.
Signed-off-by: Kuan Lim Lee
Signed-off-by: Emil Renner Berthing
Signed-off-by: Jianlong Huang
Signed-off-by: Yanhong Wang
Tested-by: Conor Dooley
---
.../pinctrl/pinctrl-starfive-jh7110.h | 427
Add a DM reset driver for StarFive JH7110 SoC.
Note that the register base address of reset controller is the
same with the clock controller. Therefore, there is no device
tree node alone for reset driver.It binds device node in
the clock driver
Signed-off-by: Yanhong Wang
Tested-by: Conor
Add all clock outputs for the StarFive JH7110 clock generator.
Signed-off-by: Yanhong Wang
Acked-by: Sean Anderson
Tested-by: Conor Dooley
---
.../dt-bindings/clock/starfive,jh7110-crg.h | 257 ++
1 file changed, 257 insertions(+)
create mode 100644 include/dt-bindings
Add resets for the StarFive JH7110 system(SYS),system-top-group(STG) and
always-on(AON) reset controller.
Signed-off-by: Yanhong Wang
Tested-by: Conor Dooley
---
.../dt-bindings/reset/starfive,jh7110-crg.h | 183 ++
1 file changed, 183 insertions(+)
create mode 100644
Add StarFive JH7110 SoC to support RISC-V arch.
Signed-off-by: Yanhong Wang
Reviewed-by: Rick Chen
Tested-by: Conor Dooley
---
arch/riscv/cpu/jh7110/Makefile| 10
arch/riscv/cpu/jh7110/cpu.c | 23
arch/riscv/cpu/jh7110/dram.c | 38
This adds support for the StarFive JH7110 SoC which also
feature this SiFive cache controller.
Signed-off-by: Yanhong Wang
Tested-by: Conor Dooley
---
drivers/cache/cache-sifive-ccache.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/cache/cache-sifive-ccache.c
b/drivers/cache
):
dt-bindings: pinctrl: Add StarFive JH7110 pinctrl definitions
Kuan Lim Lee (1):
pinctrl: starfive: Add StarFive JH7110 driver
Yanhong Wang (15):
riscv: cpu: jh7110: Add support for jh7110 SoC
cache: starfive: Add StarFive JH7110 support
dt-bindings: reset: Add StarFive JH7110 reset definit
On 2023/3/23 6:04, Conor Dooley wrote:
> On Thu, Mar 16, 2023 at 10:53:29AM +0800, Yanhong Wang wrote:
>> Add initial device tree for the JH7110 RISC-V SoC.
>>
>> Signed-off-by: Yanhong Wang
>> Tested-by: Conor Dooley
>
>> +S7_0: cpu@0
l fix
those build
errors that came from "make htmldocs" in the next version.
> Best regards,
> Leo
>
> On Thu, Mar 16, 2023 at 10:53:25AM +0800, Yanhong Wang wrote:
>> Add board support for StarFive VisionFive v2.
>>
>> Signed-off-by: Yanhong Wang
>>
On 2023/3/24 20:53, Torsten Duwe wrote:
> On Fri, 17 Mar 2023 09:05:31 +0800
> Yanhong Wang wrote:
>
>> This series adds ethernet support for the StarFive JH7110 RISC-V SoC.
>> The series includes PHY and MAC drivers. The PHY model is
>> YT8531 (from Motorcom
On 2023/3/23 16:31, Andreas Schwab wrote:
> On Mär 22 2023, yanhong wang wrote:
>
>> On 2023/3/21 21:51, Andreas Schwab wrote:
>>> On Mär 21 2023, yanhong wang wrote:
>>>
>>>> Except for CONFIG_DEFAULT_DEVICE_TREE and CONFIG_DEFAULT_FDT_FILE,
>&
On 2023/3/19 4:20, Simon Glass wrote:
> Hi Yanhong,
>
> On Thu, 16 Mar 2023 at 19:06, Yanhong Wang
> wrote:
>>
>> Add a driver for the motorcomm yt8531 gigabit ethernet phy. We have
>> verified the driver on StarFive VisionFive2 board.
>>
>> Signed-of
On 2023/3/21 5:25, Conor Dooley wrote:
> On Thu, Mar 16, 2023 at 10:53:31AM +0800, Yanhong Wang wrote:
>> Add initial device tree for StarFive VisionFive v2 board.
>>
>> Signed-off-by: Yanhong Wang
>> Tested-by: Conor Dooley
>
> btw, are you running som
On 2023/3/21 21:51, Andreas Schwab wrote:
> On Mär 21 2023, yanhong wang wrote:
>
>> Except for CONFIG_DEFAULT_DEVICE_TREE and CONFIG_DEFAULT_FDT_FILE,
>> 1.2a and 1.3b versions use the same config.
>>
>> Version 1.3b uses the following configuration:
>
On 2023/3/20 22:28, Andreas Schwab wrote:
> On Mär 16 2023, Yanhong Wang wrote:
>
>> This is the initial basic config for StarFive VisionFive v2 board. It
>> includes consol, Norflash, sdio, ddr etc.
>
> Are you also planning to add a config for the
On 2023/3/19 4:20, Simon Glass wrote:
> Hi Yanhong,
>
> On Thu, 16 Mar 2023 at 19:07, Yanhong Wang
> wrote:
>>
>> The StarFive ETHQOS hardware has its own clock and reset,so add a
>> corresponding glue driver to configure them.
>>
>> Signed-off-by: Ya
On 2023/3/19 4:20, Simon Glass wrote:
> Hi Yanhong,
>
> On Thu, 16 Mar 2023 at 19:06, Yanhong Wang
> wrote:
>>
>> Add a driver for the motorcomm yt8531 gigabit ethernet phy. We have
>> verified the driver on StarFive VisionFive2 board.
>>
>> Signed-of
The StarFive ETHQOS hardware has its own clock and reset,so add a
corresponding glue driver to configure them.
Signed-off-by: Yanhong Wang
---
drivers/net/Kconfig| 7 +
drivers/net/Makefile | 1 +
drivers/net/dwc_eth_qos.c | 6 +
drivers/net
Add a driver for the motorcomm yt8531 gigabit ethernet phy. We have
verified the driver on StarFive VisionFive2 board.
Signed-off-by: Yanhong Wang
---
drivers/net/phy/Kconfig | 6 +
drivers/net/phy/Makefile| 1 +
drivers/net/phy/motorcomm.c | 409
Enable DWC_ETH_QOS and PHY_MOTORCOMM configuration to support ethernet
function for StarFive VisionFive 2 board.
Signed-off-by: Yanhong Wang
---
configs/starfive_visionfive2_defconfig | 13 +
1 file changed, 13 insertions(+)
diff --git a/configs/starfive_visionfive2_defconfig
b
://wiki.rvspace.org/
[2]
https://patchwork.ozlabs.org/project/uboot/cover/20230316025332.3297-1-yanhong.w...@starfivetech.com/
Yanhong Wang (5):
net: phy: Add driver for Motorcomm yt8531 gigabit ethernet phy
net: dwc_eth_qos: Add StarFive ethernet driver glue layer
riscv: dts: jh7110: Add ethernet device
, and needs to switch rx and
tx to external clock sources.
Signed-off-by: Yanhong Wang
---
.../jh7110-starfive-visionfive-2-v1.2a.dts| 13 +++
.../jh7110-starfive-visionfive-2-v1.3b.dts| 27 +++
.../dts/jh7110-starfive-visionfive-2.dtsi | 34 +++
3 files
Add ethernet device tree node to support StarFive ethernet driver for
the JH7110 RISC-V SoC.
Signed-off-by: Yanhong Wang
---
arch/riscv/dts/jh7110.dtsi | 69 ++
1 file changed, 69 insertions(+)
diff --git a/arch/riscv/dts/jh7110.dtsi b/arch/riscv/dts/jh7110
Add board support for StarFive VisionFive v2.
Signed-off-by: Yanhong Wang
Tested-by: Conor Dooley
---
board/starfive/visionfive2/MAINTAINERS| 7 +
board/starfive/visionfive2/Makefile | 7 +
board/starfive/visionfive2/spl.c | 87
.../visionfive2
Add driver for StarFive JH7110 to support ddr initialization in SPL.
Signed-off-by: Yanhong Wang
Tested-by: Conor Dooley
---
drivers/ram/Kconfig |1 +
drivers/ram/Makefile|4 +-
drivers/ram/starfive/Kconfig|5 +
drivers/ram/starfive/Makefile
Add initial u-boot device tree for the JH7110 RISC-V SoC.
Signed-off-by: Yanhong Wang
Tested-by: Conor Dooley
---
arch/riscv/dts/jh7110-u-boot.dtsi | 99 +++
1 file changed, 99 insertions(+)
create mode 100644 arch/riscv/dts/jh7110-u-boot.dtsi
diff --git a/arch
Add initial device tree for StarFive VisionFive v2 board.
Signed-off-by: Yanhong Wang
Tested-by: Conor Dooley
---
arch/riscv/dts/Makefile | 3 +-
...10-starfive-visionfive-2-v1.2a-u-boot.dtsi | 69
.../jh7110-starfive-visionfive-2-v1.2a.dts| 12 +
...10
Add Kconfig to select the basic functions for StarFive JH7110 SoC.
Signed-off-by: Yanhong Wang
Tested-by: Conor Dooley
---
arch/riscv/cpu/jh7110/Kconfig | 28
1 file changed, 28 insertions(+)
create mode 100644 arch/riscv/cpu/jh7110/Kconfig
diff --git a/arch
Add board support for StarFive VisionFive v2.
Signed-off-by: Yanhong Wang
Tested-by: Conor Dooley
---
arch/riscv/Kconfig | 5 +
1 file changed, 5 insertions(+)
diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
index 48ca4ff4c4..f6ed05906a 100644
--- a/arch/riscv/Kconfig
+++ b/arch
Add initial device tree for the JH7110 RISC-V SoC.
Signed-off-by: Yanhong Wang
Tested-by: Conor Dooley
---
arch/riscv/dts/jh7110.dtsi | 582 +
1 file changed, 582 insertions(+)
create mode 100644 arch/riscv/dts/jh7110.dtsi
diff --git a/arch/riscv/dts
This is the initial basic config for StarFive VisionFive v2 board. It
includes consol, Norflash, sdio, ddr etc.
Signed-off-by: Yanhong Wang
Tested-by: Conor Dooley
---
configs/starfive_visionfive2_defconfig | 79 ++
1 file changed, 79 insertions(+)
create mode 100644
Add Kconfig to select the basic functions for StarFive VisionFive v2 Board.
Signed-off-by: Yanhong Wang
Tested-by: Conor Dooley
---
board/starfive/visionfive2/Kconfig | 53 ++
1 file changed, 53 insertions(+)
create mode 100644 board/starfive/visionfive2/Kconfig
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