On Mon, Mar 4, 2024 at 9:46 PM Marek Vasut wrote:
>
> Some Winbond SPI NORs have special SR3 register which is
> used among other things to control whether non-standard
> "Individual Block/Sector Write Protection" (WPS bit)
> locking scheme is activated. This non-standard locking
> scheme is not
On 3/6/24 1:55 PM, Michael Walle wrote:
Hi,
On Wed Mar 6, 2024 at 3:56 AM CET, Marek Vasut wrote:
I'd argue if one wants to use the locking at all, you have to set
UNLOCK_ALL=n. Otherwise, the bootloader might come alone and just
clear your locking bits again. Clearing the WPS bit there is
Hi,
On Wed Mar 6, 2024 at 3:56 AM CET, Marek Vasut wrote:
> > I'd argue if one wants to use the locking at all, you have to set
> > UNLOCK_ALL=n. Otherwise, the bootloader might come alone and just
> > clear your locking bits again. Clearing the WPS bit there is just
> > one more thing which IMHO
On 3/5/24 10:41 PM, Michael Walle wrote:
On Tue Mar 5, 2024 at 7:54 PM CET, Marek Vasut wrote:
On 3/5/24 5:55 PM, Michael Walle wrote:
[...]
Clearing this SR3 WPS bit fixes that problem, both in U-Boot and in
Linux, since Linux that is booted afterward then gets a device that has
locking
On Tue Mar 5, 2024 at 7:54 PM CET, Marek Vasut wrote:
> On 3/5/24 5:55 PM, Michael Walle wrote:
>
> [...]
>
> >> Clearing this SR3 WPS bit fixes that problem, both in U-Boot and in
> >> Linux, since Linux that is booted afterward then gets a device that has
> >> locking scheme
On 3/5/24 5:55 PM, Michael Walle wrote:
[...]
Clearing this SR3 WPS bit fixes that problem, both in U-Boot and in
Linux, since Linux that is booted afterward then gets a device that has
locking scheme configured in a way that Linux expects and can operate.
Better yet, if some old LTS version
On Tue Mar 5, 2024 at 5:28 PM CET, Marek Vasut wrote:
> On 3/5/24 4:53 PM, Michael Walle wrote:
> > On Tue Mar 5, 2024 at 4:37 PM CET, Marek Vasut wrote:
> >> On 3/5/24 1:50 PM, Michael Walle wrote:
> >>> On Tue Mar 5, 2024 at 1:31 PM CET, Marek Vasut wrote:
> On 3/5/24 9:55 AM, Michael Walle
On 3/5/24 4:53 PM, Michael Walle wrote:
On Tue Mar 5, 2024 at 4:37 PM CET, Marek Vasut wrote:
On 3/5/24 1:50 PM, Michael Walle wrote:
Hi Marek,
Hi,
On Tue Mar 5, 2024 at 1:31 PM CET, Marek Vasut wrote:
On 3/5/24 9:55 AM, Michael Walle wrote:
On Mon Mar 4, 2024 at 5:16 PM CET, Marek Vasut
On Tue Mar 5, 2024 at 4:37 PM CET, Marek Vasut wrote:
> On 3/5/24 1:50 PM, Michael Walle wrote:
> > Hi Marek,
>
> Hi,
>
> > On Tue Mar 5, 2024 at 1:31 PM CET, Marek Vasut wrote:
> >> On 3/5/24 9:55 AM, Michael Walle wrote:
> >>> On Mon Mar 4, 2024 at 5:16 PM CET, Marek Vasut wrote:
> Some
On 3/5/24 1:50 PM, Michael Walle wrote:
Hi Marek,
Hi,
On Tue Mar 5, 2024 at 1:31 PM CET, Marek Vasut wrote:
On 3/5/24 9:55 AM, Michael Walle wrote:
On Mon Mar 4, 2024 at 5:16 PM CET, Marek Vasut wrote:
Some Winbond SPI NORs have special SR3 register which is
used among other things to
Hi Marek,
On Tue Mar 5, 2024 at 1:31 PM CET, Marek Vasut wrote:
> On 3/5/24 9:55 AM, Michael Walle wrote:
> > On Mon Mar 4, 2024 at 5:16 PM CET, Marek Vasut wrote:
> >> Some Winbond SPI NORs have special SR3 register which is
> >> used among other things to control whether non-standard
> >>
On 3/5/24 9:55 AM, Michael Walle wrote:
[+ linux-mtd ]
Hi Marek,
Hi,
On Mon Mar 4, 2024 at 5:16 PM CET, Marek Vasut wrote:
Some Winbond SPI NORs have special SR3 register which is
used among other things to control whether non-standard
"Individual Block/Sector Write Protection" (WPS bit)
[+ linux-mtd ]
Hi Marek,
On Mon Mar 4, 2024 at 5:16 PM CET, Marek Vasut wrote:
> Some Winbond SPI NORs have special SR3 register which is
> used among other things to control whether non-standard
> "Individual Block/Sector Write Protection" (WPS bit)
> locking scheme is activated. This
Some Winbond SPI NORs have special SR3 register which is
used among other things to control whether non-standard
"Individual Block/Sector Write Protection" (WPS bit)
locking scheme is activated. This non-standard locking
scheme is not supported by either U-Boot or Linux SPI
NOR stack so make sure
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