On 4/26/22 12:49, Patrick DELAUNAY wrote:
Hi Marek,
On 4/14/22 19:34, Marek Vasut wrote:
On 4/14/22 18:48, Marek Vasut wrote:
On 4/14/22 18:37, Patrick DELAUNAY wrote:
Hi Marek,
Hi,
on ST platform the ASR/SSR/HSR request are already provided by the
DDR settings with pwrctl register
Hi Marek,
On 4/14/22 19:34, Marek Vasut wrote:
On 4/14/22 18:48, Marek Vasut wrote:
On 4/14/22 18:37, Patrick DELAUNAY wrote:
Hi Marek,
Hi,
on ST platform the ASR/SSR/HSR request are already provided by the
DDR settings with pwrctl register value
it is managed in TF-A by
Hi Marek
On 4/13/22 04:49, Marek Vasut wrote:
> Enable DRAM ASR, auto self-refresh, conditionally, based on DT property
> "st,mem-enable-asr" . While ASR does save considerable amount of power
> at runtime automatically, it also causes LTDC underruns on large panels.
> Let user select whether or
On 4/14/22 18:48, Marek Vasut wrote:
On 4/14/22 18:37, Patrick DELAUNAY wrote:
Hi Marek,
Hi,
on ST platform the ASR/SSR/HSR request are already provided by the DDR
settings with pwrctl register value
it is managed in TF-A by
arm-trusted-firmware/drivers/st/ddr/stm32mp1_ddr_helpers.c
On 4/14/22 18:37, Patrick DELAUNAY wrote:
Hi Marek,
Hi,
on ST platform the ASR/SSR/HSR request are already provided by the DDR
settings with pwrctl register value
it is managed in TF-A by
arm-trusted-firmware/drivers/st/ddr/stm32mp1_ddr_helpers.c
Sure, I don't use ATF and I have no
Hi Marek,
on ST platform the ASR/SSR/HSR request are already provided by the DDR
settings with pwrctl register value
it is managed in TF-A by
arm-trusted-firmware/drivers/st/ddr/stm32mp1_ddr_helpers.c
enumstm32mp1_ddr_sr_mode ddr_read_sr_mode(void)
{
uint32_tpwrctl =
Enable DRAM ASR, auto self-refresh, conditionally, based on DT property
"st,mem-enable-asr" . While ASR does save considerable amount of power
at runtime automatically, it also causes LTDC underruns on large panels.
Let user select whether or not ASR is required or not, generally ASR
should be
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