Re: [PATCH 01/18] clk: imx: pllv3: add enable_bit

On Wed, 26 Feb 2020 18:15:44 +0100 Giulio Benetti wrote: > pllv3 PLLs have powerdown/up bits but enable bits too. Specifically > "enable bit" enable the pll output, so when dis/enabling pll by > setting/clearing power_bit we must also set/clear enable_bit. > > Signed-off-by: Giulio Benetti >

[PATCH 01/18] clk: imx: pllv3: add enable_bit

pllv3 PLLs have powerdown/up bits but enable bits too. Specifically "enable bit" enable the pll output, so when dis/enabling pll by setting/clearing power_bit we must also set/clear enable_bit. Signed-off-by: Giulio Benetti --- drivers/clk/imx/clk-pllv3.c | 9 + 1 file changed, 9